diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0115-drm-amd-powerplay-Add-thermal-protection-support-for.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0115-drm-amd-powerplay-Add-thermal-protection-support-for.patch | 976 |
1 files changed, 976 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0115-drm-amd-powerplay-Add-thermal-protection-support-for.patch b/common/recipes-kernel/linux/files/0115-drm-amd-powerplay-Add-thermal-protection-support-for.patch new file mode 100644 index 00000000..dc93cef2 --- /dev/null +++ b/common/recipes-kernel/linux/files/0115-drm-amd-powerplay-Add-thermal-protection-support-for.patch @@ -0,0 +1,976 @@ +From c990b28981e5da2687a8e720393c4daaab36980f Mon Sep 17 00:00:00 2001 +From: Eric Huang <JinHuiEric.Huang@amd.com> +Date: Fri, 27 Nov 2015 14:09:53 -0500 +Subject: [PATCH 0115/1110] drm/amd/powerplay: Add thermal protection support + for Fiji. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +- + drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 143 +++++ + drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c | 687 +++++++++++++++++++++ + drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.h | 61 ++ + 4 files changed, 892 insertions(+), 1 deletion(-) + create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c + create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.h + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile b/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile +index 269fd82..b664e34 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile +@@ -8,7 +8,7 @@ HARDWARE_MGR = hwmgr.o processpptables.o functiontables.o \ + tonga_processpptables.o ppatomctrl.o \ + tonga_hwmgr.o pppcielanes.o tonga_thermal.o\ + fiji_powertune.o fiji_hwmgr.o tonga_clockpowergating.o \ +- fiji_clockpowergating.o ++ fiji_clockpowergating.o fiji_thermal.o + + AMD_PP_HWMGR = $(addprefix $(AMD_PP_PATH)/hwmgr/,$(HARDWARE_MGR)) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +index 00d2e17..8de045f 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +@@ -50,8 +50,11 @@ + #include "pp_debug.h" + #include "pp_acpi.h" + #include "amd_pcie_helpers.h" ++#include "cgs_linux.h" ++#include "ppinterrupt.h" + + #include "fiji_clockpowergating.h" ++#include "fiji_thermal.h" + + #define VOLTAGE_SCALE 4 + #define SMC_RAM_END 0x40000 +@@ -694,6 +697,31 @@ static int fiji_hwmgr_backend_init(struct pp_hwmgr *hwmgr) + hwmgr->platform_descriptor.hardwarePerformanceLevels = 2; + hwmgr->platform_descriptor.minimumClocksReductionPercentage = 50; + ++ phm_cap_set(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_FanSpeedInTableIsRPM); ++ ++ if (table_info->cac_dtp_table->usDefaultTargetOperatingTemp && ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.ucFanControlMode) { ++ hwmgr->thermal_controller.advanceFanControlParameters.usMaxFanPWM = ++ hwmgr->thermal_controller.advanceFanControlParameters.usDefaultMaxFanPWM; ++ hwmgr->thermal_controller.advanceFanControlParameters.usMaxFanRPM = ++ hwmgr->thermal_controller.advanceFanControlParameters.usDefaultMaxFanRPM; ++ hwmgr->dyn_state.cac_dtp_table->usOperatingTempMinLimit = ++ table_info->cac_dtp_table->usOperatingTempMinLimit; ++ hwmgr->dyn_state.cac_dtp_table->usOperatingTempMaxLimit = ++ table_info->cac_dtp_table->usOperatingTempMaxLimit; ++ hwmgr->dyn_state.cac_dtp_table->usDefaultTargetOperatingTemp = ++ table_info->cac_dtp_table->usDefaultTargetOperatingTemp; ++ hwmgr->dyn_state.cac_dtp_table->usOperatingTempStep = ++ table_info->cac_dtp_table->usOperatingTempStep; ++ hwmgr->dyn_state.cac_dtp_table->usTargetOperatingTemp = ++ table_info->cac_dtp_table->usTargetOperatingTemp; ++ ++ phm_cap_set(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_ODFuzzyFanControlSupport); ++ } ++ + sys_info.size = sizeof(struct cgs_system_info); + sys_info.info_id = CGS_SYSTEM_INFO_PCIE_GEN_INFO; + result = cgs_query_system_info(hwmgr->device, &sys_info); +@@ -4915,6 +4943,108 @@ int fiji_display_configuration_changed_task(struct pp_hwmgr *hwmgr) + return fiji_program_display_gap(hwmgr); + } + ++static int fiji_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, ++ uint16_t us_max_fan_pwm) ++{ ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.usMaxFanPWM = us_max_fan_pwm; ++ ++ if (phm_is_hw_access_blocked(hwmgr)) ++ return 0; ++ ++ return smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, ++ PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm); ++} ++ ++static int fiji_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, ++ uint16_t us_max_fan_rpm) ++{ ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.usMaxFanRPM = us_max_fan_rpm; ++ ++ if (phm_is_hw_access_blocked(hwmgr)) ++ return 0; ++ ++ return smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, ++ PPSMC_MSG_SetFanRpmMax, us_max_fan_rpm); ++} ++ ++int fiji_dpm_set_interrupt_state(void *private_data, ++ unsigned src_id, unsigned type, ++ int enabled) ++{ ++ uint32_t cg_thermal_int; ++ struct pp_hwmgr *hwmgr = ((struct pp_eventmgr *)private_data)->hwmgr; ++ ++ if (hwmgr == NULL) ++ return -EINVAL; ++ ++ switch (type) { ++ case AMD_THERMAL_IRQ_LOW_TO_HIGH: ++ if (enabled) { ++ cg_thermal_int = cgs_read_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT); ++ cg_thermal_int |= CG_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK; ++ cgs_write_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT, cg_thermal_int); ++ } else { ++ cg_thermal_int = cgs_read_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT); ++ cg_thermal_int &= ~CG_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK; ++ cgs_write_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT, cg_thermal_int); ++ } ++ break; ++ ++ case AMD_THERMAL_IRQ_HIGH_TO_LOW: ++ if (enabled) { ++ cg_thermal_int = cgs_read_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT); ++ cg_thermal_int |= CG_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK; ++ cgs_write_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT, cg_thermal_int); ++ } else { ++ cg_thermal_int = cgs_read_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT); ++ cg_thermal_int &= ~CG_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK; ++ cgs_write_ind_register(hwmgr->device, ++ CGS_IND_REG__SMC, ixCG_THERMAL_INT, cg_thermal_int); ++ } ++ break; ++ default: ++ break; ++ } ++ return 0; ++} ++ ++int fiji_register_internal_thermal_interrupt(struct pp_hwmgr *hwmgr, ++ const void *thermal_interrupt_info) ++{ ++ int result; ++ const struct pp_interrupt_registration_info *info = ++ (const struct pp_interrupt_registration_info *) ++ thermal_interrupt_info; ++ ++ if (info == NULL) ++ return -EINVAL; ++ ++ result = cgs_add_irq_source(hwmgr->device, 230, AMD_THERMAL_IRQ_LAST, ++ fiji_dpm_set_interrupt_state, ++ info->call_back, info->context); ++ ++ if (result) ++ return -EINVAL; ++ ++ result = cgs_add_irq_source(hwmgr->device, 231, AMD_THERMAL_IRQ_LAST, ++ fiji_dpm_set_interrupt_state, ++ info->call_back, info->context); ++ ++ if (result) ++ return -EINVAL; ++ ++ return 0; ++} ++ + static const struct pp_hwmgr_func fiji_hwmgr_funcs = { + .backend_init = &fiji_hwmgr_backend_init, + .backend_fini = &tonga_hwmgr_backend_fini, +@@ -4936,6 +5066,18 @@ static const struct pp_hwmgr_func fiji_hwmgr_funcs = { + .notify_smc_display_config_after_ps_adjustment = + &tonga_notify_smc_display_config_after_ps_adjustment, + .display_config_changed = &fiji_display_configuration_changed_task, ++ .set_max_fan_pwm_output = fiji_set_max_fan_pwm_output, ++ .set_max_fan_rpm_output = fiji_set_max_fan_rpm_output, ++ .get_temperature = fiji_thermal_get_temperature, ++ .stop_thermal_controller = fiji_thermal_stop_thermal_controller, ++ .get_fan_speed_info = fiji_fan_ctrl_get_fan_speed_info, ++ .get_fan_speed_percent = fiji_fan_ctrl_get_fan_speed_percent, ++ .set_fan_speed_percent = fiji_fan_ctrl_set_fan_speed_percent, ++ .reset_fan_speed_to_default = fiji_fan_ctrl_reset_fan_speed_to_default, ++ .get_fan_speed_rpm = fiji_fan_ctrl_get_fan_speed_rpm, ++ .set_fan_speed_rpm = fiji_fan_ctrl_set_fan_speed_rpm, ++ .uninitialize_thermal_controller = fiji_thermal_ctrl_uninitialize_thermal_controller, ++ .register_internal_thermal_interrupt = fiji_register_internal_thermal_interrupt, + }; + + int fiji_hwmgr_init(struct pp_hwmgr *hwmgr) +@@ -4950,5 +5092,6 @@ int fiji_hwmgr_init(struct pp_hwmgr *hwmgr) + hwmgr->backend = data; + hwmgr->hwmgr_func = &fiji_hwmgr_funcs; + hwmgr->pptable_func = &tonga_pptable_funcs; ++ pp_fiji_thermal_initialize(hwmgr); + return ret; + } +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c +new file mode 100644 +index 0000000..1b2eaa9 +--- /dev/null ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c +@@ -0,0 +1,687 @@ ++/* ++ * Copyright 2015 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ */ ++ ++#include "fiji_thermal.h" ++#include "fiji_hwmgr.h" ++#include "fiji_smumgr.h" ++#include "fiji_ppsmc.h" ++#include "smu/smu_7_1_3_d.h" ++#include "smu/smu_7_1_3_sh_mask.h" ++ ++int fiji_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, ++ struct phm_fan_speed_info *fan_speed_info) ++{ ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan) ++ return 0; ++ ++ fan_speed_info->supports_percent_read = true; ++ fan_speed_info->supports_percent_write = true; ++ fan_speed_info->min_percent = 0; ++ fan_speed_info->max_percent = 100; ++ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_FanSpeedInTableIsRPM) && ++ hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution) { ++ fan_speed_info->supports_rpm_read = true; ++ fan_speed_info->supports_rpm_write = true; ++ fan_speed_info->min_rpm = hwmgr->thermal_controller.fanInfo.ulMinRPM; ++ fan_speed_info->max_rpm = hwmgr->thermal_controller.fanInfo.ulMaxRPM; ++ } else { ++ fan_speed_info->min_rpm = 0; ++ fan_speed_info->max_rpm = 0; ++ } ++ ++ return 0; ++} ++ ++int fiji_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr, ++ uint32_t *speed) ++{ ++ uint32_t duty100; ++ uint32_t duty; ++ uint64_t tmp64; ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan) ++ return 0; ++ ++ duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL1, FMAX_DUTY100); ++ duty = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_STATUS, FDO_PWM_DUTY); ++ ++ if (duty100 == 0) ++ return -EINVAL; ++ ++ ++ tmp64 = (uint64_t)duty * 100; ++ do_div(tmp64, duty100); ++ *speed = (uint32_t)tmp64; ++ ++ if (*speed > 100) ++ *speed = 100; ++ ++ return 0; ++} ++ ++int fiji_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed) ++{ ++ uint32_t tach_period; ++ uint32_t crystal_clock_freq; ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan || ++ (hwmgr->thermal_controller.fanInfo. ++ ucTachometerPulsesPerRevolution == 0)) ++ return 0; ++ ++ tach_period = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_TACH_STATUS, TACH_PERIOD); ++ ++ if (tach_period == 0) ++ return -EINVAL; ++ ++ crystal_clock_freq = tonga_get_xclk(hwmgr); ++ ++ *speed = 60 * crystal_clock_freq * 10000/ tach_period; ++ ++ return 0; ++} ++ ++/** ++* Set Fan Speed Control to static mode, so that the user can decide what speed to use. ++* @param hwmgr the address of the powerplay hardware manager. ++* mode the fan control mode, 0 default, 1 by percent, 5, by RPM ++* @exception Should always succeed. ++*/ ++int fiji_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) ++{ ++ ++ if (hwmgr->fan_ctrl_is_in_default_mode) { ++ hwmgr->fan_ctrl_default_mode = ++ PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, FDO_PWM_MODE); ++ hwmgr->tmin = ++ PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, TMIN); ++ hwmgr->fan_ctrl_is_in_default_mode = false; ++ } ++ ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, TMIN, 0); ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, FDO_PWM_MODE, mode); ++ ++ return 0; ++} ++ ++/** ++* Reset Fan Speed Control to default mode. ++* @param hwmgr the address of the powerplay hardware manager. ++* @exception Should always succeed. ++*/ ++int fiji_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) ++{ ++ if (hwmgr->fan_ctrl_is_in_default_mode) { ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, FDO_PWM_MODE, hwmgr->fan_ctrl_default_mode); ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, TMIN, hwmgr->tmin); ++ hwmgr->fan_ctrl_is_in_default_mode = true; ++ } ++ ++ return 0; ++} ++ ++int fiji_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) ++{ ++ int result; ++ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_ODFuzzyFanControlSupport)) { ++ cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_FUZZY); ++ result = smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_StartFanControl); ++ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_FanSpeedInTableIsRPM)) ++ hwmgr->hwmgr_func->set_max_fan_rpm_output(hwmgr, ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.usMaxFanRPM); ++ else ++ hwmgr->hwmgr_func->set_max_fan_pwm_output(hwmgr, ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.usMaxFanPWM); ++ ++ } else { ++ cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_TABLE); ++ result = smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_StartFanControl); ++ } ++ ++ if (!result && hwmgr->thermal_controller. ++ advanceFanControlParameters.ucTargetTemperature) ++ result = smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, ++ PPSMC_MSG_SetFanTemperatureTarget, ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.ucTargetTemperature); ++ ++ return result; ++} ++ ++ ++int fiji_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) ++{ ++ return smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_StopFanControl); ++} ++ ++/** ++* Set Fan Speed in percent. ++* @param hwmgr the address of the powerplay hardware manager. ++* @param speed is the percentage value (0% - 100%) to be set. ++* @exception Fails is the 100% setting appears to be 0. ++*/ ++int fiji_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr, ++ uint32_t speed) ++{ ++ uint32_t duty100; ++ uint32_t duty; ++ uint64_t tmp64; ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan) ++ return 0; ++ ++ if (speed > 100) ++ speed = 100; ++ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_MicrocodeFanControl)) ++ fiji_fan_ctrl_stop_smc_fan_control(hwmgr); ++ ++ duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL1, FMAX_DUTY100); ++ ++ if (duty100 == 0) ++ return -EINVAL; ++ ++ tmp64 = (uint64_t)speed * 100; ++ do_div(tmp64, duty100); ++ duty = (uint32_t)tmp64; ++ ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL0, FDO_STATIC_DUTY, duty); ++ ++ return fiji_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC); ++} ++ ++/** ++* Reset Fan Speed to default. ++* @param hwmgr the address of the powerplay hardware manager. ++* @exception Always succeeds. ++*/ ++int fiji_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) ++{ ++ int result; ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan) ++ return 0; ++ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_MicrocodeFanControl)) { ++ result = fiji_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC); ++ if (!result) ++ result = fiji_fan_ctrl_start_smc_fan_control(hwmgr); ++ } else ++ result = fiji_fan_ctrl_set_default_mode(hwmgr); ++ ++ return result; ++} ++ ++/** ++* Set Fan Speed in RPM. ++* @param hwmgr the address of the powerplay hardware manager. ++* @param speed is the percentage value (min - max) to be set. ++* @exception Fails is the speed not lie between min and max. ++*/ ++int fiji_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) ++{ ++ uint32_t tach_period; ++ uint32_t crystal_clock_freq; ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan || ++ (hwmgr->thermal_controller.fanInfo. ++ ucTachometerPulsesPerRevolution == 0) || ++ (speed < hwmgr->thermal_controller.fanInfo.ulMinRPM) || ++ (speed > hwmgr->thermal_controller.fanInfo.ulMaxRPM)) ++ return 0; ++ ++ crystal_clock_freq = tonga_get_xclk(hwmgr); ++ ++ tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed); ++ ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_TACH_STATUS, TACH_PERIOD, tach_period); ++ ++ return fiji_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC); ++} ++ ++/** ++* Reads the remote temperature from the SIslands thermal controller. ++* ++* @param hwmgr The address of the hardware manager. ++*/ ++int fiji_thermal_get_temperature(struct pp_hwmgr *hwmgr) ++{ ++ int temp; ++ ++ temp = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_MULT_THERMAL_STATUS, CTF_TEMP); ++ ++ /* Bit 9 means the reading is lower than the lowest usable value. */ ++ if (temp & 0x200) ++ temp = FIJI_THERMAL_MAXIMUM_TEMP_READING; ++ else ++ temp = temp & 0x1ff; ++ ++ temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES; ++ ++ return temp; ++} ++ ++/** ++* Set the requested temperature range for high and low alert signals ++* ++* @param hwmgr The address of the hardware manager. ++* @param range Temperature range to be programmed for high and low alert signals ++* @exception PP_Result_BadInput if the input data is not valid. ++*/ ++static int fiji_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, ++ uint32_t low_temp, uint32_t high_temp) ++{ ++ uint32_t low = FIJI_THERMAL_MINIMUM_ALERT_TEMP * ++ PP_TEMPERATURE_UNITS_PER_CENTIGRADES; ++ uint32_t high = FIJI_THERMAL_MAXIMUM_ALERT_TEMP * ++ PP_TEMPERATURE_UNITS_PER_CENTIGRADES; ++ ++ if (low < low_temp) ++ low = low_temp; ++ if (high > high_temp) ++ high = high_temp; ++ ++ if (low > high) ++ return -EINVAL; ++ ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_INT, DIG_THERM_INTH, ++ (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_INT, DIG_THERM_INTL, ++ (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_CTRL, DIG_THERM_DPM, ++ (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); ++ ++ return 0; ++} ++ ++/** ++* Programs thermal controller one-time setting registers ++* ++* @param hwmgr The address of the hardware manager. ++*/ ++static int fiji_thermal_initialize(struct pp_hwmgr *hwmgr) ++{ ++ if (hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution) ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_TACH_CTRL, EDGE_PER_REV, ++ hwmgr->thermal_controller.fanInfo. ++ ucTachometerPulsesPerRevolution - 1); ++ ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL2, TACH_PWM_RESP_RATE, 0x28); ++ ++ return 0; ++} ++ ++/** ++* Enable thermal alerts on the RV770 thermal controller. ++* ++* @param hwmgr The address of the hardware manager. ++*/ ++static int fiji_thermal_enable_alert(struct pp_hwmgr *hwmgr) ++{ ++ uint32_t alert; ++ ++ alert = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_INT, THERM_INT_MASK); ++ alert &= ~(FIJI_THERMAL_HIGH_ALERT_MASK | FIJI_THERMAL_LOW_ALERT_MASK); ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_INT, THERM_INT_MASK, alert); ++ ++ /* send message to SMU to enable internal thermal interrupts */ ++ return smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_Thermal_Cntl_Enable); ++} ++ ++/** ++* Disable thermal alerts on the RV770 thermal controller. ++* @param hwmgr The address of the hardware manager. ++*/ ++static int fiji_thermal_disable_alert(struct pp_hwmgr *hwmgr) ++{ ++ uint32_t alert; ++ ++ alert = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_INT, THERM_INT_MASK); ++ alert |= (FIJI_THERMAL_HIGH_ALERT_MASK | FIJI_THERMAL_LOW_ALERT_MASK); ++ PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_THERMAL_INT, THERM_INT_MASK, alert); ++ ++ /* send message to SMU to disable internal thermal interrupts */ ++ return smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_Thermal_Cntl_Disable); ++} ++ ++/** ++* Uninitialize the thermal controller. ++* Currently just disables alerts. ++* @param hwmgr The address of the hardware manager. ++*/ ++int fiji_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr) ++{ ++ int result = fiji_thermal_disable_alert(hwmgr); ++ ++ if (hwmgr->thermal_controller.fanInfo.bNoFan) ++ fiji_fan_ctrl_set_default_mode(hwmgr); ++ ++ return result; ++} ++ ++/** ++* Set up the fan table to control the fan using the SMC. ++* @param hwmgr the address of the powerplay hardware manager. ++* @param pInput the pointer to input data ++* @param pOutput the pointer to output data ++* @param pStorage the pointer to temporary storage ++* @param Result the last failure code ++* @return result from set temperature range routine ++*/ ++int tf_fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr, ++ void *input, void *output, void *storage, int result) ++{ ++ struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend); ++ SMU73_Discrete_FanTable fan_table = { FDO_MODE_HARDWARE }; ++ uint32_t duty100; ++ uint32_t t_diff1, t_diff2, pwm_diff1, pwm_diff2; ++ uint16_t fdo_min, slope1, slope2; ++ uint32_t reference_clock; ++ int res; ++ uint64_t tmp64; ++ ++ if (data->fan_table_start == 0) { ++ phm_cap_unset(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_MicrocodeFanControl); ++ return 0; ++ } ++ ++ duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, ++ CG_FDO_CTRL1, FMAX_DUTY100); ++ ++ if (duty100 == 0) { ++ phm_cap_unset(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_MicrocodeFanControl); ++ return 0; ++ } ++ ++ tmp64 = hwmgr->thermal_controller.advanceFanControlParameters. ++ usPWMMin * duty100; ++ do_div(tmp64, 10000); ++ fdo_min = (uint16_t)tmp64; ++ ++ t_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usTMed - ++ hwmgr->thermal_controller.advanceFanControlParameters.usTMin; ++ t_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usTHigh - ++ hwmgr->thermal_controller.advanceFanControlParameters.usTMed; ++ ++ pwm_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed - ++ hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin; ++ pwm_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMHigh - ++ hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed; ++ ++ slope1 = (uint16_t)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100); ++ slope2 = (uint16_t)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100); ++ ++ fan_table.TempMin = cpu_to_be16((50 + hwmgr-> ++ thermal_controller.advanceFanControlParameters.usTMin) / 100); ++ fan_table.TempMed = cpu_to_be16((50 + hwmgr-> ++ thermal_controller.advanceFanControlParameters.usTMed) / 100); ++ fan_table.TempMax = cpu_to_be16((50 + hwmgr-> ++ thermal_controller.advanceFanControlParameters.usTMax) / 100); ++ ++ fan_table.Slope1 = cpu_to_be16(slope1); ++ fan_table.Slope2 = cpu_to_be16(slope2); ++ ++ fan_table.FdoMin = cpu_to_be16(fdo_min); ++ ++ fan_table.HystDown = cpu_to_be16(hwmgr-> ++ thermal_controller.advanceFanControlParameters.ucTHyst); ++ ++ fan_table.HystUp = cpu_to_be16(1); ++ ++ fan_table.HystSlope = cpu_to_be16(1); ++ ++ fan_table.TempRespLim = cpu_to_be16(5); ++ ++ reference_clock = tonga_get_xclk(hwmgr); ++ ++ fan_table.RefreshPeriod = cpu_to_be32((hwmgr-> ++ thermal_controller.advanceFanControlParameters.ulCycleDelay * ++ reference_clock) / 1600); ++ ++ fan_table.FdoMax = cpu_to_be16((uint16_t)duty100); ++ ++ fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD( ++ hwmgr->device, CGS_IND_REG__SMC, ++ CG_MULT_THERMAL_CTRL, TEMP_SEL); ++ ++ res = fiji_copy_bytes_to_smc(hwmgr->smumgr, data->fan_table_start, ++ (uint8_t *)&fan_table, (uint32_t)sizeof(fan_table), ++ data->sram_end); ++ ++ if (!res && hwmgr->thermal_controller. ++ advanceFanControlParameters.ucMinimumPWMLimit) ++ res = smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, ++ PPSMC_MSG_SetFanMinPwm, ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.ucMinimumPWMLimit); ++ ++ if (!res && hwmgr->thermal_controller. ++ advanceFanControlParameters.ulMinFanSCLKAcousticLimit) ++ res = smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, ++ PPSMC_MSG_SetFanSclkTarget, ++ hwmgr->thermal_controller. ++ advanceFanControlParameters.ulMinFanSCLKAcousticLimit); ++ ++ if (res) ++ phm_cap_unset(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_MicrocodeFanControl); ++ ++ return 0; ++} ++ ++/** ++* Start the fan control on the SMC. ++* @param hwmgr the address of the powerplay hardware manager. ++* @param pInput the pointer to input data ++* @param pOutput the pointer to output data ++* @param pStorage the pointer to temporary storage ++* @param Result the last failure code ++* @return result from set temperature range routine ++*/ ++int tf_fiji_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr, ++ void *input, void *output, void *storage, int result) ++{ ++/* If the fantable setup has failed we could have disabled ++ * PHM_PlatformCaps_MicrocodeFanControl even after ++ * this function was included in the table. ++ * Make sure that we still think controlling the fan is OK. ++*/ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_MicrocodeFanControl)) { ++ fiji_fan_ctrl_start_smc_fan_control(hwmgr); ++ fiji_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC); ++ } ++ ++ return 0; ++} ++ ++/** ++* Set temperature range for high and low alerts ++* @param hwmgr the address of the powerplay hardware manager. ++* @param pInput the pointer to input data ++* @param pOutput the pointer to output data ++* @param pStorage the pointer to temporary storage ++* @param Result the last failure code ++* @return result from set temperature range routine ++*/ ++int tf_fiji_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, ++ void *input, void *output, void *storage, int result) ++{ ++ struct PP_TemperatureRange *range = (struct PP_TemperatureRange *)input; ++ ++ if (range == NULL) ++ return -EINVAL; ++ ++ return fiji_thermal_set_temperature_range(hwmgr, range->min, range->max); ++} ++ ++/** ++* Programs one-time setting registers ++* @param hwmgr the address of the powerplay hardware manager. ++* @param pInput the pointer to input data ++* @param pOutput the pointer to output data ++* @param pStorage the pointer to temporary storage ++* @param Result the last failure code ++* @return result from initialize thermal controller routine ++*/ ++int tf_fiji_thermal_initialize(struct pp_hwmgr *hwmgr, ++ void *input, void *output, void *storage, int result) ++{ ++ return fiji_thermal_initialize(hwmgr); ++} ++ ++/** ++* Enable high and low alerts ++* @param hwmgr the address of the powerplay hardware manager. ++* @param pInput the pointer to input data ++* @param pOutput the pointer to output data ++* @param pStorage the pointer to temporary storage ++* @param Result the last failure code ++* @return result from enable alert routine ++*/ ++int tf_fiji_thermal_enable_alert(struct pp_hwmgr *hwmgr, ++ void *input, void *output, void *storage, int result) ++{ ++ return fiji_thermal_enable_alert(hwmgr); ++} ++ ++/** ++* Disable high and low alerts ++* @param hwmgr the address of the powerplay hardware manager. ++* @param pInput the pointer to input data ++* @param pOutput the pointer to output data ++* @param pStorage the pointer to temporary storage ++* @param Result the last failure code ++* @return result from disable alert routine ++*/ ++static int tf_fiji_thermal_disable_alert(struct pp_hwmgr *hwmgr, ++ void *input, void *output, void *storage, int result) ++{ ++ return fiji_thermal_disable_alert(hwmgr); ++} ++ ++static struct phm_master_table_item ++fiji_thermal_start_thermal_controller_master_list[] = { ++ {NULL, tf_fiji_thermal_initialize}, ++ {NULL, tf_fiji_thermal_set_temperature_range}, ++ {NULL, tf_fiji_thermal_enable_alert}, ++/* We should restrict performance levels to low before we halt the SMC. ++ * On the other hand we are still in boot state when we do this ++ * so it would be pointless. ++ * If this assumption changes we have to revisit this table. ++ */ ++ {NULL, tf_fiji_thermal_setup_fan_table}, ++ {NULL, tf_fiji_thermal_start_smc_fan_control}, ++ {NULL, NULL} ++}; ++ ++static struct phm_master_table_header ++fiji_thermal_start_thermal_controller_master = { ++ 0, ++ PHM_MasterTableFlag_None, ++ fiji_thermal_start_thermal_controller_master_list ++}; ++ ++static struct phm_master_table_item ++fiji_thermal_set_temperature_range_master_list[] = { ++ {NULL, tf_fiji_thermal_disable_alert}, ++ {NULL, tf_fiji_thermal_set_temperature_range}, ++ {NULL, tf_fiji_thermal_enable_alert}, ++ {NULL, NULL} ++}; ++ ++struct phm_master_table_header ++fiji_thermal_set_temperature_range_master = { ++ 0, ++ PHM_MasterTableFlag_None, ++ fiji_thermal_set_temperature_range_master_list ++}; ++ ++int fiji_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr) ++{ ++ if (!hwmgr->thermal_controller.fanInfo.bNoFan) ++ fiji_fan_ctrl_set_default_mode(hwmgr); ++ return 0; ++} ++ ++/** ++* Initializes the thermal controller related functions in the Hardware Manager structure. ++* @param hwmgr The address of the hardware manager. ++* @exception Any error code from the low-level communication. ++*/ ++int pp_fiji_thermal_initialize(struct pp_hwmgr *hwmgr) ++{ ++ int result; ++ ++ result = phm_construct_table(hwmgr, ++ &fiji_thermal_set_temperature_range_master, ++ &(hwmgr->set_temperature_range)); ++ ++ if (!result) { ++ result = phm_construct_table(hwmgr, ++ &fiji_thermal_start_thermal_controller_master, ++ &(hwmgr->start_thermal_controller)); ++ if (result) ++ phm_destroy_table(hwmgr, &(hwmgr->set_temperature_range)); ++ } ++ ++ if (!result) ++ hwmgr->fan_ctrl_is_in_default_mode = true; ++ return result; ++} ++ +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.h b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.h +new file mode 100644 +index 0000000..c3ee552 +--- /dev/null ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.h +@@ -0,0 +1,61 @@ ++/* ++ * Copyright 2015 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ */ ++ ++#ifndef FIJI_THERMAL_H ++#define FIJI_THERMAL_H ++ ++#include "hwmgr.h" ++ ++#define FIJI_THERMAL_HIGH_ALERT_MASK 0x1 ++#define FIJI_THERMAL_LOW_ALERT_MASK 0x2 ++ ++#define FIJI_THERMAL_MINIMUM_TEMP_READING -256 ++#define FIJI_THERMAL_MAXIMUM_TEMP_READING 255 ++ ++#define FIJI_THERMAL_MINIMUM_ALERT_TEMP 0 ++#define FIJI_THERMAL_MAXIMUM_ALERT_TEMP 255 ++ ++#define FDO_PWM_MODE_STATIC 1 ++#define FDO_PWM_MODE_STATIC_RPM 5 ++ ++ ++extern int tf_fiji_thermal_initialize(struct pp_hwmgr *hwmgr, void *input, void *output, void *storage, int result); ++extern int tf_fiji_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, void *input, void *output, void *storage, int result); ++extern int tf_fiji_thermal_enable_alert(struct pp_hwmgr *hwmgr, void *input, void *output, void *storage, int result); ++ ++extern int fiji_thermal_get_temperature(struct pp_hwmgr *hwmgr); ++extern int fiji_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr); ++extern int fiji_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, struct phm_fan_speed_info *fan_speed_info); ++extern int fiji_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr, uint32_t *speed); ++extern int fiji_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr); ++extern int fiji_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode); ++extern int fiji_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr, uint32_t speed); ++extern int fiji_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr); ++extern int pp_fiji_thermal_initialize(struct pp_hwmgr *hwmgr); ++extern int fiji_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr); ++extern int fiji_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed); ++extern int fiji_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed); ++extern uint32_t tonga_get_xclk(struct pp_hwmgr *hwmgr); ++ ++#endif ++ +-- +2.7.4 + |