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-rw-r--r--common/recipes-kernel/linux/files/0114-drm-amd-powerplay-add-display-configeration-changed-.patch120
1 files changed, 0 insertions, 120 deletions
diff --git a/common/recipes-kernel/linux/files/0114-drm-amd-powerplay-add-display-configeration-changed-.patch b/common/recipes-kernel/linux/files/0114-drm-amd-powerplay-add-display-configeration-changed-.patch
deleted file mode 100644
index 077acb42..00000000
--- a/common/recipes-kernel/linux/files/0114-drm-amd-powerplay-add-display-configeration-changed-.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 139780b3c235ec7f94b5cc22d65f7340b85027e4 Mon Sep 17 00:00:00 2001
-From: Eric Huang <JinHuiEric.Huang@amd.com>
-Date: Tue, 24 Nov 2015 17:00:56 -0500
-Subject: [PATCH 0114/1110] drm/amd/powerplay: add display configeration
- changed function in hwmgr for Fiji.
-
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
----
- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 66 ++++++++++++++++++++++++
- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h | 2 +
- 2 files changed, 68 insertions(+)
-
-diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
-index b616e16..00d2e17 100644
---- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
-+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
-@@ -3434,6 +3434,10 @@ static int fiji_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
- PP_ASSERT_WITH_CODE((0 == tmp_result),
- "Failed to enable VR hot GPIO interrupt!", result = tmp_result);
-
-+ tmp_result = tonga_notify_smc_display_change(hwmgr, false);
-+ PP_ASSERT_WITH_CODE((0 == tmp_result),
-+ "Failed to notify no display!", result = tmp_result);
-+
- tmp_result = fiji_enable_sclk_control(hwmgr);
- PP_ASSERT_WITH_CODE((0 == tmp_result),
- "Failed to enable SCLK control!", result = tmp_result);
-@@ -4852,6 +4856,65 @@ static void fiji_print_current_perforce_level(
- mclk / 100, sclk / 100);
- }
-
-+static int fiji_program_display_gap(struct pp_hwmgr *hwmgr)
-+{
-+ struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
-+ uint32_t num_active_displays = 0;
-+ uint32_t display_gap = cgs_read_ind_register(hwmgr->device,
-+ CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL);
-+ uint32_t display_gap2;
-+ uint32_t pre_vbi_time_in_us;
-+ uint32_t frame_time_in_us;
-+ uint32_t ref_clock;
-+ uint32_t refresh_rate = 0;
-+ struct cgs_display_info info = {0};
-+ struct cgs_mode_info mode_info;
-+
-+ info.mode_info = &mode_info;
-+
-+ cgs_get_active_displays_info(hwmgr->device, &info);
-+ num_active_displays = info.display_count;
-+
-+ display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL,
-+ DISP_GAP, (num_active_displays > 0)?
-+ DISPLAY_GAP_VBLANK_OR_WM : DISPLAY_GAP_IGNORE);
-+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
-+ ixCG_DISPLAY_GAP_CNTL, display_gap);
-+
-+ ref_clock = mode_info.ref_clock;
-+ refresh_rate = mode_info.refresh_rate;
-+
-+ if (refresh_rate == 0)
-+ refresh_rate = 60;
-+
-+ frame_time_in_us = 1000000 / refresh_rate;
-+
-+ pre_vbi_time_in_us = frame_time_in_us - 200 - mode_info.vblank_time_us;
-+ display_gap2 = pre_vbi_time_in_us * (ref_clock / 100);
-+
-+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
-+ ixCG_DISPLAY_GAP_CNTL2, display_gap2);
-+
-+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
-+ data->soft_regs_start +
-+ offsetof(SMU73_SoftRegisters, PreVBlankGap), 0x64);
-+
-+ cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
-+ data->soft_regs_start +
-+ offsetof(SMU73_SoftRegisters, VBlankTimeout),
-+ (frame_time_in_us - pre_vbi_time_in_us));
-+
-+ if (num_active_displays == 1)
-+ tonga_notify_smc_display_change(hwmgr, true);
-+
-+ return 0;
-+}
-+
-+int fiji_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
-+{
-+ return fiji_program_display_gap(hwmgr);
-+}
-+
- static const struct pp_hwmgr_func fiji_hwmgr_funcs = {
- .backend_init = &fiji_hwmgr_backend_init,
- .backend_fini = &tonga_hwmgr_backend_fini,
-@@ -4870,6 +4933,9 @@ static const struct pp_hwmgr_func fiji_hwmgr_funcs = {
- .powergate_uvd = &fiji_phm_powergate_uvd,
- .powergate_vce = &fiji_phm_powergate_vce,
- .disable_clock_power_gating = &fiji_phm_disable_clock_power_gating,
-+ .notify_smc_display_config_after_ps_adjustment =
-+ &tonga_notify_smc_display_config_after_ps_adjustment,
-+ .display_config_changed = &fiji_display_configuration_changed_task,
- };
-
- int fiji_hwmgr_init(struct pp_hwmgr *hwmgr)
-diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
-index cd1e88a..22e273b 100644
---- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
-+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
-@@ -339,6 +339,8 @@ enum Fiji_I2CLineID {
- extern int tonga_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr);
- extern int tonga_hwmgr_backend_fini(struct pp_hwmgr *hwmgr);
- extern int tonga_get_mc_microcode_version (struct pp_hwmgr *hwmgr);
-+extern int tonga_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr);
-+extern int tonga_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display);
- int fiji_update_vce_dpm(struct pp_hwmgr *hwmgr, const void *input);
- int fiji_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate);
- int fiji_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate);
---
-2.7.4
-