diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0096-drm-amd-powerplay-add-atomctrl-function-to-calculate.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0096-drm-amd-powerplay-add-atomctrl-function-to-calculate.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0096-drm-amd-powerplay-add-atomctrl-function-to-calculate.patch b/common/recipes-kernel/linux/files/0096-drm-amd-powerplay-add-atomctrl-function-to-calculate.patch new file mode 100644 index 00000000..3e86599a --- /dev/null +++ b/common/recipes-kernel/linux/files/0096-drm-amd-powerplay-add-atomctrl-function-to-calculate.patch @@ -0,0 +1,64 @@ +From 37c74865dbe1f7606bcb7c4152410c814dce89d7 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Fri, 13 Nov 2015 22:00:01 -0500 +Subject: [PATCH 0096/1110] drm/amd/powerplay: add atomctrl function to + calculate CZ sclk dividers + +Use atombios to calculate the values. + +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 22 ++++++++++++++++++++++ + drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h | 3 +++ + 2 files changed, 25 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c +index 8b47ea0..ea87c90 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c +@@ -313,6 +313,28 @@ int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr, + return result; + } + ++int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr, ++ uint32_t clock_value, ++ pp_atomctrl_clock_dividers_kong *dividers) ++{ ++ COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 pll_parameters; ++ int result; ++ ++ pll_parameters.ulClock = clock_value; ++ ++ result = cgs_atom_exec_cmd_table ++ (hwmgr->device, ++ GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL), ++ &pll_parameters); ++ ++ if (0 == result) { ++ dividers->pll_post_divider = pll_parameters.ucPostDiv; ++ dividers->real_clock = pll_parameters.ulClock; ++ } ++ ++ return result; ++} ++ + int atomctrl_get_engine_pll_dividers_vi( + struct pp_hwmgr *hwmgr, + uint32_t clock_value, +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h +index b5ba371..627420b 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h +@@ -233,6 +233,9 @@ extern bool atomctrl_is_voltage_controled_by_gpio_v3(struct pp_hwmgr *hwmgr, uin + extern int atomctrl_get_voltage_table_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table); + extern int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr, + uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param); ++extern int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr, ++ uint32_t clock_value, ++ pp_atomctrl_clock_dividers_kong *dividers); + extern int atomctrl_read_efuse(void *device, uint16_t start_index, + uint16_t end_index, uint32_t mask, uint32_t *efuse); + extern int atomctrl_calculate_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type, +-- +2.7.4 + |