diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0010-drm-amd-add-new-gfx8-register-definitions-for-EDC.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0010-drm-amd-add-new-gfx8-register-definitions-for-EDC.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0010-drm-amd-add-new-gfx8-register-definitions-for-EDC.patch b/common/recipes-kernel/linux/files/0010-drm-amd-add-new-gfx8-register-definitions-for-EDC.patch new file mode 100644 index 00000000..08e1c034 --- /dev/null +++ b/common/recipes-kernel/linux/files/0010-drm-amd-add-new-gfx8-register-definitions-for-EDC.patch @@ -0,0 +1,42 @@ +From c8fb90402ca0bec0886137b3bbd0d4b646d9f00b Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Tue, 24 Nov 2015 17:42:02 -0500 +Subject: [PATCH 0010/1110] drm/amd: add new gfx8 register definitions for EDC +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +EDC is a RAS feature for on chip memory. + +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h +index daf763b..a9b6923 100644 +--- a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h ++++ b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h +@@ -2807,5 +2807,18 @@ + #define ixDIDT_DBR_WEIGHT0_3 0x90 + #define ixDIDT_DBR_WEIGHT4_7 0x91 + #define ixDIDT_DBR_WEIGHT8_11 0x92 ++#define mmTD_EDC_CNT 0x252e ++#define mmCPF_EDC_TAG_CNT 0x3188 ++#define mmCPF_EDC_ROQ_CNT 0x3189 ++#define mmCPF_EDC_ATC_CNT 0x318a ++#define mmCPG_EDC_TAG_CNT 0x318b ++#define mmCPG_EDC_ATC_CNT 0x318c ++#define mmCPG_EDC_DMA_CNT 0x318d ++#define mmCPC_EDC_SCRATCH_CNT 0x318e ++#define mmCPC_EDC_UCODE_CNT 0x318f ++#define mmCPC_EDC_ATC_CNT 0x3190 ++#define mmDC_EDC_STATE_CNT 0x3191 ++#define mmDC_EDC_CSINVOC_CNT 0x3192 ++#define mmDC_EDC_RESTORE_CNT 0x3193 + + #endif /* GFX_8_0_D_H */ +-- +2.7.4 + |