diff options
Diffstat (limited to 'common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-09-20-crypto-ccp-support-ccp-hwrng-feature.patch')
-rw-r--r-- | common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-09-20-crypto-ccp-support-ccp-hwrng-feature.patch | 85 |
1 files changed, 0 insertions, 85 deletions
diff --git a/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-09-20-crypto-ccp-support-ccp-hwrng-feature.patch b/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-09-20-crypto-ccp-support-ccp-hwrng-feature.patch deleted file mode 100644 index 2e8fe8c4..00000000 --- a/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-09-20-crypto-ccp-support-ccp-hwrng-feature.patch +++ /dev/null @@ -1,85 +0,0 @@ -From patchwork Fri Mar 9 08:35:09 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [dpdk-dev,v4,09/20] crypto/ccp: support ccp hwrng feature -From: Ravi Kumar <ravi1.kumar@amd.com> -X-Patchwork-Id: 35808 -X-Patchwork-Delegate: pablo.de.lara.guarch@intel.com -Message-Id: <1520584520-130522-9-git-send-email-Ravi1.kumar@amd.com> -List-Id: dev.dpdk.org -To: dev@dpdk.org -Cc: pablo.de.lara.guarch@intel.com -Date: Fri, 9 Mar 2018 03:35:09 -0500 - -Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com> ---- - drivers/crypto/ccp/ccp_dev.c | 20 ++++++++++++++++++++ - drivers/crypto/ccp/ccp_dev.h | 11 +++++++++++ - 2 files changed, 31 insertions(+) - -diff --git a/drivers/crypto/ccp/ccp_dev.c b/drivers/crypto/ccp/ccp_dev.c -index fee90e3..d8c0ab4 100644 ---- a/drivers/crypto/ccp/ccp_dev.c -+++ b/drivers/crypto/ccp/ccp_dev.c -@@ -88,6 +88,26 @@ ccp_allot_queue(struct rte_cryptodev *cdev, int slot_req) - return NULL; - } - -+int -+ccp_read_hwrng(uint32_t *value) -+{ -+ struct ccp_device *dev; -+ -+ TAILQ_FOREACH(dev, &ccp_list, next) { -+ void *vaddr = (void *)(dev->pci.mem_resource[2].addr); -+ -+ while (dev->hwrng_retries++ < CCP_MAX_TRNG_RETRIES) { -+ *value = CCP_READ_REG(vaddr, TRNG_OUT_REG); -+ if (*value) { -+ dev->hwrng_retries = 0; -+ return 0; -+ } -+ } -+ dev->hwrng_retries = 0; -+ } -+ return -1; -+} -+ - static const struct rte_memzone * - ccp_queue_dma_zone_reserve(const char *queue_name, - uint32_t queue_size, -diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h -index cfb3b03..a5c9ef3 100644 ---- a/drivers/crypto/ccp/ccp_dev.h -+++ b/drivers/crypto/ccp/ccp_dev.h -@@ -47,6 +47,7 @@ - - /**< CCP sspecific */ - #define MAX_HW_QUEUES 5 -+#define CCP_MAX_TRNG_RETRIES 10 - - /**< CCP Register Mappings */ - #define Q_MASK_REG 0x000 -@@ -223,6 +224,8 @@ struct ccp_device { - /**< protection for shared lsb region allocation */ - int qidx; - /**< current queue index */ -+ int hwrng_retries; -+ /**< retry counter for CCP TRNG */ - } __rte_cache_aligned; - - /**< CCP H/W engine related */ -@@ -454,4 +457,12 @@ int ccp_probe_devices(const struct rte_pci_id *ccp_id); - */ - struct ccp_queue *ccp_allot_queue(struct rte_cryptodev *dev, int slot_req); - -+/** -+ * read hwrng value -+ * -+ * @param trng_value data pointer to write RNG value -+ * @return 0 on success otherwise -1 -+ */ -+int ccp_read_hwrng(uint32_t *trng_value); -+ - #endif /* _CCP_DEV_H_ */ |