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Diffstat (limited to 'common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-04-20-crypto-ccp-support-session-related-crypto-pmd-ops.patch')
-rw-r--r--common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-04-20-crypto-ccp-support-session-related-crypto-pmd-ops.patch782
1 files changed, 0 insertions, 782 deletions
diff --git a/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-04-20-crypto-ccp-support-session-related-crypto-pmd-ops.patch b/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-04-20-crypto-ccp-support-session-related-crypto-pmd-ops.patch
deleted file mode 100644
index 4cac48af..00000000
--- a/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v4-04-20-crypto-ccp-support-session-related-crypto-pmd-ops.patch
+++ /dev/null
@@ -1,782 +0,0 @@
-From patchwork Fri Mar 9 08:35:04 2018
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [dpdk-dev, v4,
- 04/20] crypto/ccp: support session related crypto pmd ops
-From: Ravi Kumar <ravi1.kumar@amd.com>
-X-Patchwork-Id: 35803
-X-Patchwork-Delegate: pablo.de.lara.guarch@intel.com
-Message-Id: <1520584520-130522-4-git-send-email-Ravi1.kumar@amd.com>
-List-Id: dev.dpdk.org
-To: dev@dpdk.org
-Cc: pablo.de.lara.guarch@intel.com
-Date: Fri, 9 Mar 2018 03:35:04 -0500
-
-Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
----
- drivers/crypto/ccp/Makefile | 3 +-
- drivers/crypto/ccp/ccp_crypto.c | 229 +++++++++++++++++++++++++++++++++
- drivers/crypto/ccp/ccp_crypto.h | 267 +++++++++++++++++++++++++++++++++++++++
- drivers/crypto/ccp/ccp_dev.h | 129 +++++++++++++++++++
- drivers/crypto/ccp/ccp_pmd_ops.c | 61 ++++++++-
- 5 files changed, 685 insertions(+), 4 deletions(-)
- create mode 100644 drivers/crypto/ccp/ccp_crypto.c
- create mode 100644 drivers/crypto/ccp/ccp_crypto.h
-
-diff --git a/drivers/crypto/ccp/Makefile b/drivers/crypto/ccp/Makefile
-index 5e58c31..5241465 100644
---- a/drivers/crypto/ccp/Makefile
-+++ b/drivers/crypto/ccp/Makefile
-@@ -51,8 +51,9 @@ EXPORT_MAP := rte_pmd_ccp_version.map
-
- # library source files
- SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += rte_ccp_pmd.c
--SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp_pmd_ops.c
-+SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp_crypto.c
- SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp_dev.c
- SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp_pci.c
-+SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp_pmd_ops.c
-
- include $(RTE_SDK)/mk/rte.lib.mk
-diff --git a/drivers/crypto/ccp/ccp_crypto.c b/drivers/crypto/ccp/ccp_crypto.c
-new file mode 100644
-index 0000000..c365c0f
---- /dev/null
-+++ b/drivers/crypto/ccp/ccp_crypto.c
-@@ -0,0 +1,229 @@
-+/*-
-+ * Copyright(c) 2018 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions
-+ * are met:
-+ *
-+ * * Redistributions of source code must retain the above copyright
-+ * notice, this list of conditions and the following disclaimer.
-+ * * Redistributions in binary form must reproduce the above copyright
-+ * notice, this list of conditions and the following disclaimer in the
-+ * documentation and/or other materials provided with the distribution.
-+ * * Neither the name of the copyright holder nor the names of its
-+ * contributors may be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <dirent.h>
-+#include <fcntl.h>
-+#include <stdio.h>
-+#include <string.h>
-+#include <sys/mman.h>
-+#include <sys/queue.h>
-+#include <sys/types.h>
-+#include <unistd.h>
-+
-+#include <rte_hexdump.h>
-+#include <rte_memzone.h>
-+#include <rte_malloc.h>
-+#include <rte_memory.h>
-+#include <rte_spinlock.h>
-+#include <rte_string_fns.h>
-+#include <rte_cryptodev_pmd.h>
-+
-+#include "ccp_dev.h"
-+#include "ccp_crypto.h"
-+#include "ccp_pci.h"
-+#include "ccp_pmd_private.h"
-+
-+static enum ccp_cmd_order
-+ccp_get_cmd_id(const struct rte_crypto_sym_xform *xform)
-+{
-+ enum ccp_cmd_order res = CCP_CMD_NOT_SUPPORTED;
-+
-+ if (xform == NULL)
-+ return res;
-+ if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
-+ if (xform->next == NULL)
-+ return CCP_CMD_AUTH;
-+ else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
-+ return CCP_CMD_HASH_CIPHER;
-+ }
-+ if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
-+ if (xform->next == NULL)
-+ return CCP_CMD_CIPHER;
-+ else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
-+ return CCP_CMD_CIPHER_HASH;
-+ }
-+ if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD)
-+ return CCP_CMD_COMBINED;
-+ return res;
-+}
-+
-+/* configure session */
-+static int
-+ccp_configure_session_cipher(struct ccp_session *sess,
-+ const struct rte_crypto_sym_xform *xform)
-+{
-+ const struct rte_crypto_cipher_xform *cipher_xform = NULL;
-+
-+ cipher_xform = &xform->cipher;
-+
-+ /* set cipher direction */
-+ if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
-+ sess->cipher.dir = CCP_CIPHER_DIR_ENCRYPT;
-+ else
-+ sess->cipher.dir = CCP_CIPHER_DIR_DECRYPT;
-+
-+ /* set cipher key */
-+ sess->cipher.key_length = cipher_xform->key.length;
-+ rte_memcpy(sess->cipher.key, cipher_xform->key.data,
-+ cipher_xform->key.length);
-+
-+ /* set iv parameters */
-+ sess->iv.offset = cipher_xform->iv.offset;
-+ sess->iv.length = cipher_xform->iv.length;
-+
-+ switch (cipher_xform->algo) {
-+ default:
-+ CCP_LOG_ERR("Unsupported cipher algo");
-+ return -1;
-+ }
-+
-+
-+ switch (sess->cipher.engine) {
-+ default:
-+ CCP_LOG_ERR("Invalid CCP Engine");
-+ return -ENOTSUP;
-+ }
-+ return 0;
-+}
-+
-+static int
-+ccp_configure_session_auth(struct ccp_session *sess,
-+ const struct rte_crypto_sym_xform *xform)
-+{
-+ const struct rte_crypto_auth_xform *auth_xform = NULL;
-+
-+ auth_xform = &xform->auth;
-+
-+ sess->auth.digest_length = auth_xform->digest_length;
-+ if (auth_xform->op == RTE_CRYPTO_AUTH_OP_GENERATE)
-+ sess->auth.op = CCP_AUTH_OP_GENERATE;
-+ else
-+ sess->auth.op = CCP_AUTH_OP_VERIFY;
-+ switch (auth_xform->algo) {
-+ default:
-+ CCP_LOG_ERR("Unsupported hash algo");
-+ return -ENOTSUP;
-+ }
-+ return 0;
-+}
-+
-+static int
-+ccp_configure_session_aead(struct ccp_session *sess,
-+ const struct rte_crypto_sym_xform *xform)
-+{
-+ const struct rte_crypto_aead_xform *aead_xform = NULL;
-+
-+ aead_xform = &xform->aead;
-+
-+ sess->cipher.key_length = aead_xform->key.length;
-+ rte_memcpy(sess->cipher.key, aead_xform->key.data,
-+ aead_xform->key.length);
-+
-+ if (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) {
-+ sess->cipher.dir = CCP_CIPHER_DIR_ENCRYPT;
-+ sess->auth.op = CCP_AUTH_OP_GENERATE;
-+ } else {
-+ sess->cipher.dir = CCP_CIPHER_DIR_DECRYPT;
-+ sess->auth.op = CCP_AUTH_OP_VERIFY;
-+ }
-+ sess->auth.aad_length = aead_xform->aad_length;
-+ sess->auth.digest_length = aead_xform->digest_length;
-+
-+ /* set iv parameters */
-+ sess->iv.offset = aead_xform->iv.offset;
-+ sess->iv.length = aead_xform->iv.length;
-+
-+ switch (aead_xform->algo) {
-+ default:
-+ CCP_LOG_ERR("Unsupported aead algo");
-+ return -ENOTSUP;
-+ }
-+ return 0;
-+}
-+
-+int
-+ccp_set_session_parameters(struct ccp_session *sess,
-+ const struct rte_crypto_sym_xform *xform)
-+{
-+ const struct rte_crypto_sym_xform *cipher_xform = NULL;
-+ const struct rte_crypto_sym_xform *auth_xform = NULL;
-+ const struct rte_crypto_sym_xform *aead_xform = NULL;
-+ int ret = 0;
-+
-+ sess->cmd_id = ccp_get_cmd_id(xform);
-+
-+ switch (sess->cmd_id) {
-+ case CCP_CMD_CIPHER:
-+ cipher_xform = xform;
-+ break;
-+ case CCP_CMD_AUTH:
-+ auth_xform = xform;
-+ break;
-+ case CCP_CMD_CIPHER_HASH:
-+ cipher_xform = xform;
-+ auth_xform = xform->next;
-+ break;
-+ case CCP_CMD_HASH_CIPHER:
-+ auth_xform = xform;
-+ cipher_xform = xform->next;
-+ break;
-+ case CCP_CMD_COMBINED:
-+ aead_xform = xform;
-+ break;
-+ default:
-+ CCP_LOG_ERR("Unsupported cmd_id");
-+ return -1;
-+ }
-+
-+ /* Default IV length = 0 */
-+ sess->iv.length = 0;
-+ if (cipher_xform) {
-+ ret = ccp_configure_session_cipher(sess, cipher_xform);
-+ if (ret != 0) {
-+ CCP_LOG_ERR("Invalid/unsupported cipher parameters");
-+ return ret;
-+ }
-+ }
-+ if (auth_xform) {
-+ ret = ccp_configure_session_auth(sess, auth_xform);
-+ if (ret != 0) {
-+ CCP_LOG_ERR("Invalid/unsupported auth parameters");
-+ return ret;
-+ }
-+ }
-+ if (aead_xform) {
-+ ret = ccp_configure_session_aead(sess, aead_xform);
-+ if (ret != 0) {
-+ CCP_LOG_ERR("Invalid/unsupported aead parameters");
-+ return ret;
-+ }
-+ }
-+ return ret;
-+}
-diff --git a/drivers/crypto/ccp/ccp_crypto.h b/drivers/crypto/ccp/ccp_crypto.h
-new file mode 100644
-index 0000000..346d5ee
---- /dev/null
-+++ b/drivers/crypto/ccp/ccp_crypto.h
-@@ -0,0 +1,267 @@
-+/*-
-+ * Copyright(c) 2018 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions
-+ * are met:
-+ *
-+ * * Redistributions of source code must retain the above copyright
-+ * notice, this list of conditions and the following disclaimer.
-+ * * Redistributions in binary form must reproduce the above copyright
-+ * notice, this list of conditions and the following disclaimer in the
-+ * documentation and/or other materials provided with the distribution.
-+ * * Neither the name of the copyright holder nor the names of its
-+ * contributors may be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#ifndef _CCP_CRYPTO_H_
-+#define _CCP_CRYPTO_H_
-+
-+#include <limits.h>
-+#include <stdbool.h>
-+#include <stdint.h>
-+#include <string.h>
-+
-+#include <rte_atomic.h>
-+#include <rte_byteorder.h>
-+#include <rte_io.h>
-+#include <rte_pci.h>
-+#include <rte_spinlock.h>
-+#include <rte_crypto_sym.h>
-+#include <rte_cryptodev.h>
-+
-+#include "ccp_dev.h"
-+
-+#define CCP_SHA3_CTX_SIZE 200
-+/**
-+ * CCP supported AES modes
-+ */
-+enum ccp_aes_mode {
-+ CCP_AES_MODE_ECB = 0,
-+ CCP_AES_MODE_CBC,
-+ CCP_AES_MODE_OFB,
-+ CCP_AES_MODE_CFB,
-+ CCP_AES_MODE_CTR,
-+ CCP_AES_MODE_CMAC,
-+ CCP_AES_MODE_GHASH,
-+ CCP_AES_MODE_GCTR,
-+ CCP_AES_MODE__LAST,
-+};
-+
-+/**
-+ * CCP AES GHASH mode
-+ */
-+enum ccp_aes_ghash_mode {
-+ CCP_AES_MODE_GHASH_AAD = 0,
-+ CCP_AES_MODE_GHASH_FINAL
-+};
-+
-+/**
-+ * CCP supported AES types
-+ */
-+enum ccp_aes_type {
-+ CCP_AES_TYPE_128 = 0,
-+ CCP_AES_TYPE_192,
-+ CCP_AES_TYPE_256,
-+ CCP_AES_TYPE__LAST,
-+};
-+
-+/***** 3DES engine *****/
-+
-+/**
-+ * CCP supported DES/3DES modes
-+ */
-+enum ccp_des_mode {
-+ CCP_DES_MODE_ECB = 0, /* Not supported */
-+ CCP_DES_MODE_CBC,
-+ CCP_DES_MODE_CFB,
-+};
-+
-+/**
-+ * CCP supported DES types
-+ */
-+enum ccp_des_type {
-+ CCP_DES_TYPE_128 = 0, /* 112 + 16 parity */
-+ CCP_DES_TYPE_192, /* 168 + 24 parity */
-+ CCP_DES_TYPE__LAST,
-+};
-+
-+/***** SHA engine *****/
-+
-+/**
-+ * ccp_sha_type - type of SHA operation
-+ *
-+ * @CCP_SHA_TYPE_1: SHA-1 operation
-+ * @CCP_SHA_TYPE_224: SHA-224 operation
-+ * @CCP_SHA_TYPE_256: SHA-256 operation
-+ */
-+enum ccp_sha_type {
-+ CCP_SHA_TYPE_1 = 1,
-+ CCP_SHA_TYPE_224,
-+ CCP_SHA_TYPE_256,
-+ CCP_SHA_TYPE_384,
-+ CCP_SHA_TYPE_512,
-+ CCP_SHA_TYPE_RSVD1,
-+ CCP_SHA_TYPE_RSVD2,
-+ CCP_SHA3_TYPE_224,
-+ CCP_SHA3_TYPE_256,
-+ CCP_SHA3_TYPE_384,
-+ CCP_SHA3_TYPE_512,
-+ CCP_SHA_TYPE__LAST,
-+};
-+
-+/**
-+ * CCP supported cipher algorithms
-+ */
-+enum ccp_cipher_algo {
-+ CCP_CIPHER_ALGO_AES_CBC = 0,
-+ CCP_CIPHER_ALGO_AES_ECB,
-+ CCP_CIPHER_ALGO_AES_CTR,
-+ CCP_CIPHER_ALGO_AES_GCM,
-+ CCP_CIPHER_ALGO_3DES_CBC,
-+};
-+
-+/**
-+ * CCP cipher operation type
-+ */
-+enum ccp_cipher_dir {
-+ CCP_CIPHER_DIR_DECRYPT = 0,
-+ CCP_CIPHER_DIR_ENCRYPT = 1,
-+};
-+
-+/**
-+ * CCP supported hash algorithms
-+ */
-+enum ccp_hash_algo {
-+ CCP_AUTH_ALGO_SHA1 = 0,
-+ CCP_AUTH_ALGO_SHA1_HMAC,
-+ CCP_AUTH_ALGO_SHA224,
-+ CCP_AUTH_ALGO_SHA224_HMAC,
-+ CCP_AUTH_ALGO_SHA3_224,
-+ CCP_AUTH_ALGO_SHA3_224_HMAC,
-+ CCP_AUTH_ALGO_SHA256,
-+ CCP_AUTH_ALGO_SHA256_HMAC,
-+ CCP_AUTH_ALGO_SHA3_256,
-+ CCP_AUTH_ALGO_SHA3_256_HMAC,
-+ CCP_AUTH_ALGO_SHA384,
-+ CCP_AUTH_ALGO_SHA384_HMAC,
-+ CCP_AUTH_ALGO_SHA3_384,
-+ CCP_AUTH_ALGO_SHA3_384_HMAC,
-+ CCP_AUTH_ALGO_SHA512,
-+ CCP_AUTH_ALGO_SHA512_HMAC,
-+ CCP_AUTH_ALGO_SHA3_512,
-+ CCP_AUTH_ALGO_SHA3_512_HMAC,
-+ CCP_AUTH_ALGO_AES_CMAC,
-+ CCP_AUTH_ALGO_AES_GCM,
-+#ifdef RTE_LIBRTE_PMD_CCP_CPU_AUTH
-+ CCP_AUTH_ALGO_MD5_HMAC,
-+#endif
-+};
-+
-+/**
-+ * CCP hash operation type
-+ */
-+enum ccp_hash_op {
-+ CCP_AUTH_OP_GENERATE = 0,
-+ CCP_AUTH_OP_VERIFY = 1,
-+};
-+
-+/* CCP crypto private session structure */
-+struct ccp_session {
-+ enum ccp_cmd_order cmd_id;
-+ /**< chain order mode */
-+ struct {
-+ uint16_t length;
-+ uint16_t offset;
-+ } iv;
-+ /**< IV parameters */
-+ struct {
-+ enum ccp_cipher_algo algo;
-+ enum ccp_engine engine;
-+ union {
-+ enum ccp_aes_mode aes_mode;
-+ enum ccp_des_mode des_mode;
-+ } um;
-+ union {
-+ enum ccp_aes_type aes_type;
-+ enum ccp_des_type des_type;
-+ } ut;
-+ enum ccp_cipher_dir dir;
-+ uint64_t key_length;
-+ /**< max cipher key size 256 bits */
-+ uint8_t key[32];
-+ /**ccp key format*/
-+ uint8_t key_ccp[32];
-+ phys_addr_t key_phys;
-+ /**AES-ctr nonce(4) iv(8) ctr*/
-+ uint8_t nonce[32];
-+ phys_addr_t nonce_phys;
-+ } cipher;
-+ /**< Cipher Parameters */
-+
-+ struct {
-+ enum ccp_hash_algo algo;
-+ enum ccp_engine engine;
-+ union {
-+ enum ccp_aes_mode aes_mode;
-+ } um;
-+ union {
-+ enum ccp_sha_type sha_type;
-+ enum ccp_aes_type aes_type;
-+ } ut;
-+ enum ccp_hash_op op;
-+ uint64_t key_length;
-+ /**< max hash key size 144 bytes (struct capabilties) */
-+ uint8_t key[144];
-+ /**< max be key size of AES is 32*/
-+ uint8_t key_ccp[32];
-+ phys_addr_t key_phys;
-+ uint64_t digest_length;
-+ void *ctx;
-+ int ctx_len;
-+ int offset;
-+ int block_size;
-+ /**< Buffer to store Software generated precomute values*/
-+ /**< For HMAC H(ipad ^ key) and H(opad ^ key) */
-+ /**< For CMAC K1 IV and K2 IV*/
-+ uint8_t pre_compute[2 * CCP_SHA3_CTX_SIZE];
-+ /**< SHA3 initial ctx all zeros*/
-+ uint8_t sha3_ctx[200];
-+ int aad_length;
-+ } auth;
-+ /**< Authentication Parameters */
-+ enum rte_crypto_aead_algorithm aead_algo;
-+ /**< AEAD Algorithm */
-+
-+ uint32_t reserved;
-+} __rte_cache_aligned;
-+
-+extern uint8_t ccp_cryptodev_driver_id;
-+
-+struct ccp_qp;
-+
-+/**
-+ * Set and validate CCP crypto session parameters
-+ *
-+ * @param sess ccp private session
-+ * @param xform crypto xform for this session
-+ * @return 0 on success otherwise -1
-+ */
-+int ccp_set_session_parameters(struct ccp_session *sess,
-+ const struct rte_crypto_sym_xform *xform);
-+
-+#endif /* _CCP_CRYPTO_H_ */
-diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h
-index b321530..a16ba81 100644
---- a/drivers/crypto/ccp/ccp_dev.h
-+++ b/drivers/crypto/ccp/ccp_dev.h
-@@ -225,6 +225,123 @@ struct ccp_device {
- /**< current queue index */
- } __rte_cache_aligned;
-
-+/**< CCP H/W engine related */
-+/**
-+ * ccp_engine - CCP operation identifiers
-+ *
-+ * @CCP_ENGINE_AES: AES operation
-+ * @CCP_ENGINE_XTS_AES: 128-bit XTS AES operation
-+ * @CCP_ENGINE_3DES: DES/3DES operation
-+ * @CCP_ENGINE_SHA: SHA operation
-+ * @CCP_ENGINE_RSA: RSA operation
-+ * @CCP_ENGINE_PASSTHRU: pass-through operation
-+ * @CCP_ENGINE_ZLIB_DECOMPRESS: unused
-+ * @CCP_ENGINE_ECC: ECC operation
-+ */
-+enum ccp_engine {
-+ CCP_ENGINE_AES = 0,
-+ CCP_ENGINE_XTS_AES_128,
-+ CCP_ENGINE_3DES,
-+ CCP_ENGINE_SHA,
-+ CCP_ENGINE_RSA,
-+ CCP_ENGINE_PASSTHRU,
-+ CCP_ENGINE_ZLIB_DECOMPRESS,
-+ CCP_ENGINE_ECC,
-+ CCP_ENGINE__LAST,
-+};
-+
-+/* Passthru engine */
-+/**
-+ * ccp_passthru_bitwise - type of bitwise passthru operation
-+ *
-+ * @CCP_PASSTHRU_BITWISE_NOOP: no bitwise operation performed
-+ * @CCP_PASSTHRU_BITWISE_AND: perform bitwise AND of src with mask
-+ * @CCP_PASSTHRU_BITWISE_OR: perform bitwise OR of src with mask
-+ * @CCP_PASSTHRU_BITWISE_XOR: perform bitwise XOR of src with mask
-+ * @CCP_PASSTHRU_BITWISE_MASK: overwrite with mask
-+ */
-+enum ccp_passthru_bitwise {
-+ CCP_PASSTHRU_BITWISE_NOOP = 0,
-+ CCP_PASSTHRU_BITWISE_AND,
-+ CCP_PASSTHRU_BITWISE_OR,
-+ CCP_PASSTHRU_BITWISE_XOR,
-+ CCP_PASSTHRU_BITWISE_MASK,
-+ CCP_PASSTHRU_BITWISE__LAST,
-+};
-+
-+/**
-+ * ccp_passthru_byteswap - type of byteswap passthru operation
-+ *
-+ * @CCP_PASSTHRU_BYTESWAP_NOOP: no byte swapping performed
-+ * @CCP_PASSTHRU_BYTESWAP_32BIT: swap bytes within 32-bit words
-+ * @CCP_PASSTHRU_BYTESWAP_256BIT: swap bytes within 256-bit words
-+ */
-+enum ccp_passthru_byteswap {
-+ CCP_PASSTHRU_BYTESWAP_NOOP = 0,
-+ CCP_PASSTHRU_BYTESWAP_32BIT,
-+ CCP_PASSTHRU_BYTESWAP_256BIT,
-+ CCP_PASSTHRU_BYTESWAP__LAST,
-+};
-+
-+/**
-+ * CCP passthru
-+ */
-+struct ccp_passthru {
-+ phys_addr_t src_addr;
-+ phys_addr_t dest_addr;
-+ enum ccp_passthru_bitwise bit_mod;
-+ enum ccp_passthru_byteswap byte_swap;
-+ int len;
-+ int dir;
-+};
-+
-+/* CCP version 5: Union to define the function field (cmd_reg1/dword0) */
-+union ccp_function {
-+ struct {
-+ uint16_t size:7;
-+ uint16_t encrypt:1;
-+ uint16_t mode:5;
-+ uint16_t type:2;
-+ } aes;
-+ struct {
-+ uint16_t size:7;
-+ uint16_t encrypt:1;
-+ uint16_t mode:5;
-+ uint16_t type:2;
-+ } des;
-+ struct {
-+ uint16_t size:7;
-+ uint16_t encrypt:1;
-+ uint16_t rsvd:5;
-+ uint16_t type:2;
-+ } aes_xts;
-+ struct {
-+ uint16_t rsvd1:10;
-+ uint16_t type:4;
-+ uint16_t rsvd2:1;
-+ } sha;
-+ struct {
-+ uint16_t mode:3;
-+ uint16_t size:12;
-+ } rsa;
-+ struct {
-+ uint16_t byteswap:2;
-+ uint16_t bitwise:3;
-+ uint16_t reflect:2;
-+ uint16_t rsvd:8;
-+ } pt;
-+ struct {
-+ uint16_t rsvd:13;
-+ } zlib;
-+ struct {
-+ uint16_t size:10;
-+ uint16_t type:2;
-+ uint16_t mode:3;
-+ } ecc;
-+ uint16_t raw;
-+};
-+
-+
- /**
- * descriptor for version 5 CPP commands
- * 8 32-bit words:
-@@ -291,6 +408,18 @@ struct ccp_desc {
- struct dword7 dw7;
- };
-
-+/**
-+ * cmd id to follow order
-+ */
-+enum ccp_cmd_order {
-+ CCP_CMD_CIPHER = 0,
-+ CCP_CMD_AUTH,
-+ CCP_CMD_CIPHER_HASH,
-+ CCP_CMD_HASH_CIPHER,
-+ CCP_CMD_COMBINED,
-+ CCP_CMD_NOT_SUPPORTED,
-+};
-+
- static inline uint32_t
- low32_value(unsigned long addr)
- {
-diff --git a/drivers/crypto/ccp/ccp_pmd_ops.c b/drivers/crypto/ccp/ccp_pmd_ops.c
-index b6f8c48..ad0a670 100644
---- a/drivers/crypto/ccp/ccp_pmd_ops.c
-+++ b/drivers/crypto/ccp/ccp_pmd_ops.c
-@@ -36,6 +36,7 @@
-
- #include "ccp_pmd_private.h"
- #include "ccp_dev.h"
-+#include "ccp_crypto.h"
-
- static const struct rte_cryptodev_capabilities ccp_pmd_capabilities[] = {
- RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
-@@ -81,6 +82,60 @@ ccp_pmd_info_get(struct rte_cryptodev *dev,
- }
- }
-
-+static unsigned
-+ccp_pmd_session_get_size(struct rte_cryptodev *dev __rte_unused)
-+{
-+ return sizeof(struct ccp_session);
-+}
-+
-+static int
-+ccp_pmd_session_configure(struct rte_cryptodev *dev,
-+ struct rte_crypto_sym_xform *xform,
-+ struct rte_cryptodev_sym_session *sess,
-+ struct rte_mempool *mempool)
-+{
-+ int ret;
-+ void *sess_private_data;
-+
-+ if (unlikely(sess == NULL || xform == NULL)) {
-+ CCP_LOG_ERR("Invalid session struct or xform");
-+ return -ENOMEM;
-+ }
-+
-+ if (rte_mempool_get(mempool, &sess_private_data)) {
-+ CCP_LOG_ERR("Couldn't get object from session mempool");
-+ return -ENOMEM;
-+ }
-+ ret = ccp_set_session_parameters(sess_private_data, xform);
-+ if (ret != 0) {
-+ CCP_LOG_ERR("failed configure session parameters");
-+
-+ /* Return session to mempool */
-+ rte_mempool_put(mempool, sess_private_data);
-+ return ret;
-+ }
-+ set_session_private_data(sess, dev->driver_id,
-+ sess_private_data);
-+
-+ return 0;
-+}
-+
-+static void
-+ccp_pmd_session_clear(struct rte_cryptodev *dev,
-+ struct rte_cryptodev_sym_session *sess)
-+{
-+ uint8_t index = dev->driver_id;
-+ void *sess_priv = get_session_private_data(sess, index);
-+
-+ if (sess_priv) {
-+ struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
-+
-+ rte_mempool_put(sess_mp, sess_priv);
-+ memset(sess_priv, 0, sizeof(struct ccp_session));
-+ set_session_private_data(sess, index, NULL);
-+ }
-+}
-+
- struct rte_cryptodev_ops ccp_ops = {
- .dev_configure = ccp_pmd_config,
- .dev_start = ccp_pmd_start,
-@@ -98,9 +153,9 @@ struct rte_cryptodev_ops ccp_ops = {
- .queue_pair_stop = NULL,
- .queue_pair_count = NULL,
-
-- .session_get_size = NULL,
-- .session_configure = NULL,
-- .session_clear = NULL,
-+ .session_get_size = ccp_pmd_session_get_size,
-+ .session_configure = ccp_pmd_session_configure,
-+ .session_clear = ccp_pmd_session_clear,
- };
-
- struct rte_cryptodev_ops *ccp_pmd_ops = &ccp_ops;
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-19 19:15:44 +0000