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authorAdrian Calianu <adrian.calianu@enea.com>2016-02-16 09:44:13 +0100
committerDrew Moseley <drew_moseley@mentor.com>2016-02-16 13:36:54 -0500
commitad47267e7a8f7fc5304d29cf3391ca3a25a32898 (patch)
tree699b6e70c7f971b7f0f1f75ceaf6efc23c815f2f /meta-seattle
parent68a05190c0167c1b2bcda8066ccf86242b90975c (diff)
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Linux BSP for AMD's Seattle
BSP layer for the AMD Opteron A1100-Series features AMDs first 64-bit ARM-based processor, codenamed "Seattle". This BSP is based on Yocto kernel 3.19 and 4.1.2. The former one is used for booting with UEFI BigEndian support while the later is used for LitleEndian(default on ARM) boot. There are two machines defined, one for each endianess mode. BSP was tested on Seattle B0 version target. Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
Diffstat (limited to 'meta-seattle')
-rw-r--r--meta-seattle/COPYING.MIT17
-rw-r--r--meta-seattle/README114
-rw-r--r--meta-seattle/conf/layer.conf7
-rw-r--r--meta-seattle/conf/machine/seattle-be.conf6
-rw-r--r--meta-seattle/conf/machine/seattle.conf5
-rw-r--r--meta-seattle/conf/machine/seattle.inc22
-rw-r--r--meta-seattle/recipes-kernel/linux/files/01-arm64-boot-BE-kernels-from-UEFI.patch999
-rw-r--r--meta-seattle/recipes-kernel/linux/files/02-319-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch49
-rw-r--r--meta-seattle/recipes-kernel/linux/files/02-412-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch48
-rw-r--r--meta-seattle/recipes-kernel/linux/files/03-arm64-don-t-set-READ_IMPLIES_EXEC-for-EM_AARCH64-ELF.patch55
-rw-r--r--meta-seattle/recipes-kernel/linux/files/319-Update-xgbe-drivers-for-B0-board.patch3560
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-1-styx-linux-tracking.git-2a3f98071e81b66033f6272f6c632023d1dcb1d2.patch350
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-2-styx-linux-tracking.git-390adff766de2d7117ec666674d114dfd5b5a911.patch92
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-3-styx-linux-tracking.git-427c918b150e5f9c25ea36b3d640e511a08abb5f.patch213
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-4-styx-linux-tracking.git-d1072e3d950aa6e348313a31395091003611f794.patch54
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-5-styx-linux-tracking.git-2a80b31ff435cd274a61d685a4861bf0da461c90.patch388
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-6-styx-linux-tracking.git-1c9b07fb461d87b41854fef3a07fff65e0d95113.patch163
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-7-styx-linux-tracking.git-f9a9d954f23b967cd26338afda9a0a96afe62c25.patch422
-rw-r--r--meta-seattle/recipes-kernel/linux/files/412-styx-Fix-build-issues-after-porting-PCI-patches-to-4.1.2-.patch110
-rw-r--r--meta-seattle/recipes-kernel/linux/files/bigendian.cfg1
-rw-r--r--meta-seattle/recipes-kernel/linux/files/defconfig4874
-rw-r--r--meta-seattle/recipes-kernel/linux/linux-seattle.inc21
-rw-r--r--meta-seattle/recipes-kernel/linux/linux-seattle_3.19.bb18
-rw-r--r--meta-seattle/recipes-kernel/linux/linux-seattle_4.1.bb19
24 files changed, 11607 insertions, 0 deletions
diff --git a/meta-seattle/COPYING.MIT b/meta-seattle/COPYING.MIT
new file mode 100644
index 00000000..fb950dc6
--- /dev/null
+++ b/meta-seattle/COPYING.MIT
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
diff --git a/meta-seattle/README b/meta-seattle/README
new file mode 100644
index 00000000..0454cd58
--- /dev/null
+++ b/meta-seattle/README
@@ -0,0 +1,114 @@
+meta-seattle
+============
+
+This is the location for AMD Seattle maintained BSP.
+
+
+Overview of AMD 64-bit ARM-based processor
+------------------------------------------
+
+The AMD Opteron A1100-Series features AMDs first 64-bit ARM-based processor, codenamed "Seattle".
+
+
+Yocto Project Compatible
+========================
+
+This BSP is compatible with the Yocto Project as per the requirements
+listed here:
+
+ https://www.yoctoproject.org/webform/yocto-project-compatible-registration
+
+Dependencies
+============
+
+This layer depends on:
+
+ URI: git://git.openembedded.org/bitbake
+ branch: master
+
+ URI: git://git.openembedded.org/openembedded-core
+ layers: meta
+ branch: master
+
+Patches
+=======
+
+Please submit any patches against this BSP to the maintainer and cc
+the meta-amd mailing list (meta-amd@yoctoproject.org):
+
+Maintainer: Adrian Calianu <adrian.calianu@enea.com>
+
+
+Table of Contents
+=================
+
+ I. Building the meta-seattle BSP layer
+ II. Booting the images
+III. How to Run 32-bit Applications on aarch64
+ IV. Limitations
+
+
+I. Building the meta-seattle BSP layer
+=======================================
+
+The following instructions require a Poky installation (or equivalent).
+
+Initialize a build using the 'oe-init-build-env' script in Poky.
+ $ source oe-init-build-env <build_dir>
+
+Once initialized configure bblayers.conf by adding the 'meta-seattle' layer. e.g.:
+
+ BBLAYERS ?= " \
+ <path to layer>/oe-core/meta \
+ <path to layer>/meta-amd/meta-seattle \
+ "
+
+To build a specific target BSP configure the associated machine in local.conf.
+There are two machines defined in order to offer support for Little Endian ("seattle",
+default machine) and Big Endian ("seattle-be").
+
+ MACHINE ?= "seattle"
+
+Build the target file system image using bitbake:
+
+ $ bitbake core-image-minimal
+
+Once complete the images for the target machine will be available in the output
+directory 'tmp/deploy/images'.
+
+
+II. Booting the images
+=====================================
+
+Booting the images using UEFI firmware
+
+At power-on, the UEFI firmware starts a UEFI bootloader which looks up the EFI
+System Partition (ESP) for a script named startup.nsh.
+If the script specifies an executable file in the ESP, that file is executed
+as a UEFI application.
+
+If no UEFI application can be started, or if the boot process is interrupted
+by ESC, the EFI Shell is started with prompt "Shell>". Here you can execute
+shell commands or UEFI applications interactively.
+
+A UEFI application can be e.g. a Linux kernel built with an EFI stub. By executing
+the EFI-stubbed kernel as an application with arguments, you can control
+how to boot Linux, and which rootfs to use.
+
+Boot existing Linux images or install HDD on a different machine,
+mount EFI partition and copy kernel image under this partition.
+
+Boot Linux images from UEFI shell with rootfs in RAM
+Before that, copy rootfs under EFI partition(FAT).
+
+Shell> FS0:\Image initrd=\core-image-minimal.ext2.gz root=/dev/ram0 rw
+ console=ttyAMA0,115200n8 ramdisk_size=524280
+
+Boot Linux images from UEFI shell with rootfs on a HDD ext2/3/4 partition.
+Before that, install rootfs under a /dev/sda<X> ext2/3/4 formated partition.
+
+Shell> FS0:\Image root=/dev/sda<X> rw console=ttyAMA0,115200n8
+
+References:
+1) https://www.kernel.org/doc/Documentation/efi-stub.txt
+2) http://www.uefi.org/specifications
diff --git a/meta-seattle/conf/layer.conf b/meta-seattle/conf/layer.conf
new file mode 100644
index 00000000..65eb2c55
--- /dev/null
+++ b/meta-seattle/conf/layer.conf
@@ -0,0 +1,7 @@
+BBPATH .= ":${LAYERDIR}"
+
+BBFILES += "${LAYERDIR}/recipes-*/*/*.bb*"
+
+BBFILE_COLLECTIONS += "seattle"
+BBFILE_PATTERN_seattle := "^${LAYERDIR}/"
+BBFILE_PRIORITY_seattle = "14"
diff --git a/meta-seattle/conf/machine/seattle-be.conf b/meta-seattle/conf/machine/seattle-be.conf
new file mode 100644
index 00000000..a2b15b14
--- /dev/null
+++ b/meta-seattle/conf/machine/seattle-be.conf
@@ -0,0 +1,6 @@
+DEFAULTTUNE ?= "aarch64_be"
+TRANSLATED_TARGET_ARCH = "aarch64-be"
+
+require conf/machine/seattle.inc
+
+PREFERRED_VERSION_linux-seattle = "3.19%"
diff --git a/meta-seattle/conf/machine/seattle.conf b/meta-seattle/conf/machine/seattle.conf
new file mode 100644
index 00000000..c4ed756a
--- /dev/null
+++ b/meta-seattle/conf/machine/seattle.conf
@@ -0,0 +1,5 @@
+DEFAULTTUNE ?= "aarch64"
+
+require conf/machine/seattle.inc
+
+PREFERRED_VERSION_linux-seattle = "4.1%"
diff --git a/meta-seattle/conf/machine/seattle.inc b/meta-seattle/conf/machine/seattle.inc
new file mode 100644
index 00000000..404888e7
--- /dev/null
+++ b/meta-seattle/conf/machine/seattle.inc
@@ -0,0 +1,22 @@
+#@TYPE: Machine
+#@NAME: AMD Seattle
+#@DESCRIPTION: ARMv8 Cortex-A57
+
+require conf/machine/include/arm/arch-armv8.inc
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-seattle"
+
+MACHINE_FEATURES = "pci ext2 ext3 serial"
+
+RDEPENDS_kernel-base = "kernel-image"
+
+KERNEL_IMAGETYPE = "Image"
+
+SERIAL_CONSOLES = "115200;ttyAMA0"
+
+IMAGE_FSTYPES += "ext2.gz tar.gz"
+
+# we do not want to have getty running since we do not have a
+# graphical display attached and therefore do not need virtual
+# terminal functionality
+USE_VT = "0"
diff --git a/meta-seattle/recipes-kernel/linux/files/01-arm64-boot-BE-kernels-from-UEFI.patch b/meta-seattle/recipes-kernel/linux/files/01-arm64-boot-BE-kernels-from-UEFI.patch
new file mode 100644
index 00000000..35b25249
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/01-arm64-boot-BE-kernels-from-UEFI.patch
@@ -0,0 +1,999 @@
+From c55fa726d3e67da11a7ccd16ca367e9094265e4e Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Mon, 16 Feb 2015 13:56:36 +0100
+Subject: [PATCH 1/1] arm64: boot BE kernels from UEFI
+
+Adds support for booting BE kernels from UEFI. As UEFI is defined to
+be strictly little endian, some workarounds are required to combine a little
+endian EFI stub with a big endian kernel. Also, runtime services need to be
+wrapped so they can be executed in little endian mode.
+
+Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+
+This patch is the resulting of porting on 3.19 kernel of a patch set
+([RFC PATCH 00/10] arm64: boot BE kernels from UEFI) provided by
+Ard Biesheuvel ard.biesheuvel at linaro.org for 3.17 kernel.
+
+http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/274208.html
+
+Upstream-Status: Pending
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ arch/arm64/Kconfig | 10 ++-
+ arch/arm64/include/asm/assembler.h | 18 +++++
+ arch/arm64/include/asm/efi.h | 2 +
+ arch/arm64/kernel/Makefile | 7 +-
+ arch/arm64/kernel/efi-be-call.S | 55 +++++++++++++++
+ arch/arm64/kernel/efi-be-runtime.c | 104 ++++++++++++++++++++++++++++
+ arch/arm64/kernel/efi-entry.S | 43 +++++++++---
+ arch/arm64/kernel/efi-stub.c | 10 +--
+ arch/arm64/kernel/efi.c | 64 ++++++++++-------
+ arch/arm64/kernel/efistub-le/Makefile | 52 ++++++++++++++
+ arch/arm64/kernel/efistub-le/efi-le-entry.S | 12 ++++
+ arch/arm64/kernel/efistub-le/efistub-le.lds | 35 ++++++++++
+ arch/arm64/kernel/efistub-le/le.h | 12 ++++
+ arch/arm64/kernel/efistub-le/strstr.c | 20 ++++++
+ arch/arm64/kernel/head.S | 48 +++++++------
+ arch/arm64/kernel/image.h | 16 ++++-
+ drivers/firmware/efi/efi.c | 26 ++++---
+ drivers/firmware/efi/efivars.c | 2 +-
+ drivers/firmware/efi/libstub/fdt.c | 4 ++
+ 19 files changed, 459 insertions(+), 81 deletions(-)
+ create mode 100644 arch/arm64/kernel/efi-be-call.S
+ create mode 100644 arch/arm64/kernel/efi-be-runtime.c
+ create mode 100644 arch/arm64/kernel/efistub-le/Makefile
+ create mode 100644 arch/arm64/kernel/efistub-le/efi-le-entry.S
+ create mode 100644 arch/arm64/kernel/efistub-le/efistub-le.lds
+ create mode 100644 arch/arm64/kernel/efistub-le/le.h
+ create mode 100644 arch/arm64/kernel/efistub-le/strstr.c
+
+diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
+index 3f08727..d35a06c 100644
+--- a/arch/arm64/Kconfig
++++ b/arch/arm64/Kconfig
+@@ -573,16 +573,20 @@ config CMDLINE_FORCE
+ config EFI_STUB
+ bool
+
++config EFI_LE_STUB
++ bool
++
+ config EFI
+ bool "UEFI runtime support"
+- depends on OF && !CPU_BIG_ENDIAN
++ depends on OF
+ select LIBFDT
+ select UCS2_STRING
+ select EFI_PARAMS_FROM_FDT
+ select EFI_RUNTIME_WRAPPERS
+- select EFI_STUB
++ select EFI_STUB if !CPU_BIG_ENDIAN
++ select EFI_LE_STUB if CPU_BIG_ENDIAN
+ select EFI_ARMSTUB
+- default y
++ default y if !CPU_BIG_ENDIAN
+ help
+ This option provides support for runtime services provided
+ by UEFI firmware (such as non-volatile variables, realtime
+diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
+index 5901480..ad3aa92 100644
+--- a/arch/arm64/include/asm/assembler.h
++++ b/arch/arm64/include/asm/assembler.h
+@@ -155,3 +155,21 @@ lr .req x30 // link register
+ #endif
+ orr \rd, \lbits, \hbits, lsl #32
+ .endm
++
++ /*
++ * Define LE constants
++ */
++ .macro le16, x
++ .byte \x & 0xff
++ .byte (\x >> 8) & 0xff
++ .endm
++
++ .macro le32, x
++ le16 \x
++ le16 \x >> 16
++ .endm
++
++ .macro le64, x
++ le32 \x
++ le32 \x >> 32
++ .endm
+diff --git a/arch/arm64/include/asm/efi.h b/arch/arm64/include/asm/efi.h
+index a34fd3b..44e642b 100644
+--- a/arch/arm64/include/asm/efi.h
++++ b/arch/arm64/include/asm/efi.h
+@@ -44,4 +44,6 @@ extern void efi_idmap_init(void);
+
+ #define efi_call_early(f, ...) sys_table_arg->boottime->f(__VA_ARGS__)
+
++extern void efi_be_runtime_setup(void);
++
+ #endif /* _ASM_EFI_H */
+diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
+index 79bdd3b..1ab3ff4 100644
+--- a/arch/arm64/kernel/Makefile
++++ b/arch/arm64/kernel/Makefile
+@@ -32,7 +32,12 @@ arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
+ arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
+ arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
+ arm64-obj-$(CONFIG_KGDB) += kgdb.o
+-arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
++arm64-efi-obj-y := efi.o
++arm64-efi-obj-$(CONFIG_EFI_STUB) += efi-stub.o efi-entry.o
++arm64-efi-obj-$(CONFIG_EFI_LE_STUB) += efistub-le/
++arm64-efi-obj-$(CONFIG_CPU_BIG_ENDIAN) += efi-be-runtime.o efi-be-call.o
++arm64-obj-$(CONFIG_EFI) += $(arm64-efi-obj-y)
++
+ arm64-obj-$(CONFIG_PCI) += pci.o
+ arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
+ arm64-obj-$(CONFIG_ACPI) += acpi.o
+diff --git a/arch/arm64/kernel/efi-be-call.S b/arch/arm64/kernel/efi-be-call.S
+new file mode 100644
+index 0000000..b395c8c
+--- /dev/null
++++ b/arch/arm64/kernel/efi-be-call.S
+@@ -0,0 +1,55 @@
++
++#include <linux/linkage.h>
++
++ .text
++ .align 3
++ENTRY(efi_be_phys_call)
++ /*
++ * Entered at physical address with 1:1 mapping enabled.
++ */
++ stp x29, x30, [sp, #-96]!
++ mov x29, sp
++ str x27, [sp, #16]
++
++ ldr x8, =efi_be_phys_call // virt address of this function
++ adr x9, efi_be_phys_call // phys address of this function
++ sub x9, x8, x9 // calculate virt to phys offset in x9
++
++ /* preserve all inputs */
++ stp x0, x1, [sp, #32]
++ stp x2, x3, [sp, #48]
++ stp x4, x5, [sp, #64]
++ stp x6, x7, [sp, #80]
++
++ /* get phys address of stack */
++ sub sp, sp, x9
++
++ /* switch to LE, disable MMU and D-cache but leave I-cache enabled */
++ mrs x27, sctlr_el1
++ bic x8, x27, #1 << 2 // clear SCTLR.C
++ msr sctlr_el1, x8
++
++ bl flush_cache_all
++
++ /* restore inputs but rotated by 1 register */
++ ldp x7, x0, [sp, #32]
++ ldp x1, x2, [sp, #48]
++ ldp x3, x4, [sp, #64]
++ ldp x5, x6, [sp, #80]
++
++ bic x8, x27, #1 << 2 // clear SCTLR.C
++ bic x8, x8, #1 << 0 // clear SCTLR.M
++ bic x8, x8, #1 << 25 // clear SCTLR.EE
++ msr sctlr_el1, x8
++ isb
++
++ blr x7
++
++ /* switch back to BE and reenable MMU and D-cache */
++ msr sctlr_el1, x27
++
++ mov sp, x29
++ ldr x27, [sp, #16]
++ ldp x29, x30, [sp], #96
++ ret
++ENDPROC(efi_be_phys_call)
+diff --git a/arch/arm64/kernel/efi-be-runtime.c b/arch/arm64/kernel/efi-be-runtime.c
+new file mode 100644
+index 0000000..28d7406
+--- /dev/null
++++ b/arch/arm64/kernel/efi-be-runtime.c
+@@ -0,0 +1,104 @@
++
++#include <linux/efi.h>
++#include <linux/spinlock.h>
++#include <asm/efi.h>
++#include <asm/neon.h>
++#include <asm/tlbflush.h>
++
++static efi_runtime_services_t *runtime;
++static efi_status_t (*efi_be_call)(phys_addr_t func, ...);
++
++static DEFINE_SPINLOCK(efi_be_rt_lock);
++
++static unsigned long efi_be_call_pre(void)
++{
++ unsigned long flags;
++
++ kernel_neon_begin();
++ spin_lock_irqsave(&efi_be_rt_lock, flags);
++ cpu_switch_mm(idmap_pg_dir, &init_mm);
++ flush_tlb_all();
++ return flags;
++}
++
++static void efi_be_call_post(unsigned long flags)
++{
++ cpu_switch_mm(current, current->active_mm);
++ flush_tlb_all();
++ spin_unlock_irqrestore(&efi_be_rt_lock, flags);
++ kernel_neon_end();
++}
++
++static efi_status_t efi_be_get_variable(efi_char16_t *name,
++ efi_guid_t *vendor,
++ u32 *attr,
++ unsigned long *data_size,
++ void *data)
++{
++ unsigned long flags;
++ efi_status_t status;
++
++ *data_size = cpu_to_le64(*data_size);
++ flags = efi_be_call_pre();
++ status = efi_be_call(le64_to_cpu(runtime->get_variable),
++ virt_to_phys(name), virt_to_phys(vendor),
++ virt_to_phys(attr), virt_to_phys(data_size),
++ virt_to_phys(data));
++ efi_be_call_post(flags);
++ *attr = le32_to_cpu(*attr);
++ *data_size = le64_to_cpu(*data_size);
++ return status;
++}
++
++static efi_status_t efi_be_get_next_variable(unsigned long *name_size,
++ efi_char16_t *name,
++ efi_guid_t *vendor)
++{
++ unsigned long flags;
++ efi_status_t status;
++
++ *name_size = cpu_to_le64(*name_size);
++ flags = efi_be_call_pre();
++ status = efi_be_call(le64_to_cpu(runtime->get_next_variable),
++ virt_to_phys(name_size), virt_to_phys(name),
++ virt_to_phys(vendor));
++ efi_be_call_post(flags);
++ *name_size = le64_to_cpu(*name_size);
++ return status;
++}
++
++static efi_status_t efi_be_set_variable(efi_char16_t *name,
++ efi_guid_t *vendor,
++ u32 attr,
++ unsigned long data_size,
++ void *data)
++{
++ unsigned long flags;
++ efi_status_t status;
++
++ flags = efi_be_call_pre();
++ status = efi_be_call(le64_to_cpu(runtime->set_variable),
++ virt_to_phys(name), virt_to_phys(vendor),
++ cpu_to_le32(attr), cpu_to_le64(data_size),
++ virt_to_phys(data));
++ efi_be_call_post(flags);
++ return status;
++}
++
++void efi_be_runtime_setup(void)
++{
++ extern u8 efi_be_phys_call[];
++
++ runtime = ioremap_cache(le64_to_cpu(efi.systab->runtime),
++ sizeof(efi_runtime_services_t));
++ if (!runtime) {
++ pr_err("Failed to set up BE wrappers for UEFI Runtime Services!\n");
++ return;
++ }
++
++ efi_be_call = (void *)virt_to_phys(efi_be_phys_call);
++
++ efi.get_variable = efi_be_get_variable;
++ efi.get_next_variable = efi_be_get_next_variable;
++ efi.set_variable = efi_be_set_variable;
++}
+diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
+index 8ce9b05..760fbb5 100644
+--- a/arch/arm64/kernel/efi-entry.S
++++ b/arch/arm64/kernel/efi-entry.S
+@@ -34,7 +34,34 @@ ENTRY(efi_stub_entry)
+ * Create a stack frame to save FP/LR with extra space
+ * for image_addr variable passed to efi_entry().
+ */
+- stp x29, x30, [sp, #-32]!
++ stp x29, x30, [sp, #-48]!
++ stp x22, x23, [sp, #32]
++
++#ifdef CONFIG_EFI_LE_STUB
++ adr x4, efi_stub_entry
++ ldp w8, w9, [x4, #-32]
++STUB_BE(rev w8, w8 )
++STUB_BE(rev w9, w9 )
++ add x8, x4, w8, sxtw // x8: base of Image
++ add x9, x4, w9, sxtw // x9: offset of linux_banner
++
++ ldp x22, x23, [x4, #-24] // x22: size of Image
++STUB_BE(rev x23, x23 ) // x23: stext offset
++
++ /*
++ * Get a pointer to linux_banner in the outer image and store it
++ * in this image.
++ */
++ adrp x4, le_linux_banner
++ str x9, [x4, #:lo12:le_linux_banner]
++#else
++ adrp x8, _text
++ add x8, x8, #:lo12:_text // x8: base of Image
++ adrp x9, _edata
++ add x9, x9, #:lo12:_edata
++ sub x22, x9, x8 // x22: size of Image
++ ldr x23, =stext_offset // x23: stext offset
++#endif
+
+ /*
+ * Call efi_entry to do the real work.
+@@ -45,8 +72,6 @@ ENTRY(efi_stub_entry)
+ * efi_system_table_t *sys_table,
+ * unsigned long *image_addr) ;
+ */
+- adrp x8, _text
+- add x8, x8, #:lo12:_text
+ add x2, sp, 16
+ str x8, [x2]
+ bl efi_entry
+@@ -61,17 +86,12 @@ ENTRY(efi_stub_entry)
+ */
+ mov x20, x0 // DTB address
+ ldr x0, [sp, #16] // relocated _text address
+- ldr x21, =stext_offset
+- add x21, x0, x21
++ add x21, x0, x23
+
+ /*
+ * Calculate size of the kernel Image (same for original and copy).
+ */
+- adrp x1, _text
+- add x1, x1, #:lo12:_text
+- adrp x2, _edata
+- add x2, x2, #:lo12:_edata
+- sub x1, x2, x1
++ mov x1, x22
+
+ /*
+ * Flush the copied Image to the PoC, and ensure it is not shadowed by
+@@ -117,7 +137,8 @@ ENTRY(efi_stub_entry)
+
+ efi_load_fail:
+ mov x0, #EFI_LOAD_ERROR
+- ldp x29, x30, [sp], #32
++ ldp x22, x23, [sp, #32]
++ ldp x29, x30, [sp], #48
+ ret
+
+ efi_stub_entry_end:
+diff --git a/arch/arm64/kernel/efi-stub.c b/arch/arm64/kernel/efi-stub.c
+index d27dd98..dd6d6bc 100644
+--- a/arch/arm64/kernel/efi-stub.c
++++ b/arch/arm64/kernel/efi-stub.c
+@@ -11,7 +11,6 @@
+ */
+ #include <linux/efi.h>
+ #include <asm/efi.h>
+-#include <asm/sections.h>
+
+ efi_status_t handle_kernel_image(efi_system_table_t *sys_table,
+ unsigned long *image_addr,
+@@ -22,22 +21,19 @@ efi_status_t handle_kernel_image(efi_system_table_t *sys_table,
+ efi_loaded_image_t *image)
+ {
+ efi_status_t status;
+- unsigned long kernel_size, kernel_memsize = 0;
+
+ /* Relocate the image, if required. */
+- kernel_size = _edata - _text;
+ if (*image_addr != (dram_base + TEXT_OFFSET)) {
+- kernel_memsize = kernel_size + (_end - _edata);
+- status = efi_low_alloc(sys_table, kernel_memsize + TEXT_OFFSET,
++ status = efi_low_alloc(sys_table, image->image_size + TEXT_OFFSET,
+ SZ_2M, reserve_addr);
+ if (status != EFI_SUCCESS) {
+ pr_efi_err(sys_table, "Failed to relocate kernel\n");
+ return status;
+ }
+ memcpy((void *)*reserve_addr + TEXT_OFFSET, (void *)*image_addr,
+- kernel_size);
++ image->image_size);
+ *image_addr = *reserve_addr + TEXT_OFFSET;
+- *reserve_size = kernel_memsize + TEXT_OFFSET;
++ *reserve_size = image->image_size + TEXT_OFFSET;
+ }
+
+
+diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
+index 4178e9e..133c599 100644
+--- a/arch/arm64/kernel/efi.c
++++ b/arch/arm64/kernel/efi.c
+@@ -43,7 +43,7 @@ early_param("uefi_debug", uefi_debug_setup);
+
+ static int __init is_normal_ram(efi_memory_desc_t *md)
+ {
+- if (md->attribute & EFI_MEMORY_WB)
++ if (le64_to_cpu(md->attribute) & EFI_MEMORY_WB)
+ return 1;
+ return 0;
+ }
+@@ -59,10 +59,10 @@ static void __init efi_setup_idmap(void)
+
+ /* map runtime io spaces */
+ for_each_efi_memory_desc(&memmap, md) {
+- if (!(md->attribute & EFI_MEMORY_RUNTIME) || is_normal_ram(md))
++ if (!(le64_to_cpu(md->attribute) & EFI_MEMORY_RUNTIME) || is_normal_ram(md))
+ continue;
+- paddr = md->phys_addr;
+- npages = md->num_pages;
++ paddr = le64_to_cpu(md->phys_addr);
++ npages = le64_to_cpu(md->num_pages);
+ memrange_efi_to_native(&paddr, &npages);
+ size = npages << PAGE_SHIFT;
+ create_id_mapping(paddr, size, 1);
+@@ -88,29 +88,29 @@ static int __init uefi_init(void)
+ /*
+ * Verify the EFI Table
+ */
+- if (efi.systab->hdr.signature != EFI_SYSTEM_TABLE_SIGNATURE) {
++ if (le64_to_cpu(efi.systab->hdr.signature) != EFI_SYSTEM_TABLE_SIGNATURE) {
+ pr_err("System table signature incorrect\n");
+ retval = -EINVAL;
+ goto out;
+ }
+- if ((efi.systab->hdr.revision >> 16) < 2)
++ if ((le32_to_cpu(efi.systab->hdr.revision) >> 16) < 2)
+ pr_warn("Warning: EFI system table version %d.%02d, expected 2.00 or greater\n",
+ efi.systab->hdr.revision >> 16,
+ efi.systab->hdr.revision & 0xffff);
+
+ /* Show what we know for posterity */
+- c16 = early_memremap(efi.systab->fw_vendor,
++ c16 = early_memremap(le64_to_cpu(efi.systab->fw_vendor),
+ sizeof(vendor));
+ if (c16) {
+ for (i = 0; i < (int) sizeof(vendor) - 1 && *c16; ++i)
+- vendor[i] = c16[i];
++ vendor[i] = le16_to_cpu(c16[i]);
+ vendor[i] = '\0';
+ early_memunmap(c16, sizeof(vendor));
+ }
+
+ pr_info("EFI v%u.%.02u by %s\n",
+- efi.systab->hdr.revision >> 16,
+- efi.systab->hdr.revision & 0xffff, vendor);
++ le32_to_cpu(efi.systab->hdr.revision) >> 16,
++ le32_to_cpu(efi.systab->hdr.revision) & 0xffff, vendor);
+
+ retval = efi_config_init(NULL);
+
+@@ -124,7 +124,7 @@ out:
+ */
+ static __init int is_reserve_region(efi_memory_desc_t *md)
+ {
+- switch (md->type) {
++ switch (le32_to_cpu(md->type)) {
+ case EFI_LOADER_CODE:
+ case EFI_LOADER_DATA:
+ case EFI_BOOT_SERVICES_CODE:
+@@ -146,8 +146,9 @@ static __init void reserve_regions(void)
+ pr_info("Processing EFI memory map:\n");
+
+ for_each_efi_memory_desc(&memmap, md) {
+- paddr = md->phys_addr;
+- npages = md->num_pages;
++ u32 md_type = le32_to_cpu(md->type);
++ paddr = le64_to_cpu(md->phys_addr);
++ npages = le64_to_cpu(md->num_pages);
+
+ if (uefi_debug) {
+ char buf[64];
+@@ -164,8 +165,8 @@ static __init void reserve_regions(void)
+ early_init_dt_add_memory_arch(paddr, size);
+
+ if (is_reserve_region(md) ||
+- md->type == EFI_BOOT_SERVICES_CODE ||
+- md->type == EFI_BOOT_SERVICES_DATA) {
++ md_type == EFI_BOOT_SERVICES_CODE ||
++ md_type == EFI_BOOT_SERVICES_DATA) {
+ memblock_reserve(paddr, size);
+ if (uefi_debug)
+ pr_cont("*");
+@@ -246,17 +247,17 @@ static void __init free_boot_services(void)
+ */
+ if (free_start) {
+ /* adjust free_end then free region */
+- if (free_end > md->phys_addr)
++ if (free_end > le64_to_cpu(md->phys_addr))
+ free_end -= PAGE_SIZE;
+ total_freed += free_region(free_start, free_end);
+ free_start = 0;
+ }
+- keep_end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT);
++ keep_end = le64_to_cpu(md->phys_addr) + (le64_to_cpu(md->num_pages) << EFI_PAGE_SHIFT);
+ continue;
+ }
+
+- if (md->type != EFI_BOOT_SERVICES_CODE &&
+- md->type != EFI_BOOT_SERVICES_DATA) {
++ if (le32_to_cpu(md->type) != EFI_BOOT_SERVICES_CODE &&
++ le32_to_cpu(md->type) != EFI_BOOT_SERVICES_DATA) {
+ /* no need to free this region */
+ continue;
+ }
+@@ -264,8 +265,8 @@ static void __init free_boot_services(void)
+ /*
+ * We want to free memory from this region.
+ */
+- paddr = md->phys_addr;
+- npages = md->num_pages;
++ paddr = le64_to_cpu(md->phys_addr);
++ npages = le64_to_cpu(md->num_pages);
+ memrange_efi_to_native(&paddr, &npages);
+ size = npages << PAGE_SHIFT;
+
+@@ -333,8 +334,8 @@ static int __init remap_region(efi_memory_desc_t *md, void **new)
+ {
+ u64 paddr, vaddr, npages, size;
+
+- paddr = md->phys_addr;
+- npages = md->num_pages;
++ paddr = le64_to_cpu(md->phys_addr);
++ npages = le64_to_cpu(md->num_pages);
+ memrange_efi_to_native(&paddr, &npages);
+ size = npages << PAGE_SHIFT;
+
+@@ -350,7 +351,7 @@ static int __init remap_region(efi_memory_desc_t *md, void **new)
+ }
+
+ /* adjust for any rounding when EFI and system pagesize differs */
+- md->virt_addr = vaddr + (md->phys_addr - paddr);
++ md->virt_addr = vaddr + (le64_to_cpu(md->phys_addr) - paddr);
+
+ if (uefi_debug)
+ pr_info(" EFI remap 0x%012llx => %p\n",
+@@ -395,6 +396,21 @@ static int __init arm64_enter_virtual_mode(void)
+
+ efi.memmap = &memmap;
+
++ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) {
++ efi.systab = ioremap_cache(efi_system_table,
++ sizeof(efi_system_table_t));
++ if (!efi.systab) {
++ pr_err("Failed to remap EFI system table!\n");
++ return -1;
++ }
++ free_boot_services();
++ efi_be_runtime_setup();
++
++ set_bit(EFI_SYSTEM_TABLES, &efi.flags);
++ set_bit(EFI_RUNTIME_SERVICES, &efi.flags);
++ return 0;
++ }
++
+ /* Map the runtime regions */
+ virtmap = kmalloc(mapsize, GFP_KERNEL);
+ if (!virtmap) {
+diff --git a/arch/arm64/kernel/efistub-le/Makefile b/arch/arm64/kernel/efistub-le/Makefile
+new file mode 100644
+index 0000000..8a1c2a8
+--- /dev/null
++++ b/arch/arm64/kernel/efistub-le/Makefile
+@@ -0,0 +1,52 @@
++
++#
++# Build a little endian EFI stub and wrap it into a single .o
++#
++
++# the LE objects making up the LE efi stub
++le-objs := efi-entry.o efi-stub.o strstr.o cache.o \
++ lib-memchr.o lib-memcmp.o lib-memcpy.o lib-memmove.o \
++ lib-memset.o lib-strchr.o lib-strlen.o lib-strncmp.o \
++ fdt-fdt.o fdt-fdt_ro.o fdt-fdt_rw.o fdt-fdt_sw.o \
++ fdt-fdt_wip.o fdt-fdt_empty_tree.o \
++ libstub-fdt.o libstub-arm-stub.o libstub-efi-stub-helper.o
++
++extra-y := efi-le-stub.bin efi-le-stub.elf $(le-objs)
++
++KBUILD_CFLAGS := $(subst -pg,,$(KBUILD_CFLAGS)) -fno-stack-protector \
++ -mlittle-endian -I$(srctree)/scripts/dtc/libfdt
++
++le-targets := $(addprefix $(obj)/, $(le-objs))
++$(le-targets): KBUILD_AFLAGS += -mlittle-endian -include $(srctree)/$(src)/le.h
++
++$(obj)/efi-entry.o: $(obj)/../efi-entry.S FORCE
++ $(call if_changed_dep,as_o_S)
++
++CFLAGS_efi-stub.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
++$(obj)/efi-stub.o: $(obj)/../efi-stub.c FORCE
++ $(call if_changed_dep,cc_o_c)
++
++$(obj)/cache.o: $(src)/../../mm/cache.S FORCE
++ $(call if_changed_dep,as_o_S)
++
++$(obj)/lib-%.o: $(src)/../../lib/%.S FORCE
++ $(call if_changed_dep,as_o_S)
++
++$(obj)/fdt-%.o: $(srctree)/lib/%.c FORCE
++ $(call if_changed_dep,cc_o_c)
++
++$(obj)/libstub-%.o: $(srctree)/drivers/firmware/efi/libstub/%.c FORCE
++ $(call if_changed_dep,cc_o_c)
++
++$(obj)/efi-le-stub.elf: LDFLAGS=-EL -Map $@.map -T
++$(obj)/efi-le-stub.elf: $(src)/efistub-le.lds $(le-targets) FORCE
++ $(call if_changed,ld)
++
++$(obj)/efi-le-stub.bin: OBJCOPYFLAGS=-O binary
++$(obj)/efi-le-stub.bin: $(obj)/efi-le-stub.elf FORCE
++ $(call if_changed,objcopy)
++
++# the BE object containing the entire LE stub
++obj-y := efi-le-entry.o
++
++$(obj)/efi-le-entry.o: $(obj)/efi-le-stub.bin
+diff --git a/arch/arm64/kernel/efistub-le/efi-le-entry.S b/arch/arm64/kernel/efistub-le/efi-le-entry.S
+new file mode 100644
+index 0000000..755364c
+--- /dev/null
++++ b/arch/arm64/kernel/efistub-le/efi-le-entry.S
+@@ -0,0 +1,12 @@
++#include <linux/linkage.h>
++
++ .text
++ .align 12
++ .long _text - efi_stub_entry
++ .long linux_banner - efi_stub_entry
++ .quad _kernel_size_le
++ .quad stext_offset
++ .quad 0
++ENTRY(efi_stub_entry)
++ .incbin "arch/arm64/kernel/efistub-le/efi-le-stub.bin"
++ENDPROC(efi_stub_entry)
+diff --git a/arch/arm64/kernel/efistub-le/efistub-le.lds b/arch/arm64/kernel/efistub-le/efistub-le.lds
+new file mode 100644
+index 0000000..f64d542
+--- /dev/null
++++ b/arch/arm64/kernel/efistub-le/efistub-le.lds
+@@ -0,0 +1,35 @@
++
++ENTRY(efi_stub_entry)
++
++SECTIONS {
++ /*
++ * The inner and outer alignment of this chunk of code need to be the
++ * same so that PC relative references using adrp/add or adrp/ldr pairs
++ * will work correctly.
++ * Skip 32 bytes here, so we can put the binary blob at an offset of
++ * 4k + 0x20 in the outer image, and use the gap to share constants
++ * emitted by the outer linker but required in the stub.
++ */
++ .text 0x20 : {
++ arch/arm64/kernel/efistub-le/efi-entry.o(.init.text)
++ *(.init.text)
++ *(.text)
++ *(.text*)
++ }
++ .rodata : {
++ . = ALIGN(16);
++ *(.rodata)
++ *(.rodata*)
++ *(.init.rodata)
++ }
++ .data : {
++ . = ALIGN(16);
++ *(.data)
++ *(.data*)
++ le_linux_banner = .;
++ . += 8;
++ }
++ /DISCARD/ : {
++ *(__ex_table)
++ }
++}
+diff --git a/arch/arm64/kernel/efistub-le/le.h b/arch/arm64/kernel/efistub-le/le.h
+new file mode 100644
+index 0000000..a9f6dfc
+--- /dev/null
++++ b/arch/arm64/kernel/efistub-le/le.h
+@@ -0,0 +1,12 @@
++
++/*
++ * This is a bit of a hack, but it is necessary to correctly compile .S files
++ * that contain CPU_LE()/CPU_BE() statements, as these are defined to depend on
++ * CONFIG_ symbols and not on the endianness of the compiler.
++ */
++#ifdef CONFIG_CPU_BIG_ENDIAN
++#define STUB_BE(code...) code
++#else
++#define STUB_BE(code...)
++#endif
++#undef CONFIG_CPU_BIG_ENDIAN
+diff --git a/arch/arm64/kernel/efistub-le/strstr.c b/arch/arm64/kernel/efistub-le/strstr.c
+new file mode 100644
+index 0000000..bd16094
+--- /dev/null
++++ b/arch/arm64/kernel/efistub-le/strstr.c
+@@ -0,0 +1,20 @@
++
++#include <linux/types.h>
++#include <linux/string.h>
++
++char *strstr(const char *s1, const char *s2)
++{
++ size_t l1, l2;
++
++ l2 = strlen(s2);
++ if (!l2)
++ return (char *)s1;
++ l1 = strlen(s1);
++ while (l1 >= l2) {
++ l1--;
++ if (!memcmp(s1, s2, l2))
++ return (char *)s1;
++ s1++;
++ }
++ return NULL;
++}
+diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
+index 8ce88e0..8b1eba5 100644
+--- a/arch/arm64/kernel/head.S
++++ b/arch/arm64/kernel/head.S
+@@ -126,7 +126,10 @@ efi_head:
+ .byte 0x4d
+ .byte 0x64
+ #ifdef CONFIG_EFI
+- .long pe_header - efi_head // Offset to the PE header.
++ .byte pe_header - efi_head // Offset to the PE header.
++ .byte 0
++ .byte 0
++ .byte 0
+ #else
+ .word 0 // reserved
+ #endif
+@@ -139,30 +142,31 @@ pe_header:
+ .ascii "PE"
+ .short 0
+ coff_header:
+- .short 0xaa64 // AArch64
+- .short 2 // nr_sections
++ le16 0xaa64 // AArch64
++ le16 2 // nr_sections
+ .long 0 // TimeDateStamp
+ .long 0 // PointerToSymbolTable
+- .long 1 // NumberOfSymbols
+- .short section_table - optional_header // SizeOfOptionalHeader
+- .short 0x206 // Characteristics.
++ le32 1 // NumberOfSymbols
++ .byte section_table - optional_header // SizeOfOptionalHeader
++ .byte 0
++ le16 0x206 // Characteristics.
+ // IMAGE_FILE_DEBUG_STRIPPED |
+ // IMAGE_FILE_EXECUTABLE_IMAGE |
+ // IMAGE_FILE_LINE_NUMS_STRIPPED
+ optional_header:
+- .short 0x20b // PE32+ format
++ le16 0x20b // PE32+ format
+ .byte 0x02 // MajorLinkerVersion
+ .byte 0x14 // MinorLinkerVersion
+- .long _end - stext // SizeOfCode
++ .long _efi_code_virtsize_le // SizeOfCode
+ .long 0 // SizeOfInitializedData
+ .long 0 // SizeOfUninitializedData
+- .long efi_stub_entry - efi_head // AddressOfEntryPoint
+- .long stext_offset // BaseOfCode
++ .long _efi_entry_point_le // AddressOfEntryPoint
++ .long _efi_stext_offset_le // BaseOfCode
+
+ extra_header_fields:
+ .quad 0 // ImageBase
+- .long 0x1000 // SectionAlignment
+- .long PECOFF_FILE_ALIGNMENT // FileAlignment
++ le32 0x1000 // SectionAlignment
++ le32 0x200 // FileAlignment
+ .short 0 // MajorOperatingSystemVersion
+ .short 0 // MinorOperatingSystemVersion
+ .short 0 // MajorImageVersion
+@@ -171,19 +175,19 @@ extra_header_fields:
+ .short 0 // MinorSubsystemVersion
+ .long 0 // Win32VersionValue
+
+- .long _end - efi_head // SizeOfImage
++ .long _efi_image_size_le // SizeOfImage
+
+ // Everything before the kernel image is considered part of the header
+- .long stext_offset // SizeOfHeaders
++ .long _efi_stext_offset_le // SizeOfHeaders
+ .long 0 // CheckSum
+- .short 0xa // Subsystem (EFI application)
++ le16 0xa // Subsystem (EFI application)
+ .short 0 // DllCharacteristics
+ .quad 0 // SizeOfStackReserve
+ .quad 0 // SizeOfStackCommit
+ .quad 0 // SizeOfHeapReserve
+ .quad 0 // SizeOfHeapCommit
+ .long 0 // LoaderFlags
+- .long 0x6 // NumberOfRvaAndSizes
++ le32 0x6 // NumberOfRvaAndSizes
+
+ .quad 0 // ExportTable
+ .quad 0 // ImportTable
+@@ -211,23 +215,23 @@ section_table:
+ .long 0 // PointerToLineNumbers
+ .short 0 // NumberOfRelocations
+ .short 0 // NumberOfLineNumbers
+- .long 0x42100040 // Characteristics (section flags)
++ le32 0x42100040 // Characteristics (section flags)
+
+
+ .ascii ".text"
+ .byte 0
+ .byte 0
+ .byte 0 // end of 0 padding of section name
+- .long _end - stext // VirtualSize
+- .long stext_offset // VirtualAddress
+- .long _edata - stext // SizeOfRawData
+- .long stext_offset // PointerToRawData
++ .long _efi_code_virtsize_le // VirtualSize
++ .long _efi_stext_offset_le // VirtualAddress
++ .long _efi_code_rawsize_le // SizeOfRawData
++ .long _efi_stext_offset_le // PointerToRawData
+
+ .long 0 // PointerToRelocations (0 for executables)
+ .long 0 // PointerToLineNumbers (0 for executables)
+ .short 0 // NumberOfRelocations (0 for executables)
+ .short 0 // NumberOfLineNumbers (0 for executables)
+- .long 0xe0500020 // Characteristics (section flags)
++ le32 0xe0500020 // Characteristics (section flags)
+
+ /*
+ * EFI will load stext onwards at the 4k section alignment
+diff --git a/arch/arm64/kernel/image.h b/arch/arm64/kernel/image.h
+index 8fae075..d08ce56 100644
+--- a/arch/arm64/kernel/image.h
++++ b/arch/arm64/kernel/image.h
+@@ -37,8 +37,10 @@
+ (((data) & 0x0000ff0000000000) >> 24) | \
+ (((data) & 0x00ff000000000000) >> 40) | \
+ (((data) & 0xff00000000000000) >> 56))
++#define DATA_LE32(data) (DATA_LE64(data) >> 32)
+ #else
+ #define DATA_LE64(data) ((data) & 0xffffffffffffffff)
++#define DATA_LE32(data) ((data) & 0xffffffff)
+ #endif
+
+ #ifdef CONFIG_CPU_BIG_ENDIAN
+@@ -57,6 +59,18 @@
+ #define HEAD_SYMBOLS \
+ _kernel_size_le = DATA_LE64(_end - _text); \
+ _kernel_offset_le = DATA_LE64(TEXT_OFFSET); \
+- _kernel_flags_le = DATA_LE64(__HEAD_FLAGS);
++ _kernel_flags_le = DATA_LE64(__HEAD_FLAGS); \
++ EFI_HEAD_SYMBOLS
++
++#ifdef CONFIG_EFI
++#define EFI_HEAD_SYMBOLS \
++ _efi_stext_offset_le = DATA_LE32(stext_offset); \
++ _efi_code_virtsize_le = DATA_LE32(_end - _text - stext_offset); \
++ _efi_code_rawsize_le = DATA_LE32(_edata - _text - stext_offset); \
++ _efi_image_size_le = DATA_LE32(_end - _text); \
++ _efi_entry_point_le = DATA_LE32(efi_stub_entry - _text);
++#else
++#define EFI_HEAD_SYMBOLS
++#endif
+
+ #endif /* __ASM_IMAGE_H */
+diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c
+index 9035c1b..4e98daa 100644
+--- a/drivers/firmware/efi/efi.c
++++ b/drivers/firmware/efi/efi.c
+@@ -296,18 +296,23 @@ static __init int match_config_table(efi_guid_t *guid,
+ int __init efi_config_init(efi_config_table_type_t *arch_tables)
+ {
+ void *config_tables, *tablep;
+- int i, sz;
++ unsigned long __tables;
++ int i, sz, nr_tables;
+
+- if (efi_enabled(EFI_64BIT))
++ if (efi_enabled(EFI_64BIT)) {
+ sz = sizeof(efi_config_table_64_t);
+- else
++ nr_tables = le64_to_cpu((__force __le64)efi.systab->nr_tables);
++ __tables = le64_to_cpu((__force __le64)efi.systab->tables);
++ } else {
+ sz = sizeof(efi_config_table_32_t);
++ nr_tables = le32_to_cpu((__force __le32)efi.systab->nr_tables);
++ __tables = le32_to_cpu((__force __le32)efi.systab->tables);
++ }
+
+ /*
+ * Let's see what config tables the firmware passed to us.
+ */
+- config_tables = early_memremap(efi.systab->tables,
+- efi.systab->nr_tables * sz);
++ config_tables = early_memremap(__tables, nr_tables * sz);
+ if (config_tables == NULL) {
+ pr_err("Could not map Configuration table!\n");
+ return -ENOMEM;
+@@ -315,21 +320,20 @@ int __init efi_config_init(efi_config_table_type_t *arch_tables)
+
+ tablep = config_tables;
+ pr_info("");
+- for (i = 0; i < efi.systab->nr_tables; i++) {
++ for (i = 0; i < nr_tables; i++) {
+ efi_guid_t guid;
+ unsigned long table;
+
+ if (efi_enabled(EFI_64BIT)) {
+ u64 table64;
+ guid = ((efi_config_table_64_t *)tablep)->guid;
+- table64 = ((efi_config_table_64_t *)tablep)->table;
+- table = table64;
++ table = table64 = le64_to_cpu((__force __le64)
++ ((efi_config_table_64_t *)tablep)->table);
+ #ifndef CONFIG_64BIT
+ if (table64 >> 32) {
+ pr_cont("\n");
+ pr_err("Table located above 4GB, disabling EFI.\n");
+- early_memunmap(config_tables,
+- efi.systab->nr_tables * sz);
++ early_memunmap(config_tables, nr_tables * sz);
+ return -EINVAL;
+ }
+ #endif
+@@ -344,7 +348,7 @@ int __init efi_config_init(efi_config_table_type_t *arch_tables)
+ tablep += sz;
+ }
+ pr_cont("\n");
+- early_memunmap(config_tables, efi.systab->nr_tables * sz);
++ early_memunmap(config_tables, nr_tables * sz);
+
+ set_bit(EFI_CONFIG_TABLES, &efi.flags);
+
+diff --git a/drivers/firmware/efi/efivars.c b/drivers/firmware/efi/efivars.c
+index f256ecd..2b1c8be 100644
+--- a/drivers/firmware/efi/efivars.c
++++ b/drivers/firmware/efi/efivars.c
+@@ -563,7 +563,7 @@ efivar_create_sysfs_entry(struct efivar_entry *new_var)
+ /* Convert Unicode to normal chars (assume top bits are 0),
+ ala UTF-8 */
+ for (i=0; i < (int)(variable_name_size / sizeof(efi_char16_t)); i++) {
+- short_name[i] = variable_name[i] & 0xFF;
++ short_name[i] = le16_to_cpu((__force __le16)variable_name[i]);
+ }
+ /* This is ugly, but necessary to separate one vendor's
+ private variables from another's. */
+diff --git a/drivers/firmware/efi/libstub/fdt.c b/drivers/firmware/efi/libstub/fdt.c
+index c846a96..f0f9d54 100644
+--- a/drivers/firmware/efi/libstub/fdt.c
++++ b/drivers/firmware/efi/libstub/fdt.c
+@@ -22,6 +22,10 @@ efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt,
+ unsigned long map_size, unsigned long desc_size,
+ u32 desc_ver)
+ {
++#ifdef CONFIG_EFI_LE_STUB
++ extern char const *le_linux_banner;
++ char const *linux_banner = le_linux_banner;
++#endif
+ int node, prev, num_rsv;
+ int status;
+ u32 fdt_val32;
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/02-319-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch b/meta-seattle/recipes-kernel/linux/files/02-319-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch
new file mode 100644
index 00000000..18a42adb
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/02-319-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch
@@ -0,0 +1,49 @@
+From ab3d099133f84d59e02a572801659cf8b1145f72 Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Thu, 19 Feb 2015 09:24:22 +0100
+Subject: [PATCH 1/1] Seattle: Enable 32-bit EL0 with 64K and 4K page sizes
+
+Seattle is able to switch to aarch32 EL0 only with following setup:
+- Page Size 64K - 42bit VA
+- Page Size 4K - 48bit VA
+
+Upstream-Status: Pending
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ arch/arm64/Kconfig | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
+index d35a06c..68b4859 100644
+--- a/arch/arm64/Kconfig
++++ b/arch/arm64/Kconfig
+@@ -338,6 +338,7 @@ endchoice
+ choice
+ prompt "Virtual address space size"
+ default ARM64_VA_BITS_39 if ARM64_4K_PAGES
++ default ARM64_VA_BITS_48 if ARM64_4K_PAGES
+ default ARM64_VA_BITS_42 if ARM64_64K_PAGES
+ help
+ Allows choosing one of multiple possible virtual address
+@@ -354,7 +355,7 @@ config ARM64_VA_BITS_42
+
+ config ARM64_VA_BITS_48
+ bool "48-bit"
+- depends on !ARM_SMMU
++ depends on ARM64_4K_PAGES
+
+ endchoice
+
+@@ -613,7 +614,7 @@ source "fs/Kconfig.binfmt"
+
+ config COMPAT
+ bool "Kernel support for 32-bit EL0"
+- depends on !ARM64_64K_PAGES
++ depends on !ARM64_64K_PAGES || EXPERT
+ select COMPAT_BINFMT_ELF
+ select HAVE_UID16
+ select OLD_SIGSUSPEND3
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/02-412-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch b/meta-seattle/recipes-kernel/linux/files/02-412-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch
new file mode 100644
index 00000000..a949dd6d
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/02-412-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch
@@ -0,0 +1,48 @@
+From 15839d0281cba986e018a59827d69ae419112162 Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Tue, 28 Jul 2015 15:56:51 +0200
+Subject: [PATCH 1/1] Seattle: Enable 32-bit EL0 with 64K and 4K page sizes
+
+ Seattle is able to switch to aarch32 EL0 only with following setup:
+ - Page Size 64K - 42bit VA
+ - Page Size 4K - 48bit VA
+
+Upstream-Status: Pending
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ arch/arm64/Kconfig | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
+index 7796af4..29f6a03 100644
+--- a/arch/arm64/Kconfig
++++ b/arch/arm64/Kconfig
+@@ -436,6 +436,7 @@ endchoice
+ choice
+ prompt "Virtual address space size"
+ default ARM64_VA_BITS_39 if ARM64_4K_PAGES
++ default ARM64_VA_BITS_48 if ARM64_4K_PAGES
+ default ARM64_VA_BITS_42 if ARM64_64K_PAGES
+ help
+ Allows choosing one of multiple possible virtual address
+@@ -452,6 +453,7 @@ config ARM64_VA_BITS_42
+
+ config ARM64_VA_BITS_48
+ bool "48-bit"
++ depends on ARM64_4K_PAGES
+
+ endchoice
+
+@@ -715,7 +717,7 @@ source "fs/Kconfig.binfmt"
+
+ config COMPAT
+ bool "Kernel support for 32-bit EL0"
+- depends on !ARM64_64K_PAGES || EXPERT
++ depends on !ARM64_64K_PAGES || EXPERT
+ select COMPAT_BINFMT_ELF
+ select HAVE_UID16
+ select OLD_SIGSUSPEND3
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/03-arm64-don-t-set-READ_IMPLIES_EXEC-for-EM_AARCH64-ELF.patch b/meta-seattle/recipes-kernel/linux/files/03-arm64-don-t-set-READ_IMPLIES_EXEC-for-EM_AARCH64-ELF.patch
new file mode 100644
index 00000000..32d5998f
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/03-arm64-don-t-set-READ_IMPLIES_EXEC-for-EM_AARCH64-ELF.patch
@@ -0,0 +1,55 @@
+From b2072dba2431de0cfef3e6fb9823537a812dd90b Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Mon, 23 Feb 2015 16:48:43 +0100
+Subject: [PATCH 1/1] arm64: don't set READ_IMPLIES_EXEC for EM_AARCH64 ELF
+ objects
+
+Currently, we're accidentally ending up with executable stacks on
+AArch64 when the ABI says we shouldn't be, and relying on glibc to
+fix things up for us when we're loaded. However, SELinux will deny us
+mucking with the stack, and hit us with execmem AVCs.
+
+current->personality & READ_IMPLIES_EXEC is currently being set for
+AArch64 binaries, resulting in an executable stack, when no explicit
+PT_GNU_STACK header is present.
+
+[kmcmarti@sedition ~]$ uname -p
+aarch64
+[kmcmarti@sedition ~]$ cat /proc/$$/personality
+00400000
+The reason for this is, without an explicit PT_GNU_STACK entry in the
+binary, stk is still set to EXSTACK_DEFAULT (which should be
+non-executable on AArch64.) As a result, elf_read_implies_exec is true,
+and we set READ_IMPLIES_EXEC in binfmt_elf.c:load_elf_binary.
+
+Fix this to return 0 in the native case, and parrot the logic from
+arch/arm/kernel/elf.c otherwise. With this patch, binaries correctly
+don't have READ_IMPLIES_EXEC set, and we can let PT_GNU_STACK change
+things if it's explicitly requested.
+
+Signed-off-by: Kyle McMartin <kyle@redhat.com>
+
+Upstream-Status: Pending
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ arch/arm64/include/asm/elf.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
+index 1f65be3..dbc9888 100644
+--- a/arch/arm64/include/asm/elf.h
++++ b/arch/arm64/include/asm/elf.h
+@@ -114,7 +114,8 @@ typedef struct user_fpsimd_state elf_fpregset_t;
+ */
+ #define elf_check_arch(x) ((x)->e_machine == EM_AARCH64)
+
+-#define elf_read_implies_exec(ex,stk) (stk != EXSTACK_DISABLE_X)
++#define elf_read_implies_exec(ex,stk) (test_thread_flag(TIF_32BIT) \
++ ? (stk == EXSTACK_ENABLE_X) : 0)
+
+ #define CORE_DUMP_USE_REGSET
+ #define ELF_EXEC_PAGESIZE PAGE_SIZE
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/319-Update-xgbe-drivers-for-B0-board.patch b/meta-seattle/recipes-kernel/linux/files/319-Update-xgbe-drivers-for-B0-board.patch
new file mode 100644
index 00000000..13344ac8
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/319-Update-xgbe-drivers-for-B0-board.patch
@@ -0,0 +1,3560 @@
+From 675ffdbcc905bc44a9fef9a7f6569493a3a8efe1 Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Fri, 28 Aug 2015 17:35:57 +0200
+Subject: [PATCH] Hierofalcon: Update xgbe drivers for B0 board
+
+Port ethernet drivers for AMD xgbe from 4.1 kernel to 3.19
+in order to have ethernet working on B0 board
+
+Upstream-Status: Inappropriate
+Support for this board was added starting with kernel version 4.1
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/net/ethernet/amd/xgbe/xgbe-common.h | 2 +
+ drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c | 2 +-
+ drivers/net/ethernet/amd/xgbe/xgbe-desc.c | 34 +-
+ drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 147 +++-
+ drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 309 +++----
+ drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 29 +-
+ drivers/net/ethernet/amd/xgbe/xgbe-main.c | 207 ++++-
+ drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 29 +-
+ drivers/net/ethernet/amd/xgbe/xgbe-ptp.c | 21 +-
+ drivers/net/ethernet/amd/xgbe/xgbe.h | 46 +-
+ drivers/net/phy/amd-xgbe-phy.c | 1142 ++++++++++++++++++--------
+ include/linux/clocksource.h | 9 +
+ 12 files changed, 1284 insertions(+), 693 deletions(-)
+
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
+index 29a0927..34c28aa 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
+@@ -365,6 +365,8 @@
+ #define MAC_HWF0R_TXCOESEL_WIDTH 1
+ #define MAC_HWF0R_VLHASH_INDEX 4
+ #define MAC_HWF0R_VLHASH_WIDTH 1
++#define MAC_HWF1R_ADDR64_INDEX 14
++#define MAC_HWF1R_ADDR64_WIDTH 2
+ #define MAC_HWF1R_ADVTHWORD_INDEX 13
+ #define MAC_HWF1R_ADVTHWORD_WIDTH 1
+ #define MAC_HWF1R_DBGMEMA_INDEX 19
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c b/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c
+index 76479d0..2c063b6 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c
+@@ -328,7 +328,7 @@ void xgbe_debugfs_init(struct xgbe_prv_data *pdata)
+
+ buf = kasprintf(GFP_KERNEL, "amd-xgbe-%s", pdata->netdev->name);
+ pdata->xgbe_debugfs = debugfs_create_dir(buf, NULL);
+- if (pdata->xgbe_debugfs == NULL) {
++ if (!pdata->xgbe_debugfs) {
+ netdev_err(pdata->netdev, "debugfs_create_dir failed\n");
+ return;
+ }
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-desc.c b/drivers/net/ethernet/amd/xgbe/xgbe-desc.c
+index a50891f..5c92fb7 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-desc.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-desc.c
+@@ -263,7 +263,7 @@ static int xgbe_alloc_pages(struct xgbe_prv_data *pdata,
+ int ret;
+
+ /* Try to obtain pages, decreasing order if necessary */
+- gfp |= __GFP_COLD | __GFP_COMP;
++ gfp |= __GFP_COLD | __GFP_COMP | __GFP_NOWARN;
+ while (order >= 0) {
+ pages = alloc_pages(gfp, order);
+ if (pages)
+@@ -422,7 +422,6 @@ static void xgbe_wrapper_rx_descriptor_init(struct xgbe_prv_data *pdata)
+
+ ring->cur = 0;
+ ring->dirty = 0;
+- memset(&ring->rx, 0, sizeof(ring->rx));
+
+ hw_if->rx_desc_init(channel);
+ }
+@@ -621,35 +620,6 @@ err_out:
+ return 0;
+ }
+
+-static void xgbe_realloc_rx_buffer(struct xgbe_channel *channel)
+-{
+- struct xgbe_prv_data *pdata = channel->pdata;
+- struct xgbe_hw_if *hw_if = &pdata->hw_if;
+- struct xgbe_ring *ring = channel->rx_ring;
+- struct xgbe_ring_data *rdata;
+- int i;
+-
+- DBGPR("-->xgbe_realloc_rx_buffer: rx_ring->rx.realloc_index = %u\n",
+- ring->rx.realloc_index);
+-
+- for (i = 0; i < ring->dirty; i++) {
+- rdata = XGBE_GET_DESC_DATA(ring, ring->rx.realloc_index);
+-
+- /* Reset rdata values */
+- xgbe_unmap_rdata(pdata, rdata);
+-
+- if (xgbe_map_rx_buffer(pdata, ring, rdata))
+- break;
+-
+- hw_if->rx_desc_reset(rdata);
+-
+- ring->rx.realloc_index++;
+- }
+- ring->dirty = 0;
+-
+- DBGPR("<--xgbe_realloc_rx_buffer\n");
+-}
+-
+ void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *desc_if)
+ {
+ DBGPR("-->xgbe_init_function_ptrs_desc\n");
+@@ -657,7 +627,7 @@ void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *desc_if)
+ desc_if->alloc_ring_resources = xgbe_alloc_ring_resources;
+ desc_if->free_ring_resources = xgbe_free_ring_resources;
+ desc_if->map_tx_skb = xgbe_map_tx_skb;
+- desc_if->realloc_rx_buffer = xgbe_realloc_rx_buffer;
++ desc_if->map_rx_buffer = xgbe_map_rx_buffer;
+ desc_if->unmap_rdata = xgbe_unmap_rdata;
+ desc_if->wrapper_tx_desc_init = xgbe_wrapper_tx_descriptor_init;
+ desc_if->wrapper_rx_desc_init = xgbe_wrapper_rx_descriptor_init;
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
+index 4c66cd1..21d9497 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
+@@ -115,6 +115,7 @@
+ */
+
+ #include <linux/phy.h>
++#include <linux/mdio.h>
+ #include <linux/clk.h>
+ #include <linux/bitrev.h>
+ #include <linux/crc32.h>
+@@ -130,7 +131,7 @@ static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,
+
+ DBGPR("-->xgbe_usec_to_riwt\n");
+
+- rate = clk_get_rate(pdata->sysclk);
++ rate = pdata->sysclk_rate;
+
+ /*
+ * Convert the input usec value to the watchdog timer value. Each
+@@ -153,7 +154,7 @@ static unsigned int xgbe_riwt_to_usec(struct xgbe_prv_data *pdata,
+
+ DBGPR("-->xgbe_riwt_to_usec\n");
+
+- rate = clk_get_rate(pdata->sysclk);
++ rate = pdata->sysclk_rate;
+
+ /*
+ * Convert the input watchdog timer value to the usec value. Each
+@@ -673,6 +674,9 @@ static void xgbe_enable_mac_interrupts(struct xgbe_prv_data *pdata)
+
+ static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata)
+ {
++ if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x3)
++ return 0;
++
+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x3);
+
+ return 0;
+@@ -680,6 +684,9 @@ static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata)
+
+ static int xgbe_set_gmii_2500_speed(struct xgbe_prv_data *pdata)
+ {
++ if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x2)
++ return 0;
++
+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x2);
+
+ return 0;
+@@ -687,6 +694,9 @@ static int xgbe_set_gmii_2500_speed(struct xgbe_prv_data *pdata)
+
+ static int xgbe_set_xgmii_speed(struct xgbe_prv_data *pdata)
+ {
++ if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0)
++ return 0;
++
+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0);
+
+ return 0;
+@@ -843,6 +853,22 @@ static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, u8 *addr)
+ return 0;
+ }
+
++static int xgbe_config_rx_mode(struct xgbe_prv_data *pdata)
++{
++ struct net_device *netdev = pdata->netdev;
++ unsigned int pr_mode, am_mode;
++
++ pr_mode = ((netdev->flags & IFF_PROMISC) != 0);
++ am_mode = ((netdev->flags & IFF_ALLMULTI) != 0);
++
++ xgbe_set_promiscuous_mode(pdata, pr_mode);
++ xgbe_set_all_multicast_mode(pdata, am_mode);
++
++ xgbe_add_mac_addresses(pdata);
++
++ return 0;
++}
++
+ static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad,
+ int mmd_reg)
+ {
+@@ -881,6 +907,23 @@ static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad,
+ else
+ mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
+
++ /* If the PCS is changing modes, match the MAC speed to it */
++ if (((mmd_address >> 16) == MDIO_MMD_PCS) &&
++ ((mmd_address & 0xffff) == MDIO_CTRL2)) {
++ struct phy_device *phydev = pdata->phydev;
++
++ if (mmd_data & MDIO_PCS_CTRL2_TYPE) {
++ /* KX mode */
++ if (phydev->supported & SUPPORTED_1000baseKX_Full)
++ xgbe_set_gmii_speed(pdata);
++ else
++ xgbe_set_gmii_2500_speed(pdata);
++ } else {
++ /* KR mode */
++ xgbe_set_xgmii_speed(pdata);
++ }
++ }
++
+ /* The PCS registers are accessed using mmio. The underlying APB3
+ * management interface uses indirect addressing to access the MMD
+ * register sets. This requires accessing of the PCS register in two
+@@ -1041,7 +1084,7 @@ static void xgbe_tx_desc_reset(struct xgbe_ring_data *rdata)
+ rdesc->desc3 = 0;
+
+ /* Make sure ownership is written to the descriptor */
+- wmb();
++ dma_wmb();
+ }
+
+ static void xgbe_tx_desc_init(struct xgbe_channel *channel)
+@@ -1074,9 +1117,24 @@ static void xgbe_tx_desc_init(struct xgbe_channel *channel)
+ DBGPR("<--tx_desc_init\n");
+ }
+
+-static void xgbe_rx_desc_reset(struct xgbe_ring_data *rdata)
++static void xgbe_rx_desc_reset(struct xgbe_prv_data *pdata,
++ struct xgbe_ring_data *rdata, unsigned int index)
+ {
+ struct xgbe_ring_desc *rdesc = rdata->rdesc;
++ unsigned int rx_usecs = pdata->rx_usecs;
++ unsigned int rx_frames = pdata->rx_frames;
++ unsigned int inte;
++
++ if (!rx_usecs && !rx_frames) {
++ /* No coalescing, interrupt for every descriptor */
++ inte = 1;
++ } else {
++ /* Set interrupt based on Rx frame coalescing setting */
++ if (rx_frames && !((index + 1) % rx_frames))
++ inte = 1;
++ else
++ inte = 0;
++ }
+
+ /* Reset the Rx descriptor
+ * Set buffer 1 (lo) address to header dma address (lo)
+@@ -1090,19 +1148,18 @@ static void xgbe_rx_desc_reset(struct xgbe_ring_data *rdata)
+ rdesc->desc2 = cpu_to_le32(lower_32_bits(rdata->rx.buf.dma));
+ rdesc->desc3 = cpu_to_le32(upper_32_bits(rdata->rx.buf.dma));
+
+- XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, INTE,
+- rdata->interrupt ? 1 : 0);
++ XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, INTE, inte);
+
+ /* Since the Rx DMA engine is likely running, make sure everything
+ * is written to the descriptor(s) before setting the OWN bit
+ * for the descriptor
+ */
+- wmb();
++ dma_wmb();
+
+ XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1);
+
+ /* Make sure ownership is written to the descriptor */
+- wmb();
++ dma_wmb();
+ }
+
+ static void xgbe_rx_desc_init(struct xgbe_channel *channel)
+@@ -1111,26 +1168,16 @@ static void xgbe_rx_desc_init(struct xgbe_channel *channel)
+ struct xgbe_ring *ring = channel->rx_ring;
+ struct xgbe_ring_data *rdata;
+ unsigned int start_index = ring->cur;
+- unsigned int rx_coalesce, rx_frames;
+ unsigned int i;
+
+ DBGPR("-->rx_desc_init\n");
+
+- rx_coalesce = (pdata->rx_riwt || pdata->rx_frames) ? 1 : 0;
+- rx_frames = pdata->rx_frames;
+-
+ /* Initialize all descriptors */
+ for (i = 0; i < ring->rdesc_count; i++) {
+ rdata = XGBE_GET_DESC_DATA(ring, i);
+
+- /* Set interrupt on completion bit as appropriate */
+- if (rx_coalesce && (!rx_frames || ((i + 1) % rx_frames)))
+- rdata->interrupt = 0;
+- else
+- rdata->interrupt = 1;
+-
+ /* Initialize Rx descriptor */
+- xgbe_rx_desc_reset(rdata);
++ xgbe_rx_desc_reset(pdata, rdata, i);
+ }
+
+ /* Update the total number of Rx descriptors */
+@@ -1331,18 +1378,20 @@ static void xgbe_tx_start_xmit(struct xgbe_channel *channel,
+ struct xgbe_prv_data *pdata = channel->pdata;
+ struct xgbe_ring_data *rdata;
+
++ /* Make sure everything is written before the register write */
++ wmb();
++
+ /* Issue a poll command to Tx DMA by writing address
+ * of next immediate free descriptor */
+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
+ XGMAC_DMA_IOWRITE(channel, DMA_CH_TDTR_LO,
+ lower_32_bits(rdata->rdesc_dma));
+
+- /* Start the Tx coalescing timer */
++ /* Start the Tx timer */
+ if (pdata->tx_usecs && !channel->tx_timer_active) {
+ channel->tx_timer_active = 1;
+- hrtimer_start(&channel->tx_timer,
+- ktime_set(0, pdata->tx_usecs * NSEC_PER_USEC),
+- HRTIMER_MODE_REL);
++ mod_timer(&channel->tx_timer,
++ jiffies + usecs_to_jiffies(pdata->tx_usecs));
+ }
+
+ ring->tx.xmit_more = 0;
+@@ -1359,6 +1408,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ unsigned int tso_context, vlan_context;
+ unsigned int tx_set_ic;
+ int start_index = ring->cur;
++ int cur_index = ring->cur;
+ int i;
+
+ DBGPR("-->xgbe_dev_xmit\n");
+@@ -1401,7 +1451,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ else
+ tx_set_ic = 0;
+
+- rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
++ rdata = XGBE_GET_DESC_DATA(ring, cur_index);
+ rdesc = rdata->rdesc;
+
+ /* Create a context descriptor if this is a TSO packet */
+@@ -1444,8 +1494,8 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ ring->tx.cur_vlan_ctag = packet->vlan_ctag;
+ }
+
+- ring->cur++;
+- rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
++ cur_index++;
++ rdata = XGBE_GET_DESC_DATA(ring, cur_index);
+ rdesc = rdata->rdesc;
+ }
+
+@@ -1473,7 +1523,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT, 0);
+
+ /* Set OWN bit if not the first descriptor */
+- if (ring->cur != start_index)
++ if (cur_index != start_index)
+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1);
+
+ if (tso) {
+@@ -1497,9 +1547,9 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ packet->length);
+ }
+
+- for (i = ring->cur - start_index + 1; i < packet->rdesc_count; i++) {
+- ring->cur++;
+- rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
++ for (i = cur_index - start_index + 1; i < packet->rdesc_count; i++) {
++ cur_index++;
++ rdata = XGBE_GET_DESC_DATA(ring, cur_index);
+ rdesc = rdata->rdesc;
+
+ /* Update buffer address */
+@@ -1537,7 +1587,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ * is written to the descriptor(s) before setting the OWN bit
+ * for the first descriptor
+ */
+- wmb();
++ dma_wmb();
+
+ /* Set OWN bit for the first descriptor */
+ rdata = XGBE_GET_DESC_DATA(ring, start_index);
+@@ -1549,9 +1599,9 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
+ #endif
+
+ /* Make sure ownership is written to the descriptor */
+- wmb();
++ dma_wmb();
+
+- ring->cur++;
++ ring->cur = cur_index + 1;
+ if (!packet->skb->xmit_more ||
+ netif_xmit_stopped(netdev_get_tx_queue(pdata->netdev,
+ channel->queue_index)))
+@@ -1585,7 +1635,7 @@ static int xgbe_dev_read(struct xgbe_channel *channel)
+ return 1;
+
+ /* Make sure descriptor fields are read after reading the OWN bit */
+- rmb();
++ dma_rmb();
+
+ #ifdef XGMAC_ENABLE_RX_DESC_DUMP
+ xgbe_dump_rx_desc(ring, rdesc, ring->cur);
+@@ -1976,7 +2026,8 @@ static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata)
+ for (i = 0; i < pdata->tx_q_count; i++)
+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo_size);
+
+- netdev_notice(pdata->netdev, "%d Tx queues, %d byte fifo per queue\n",
++ netdev_notice(pdata->netdev,
++ "%d Tx hardware queues, %d byte fifo per queue\n",
+ pdata->tx_q_count, ((fifo_size + 1) * 256));
+ }
+
+@@ -1991,7 +2042,8 @@ static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata)
+ for (i = 0; i < pdata->rx_q_count; i++)
+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo_size);
+
+- netdev_notice(pdata->netdev, "%d Rx queues, %d byte fifo per queue\n",
++ netdev_notice(pdata->netdev,
++ "%d Rx hardware queues, %d byte fifo per queue\n",
+ pdata->rx_q_count, ((fifo_size + 1) * 256));
+ }
+
+@@ -2107,6 +2159,23 @@ static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata)
+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);
+ }
+
++static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata)
++{
++ switch (pdata->phy_speed) {
++ case SPEED_10000:
++ xgbe_set_xgmii_speed(pdata);
++ break;
++
++ case SPEED_2500:
++ xgbe_set_gmii_2500_speed(pdata);
++ break;
++
++ case SPEED_1000:
++ xgbe_set_gmii_speed(pdata);
++ break;
++ }
++}
++
+ static void xgbe_config_checksum_offload(struct xgbe_prv_data *pdata)
+ {
+ if (pdata->netdev->features & NETIF_F_RXCSUM)
+@@ -2755,8 +2824,10 @@ static int xgbe_init(struct xgbe_prv_data *pdata)
+ * Initialize MAC related features
+ */
+ xgbe_config_mac_address(pdata);
++ xgbe_config_rx_mode(pdata);
+ xgbe_config_jumbo_enable(pdata);
+ xgbe_config_flow_control(pdata);
++ xgbe_config_mac_speed(pdata);
+ xgbe_config_checksum_offload(pdata);
+ xgbe_config_vlan_support(pdata);
+ xgbe_config_mmc(pdata);
+@@ -2773,10 +2844,8 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)
+
+ hw_if->tx_complete = xgbe_tx_complete;
+
+- hw_if->set_promiscuous_mode = xgbe_set_promiscuous_mode;
+- hw_if->set_all_multicast_mode = xgbe_set_all_multicast_mode;
+- hw_if->add_mac_addresses = xgbe_add_mac_addresses;
+ hw_if->set_mac_address = xgbe_set_mac_address;
++ hw_if->config_rx_mode = xgbe_config_rx_mode;
+
+ hw_if->enable_rx_csum = xgbe_enable_rx_csum;
+ hw_if->disable_rx_csum = xgbe_disable_rx_csum;
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c
+index e5ffb2c..343bf6a 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c
+@@ -129,7 +129,6 @@
+
+ static int xgbe_one_poll(struct napi_struct *, int);
+ static int xgbe_all_poll(struct napi_struct *, int);
+-static void xgbe_set_rx_mode(struct net_device *);
+
+ static int xgbe_alloc_channels(struct xgbe_prv_data *pdata)
+ {
+@@ -225,6 +224,11 @@ static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)
+ return (ring->rdesc_count - (ring->cur - ring->dirty));
+ }
+
++static inline unsigned int xgbe_rx_dirty_desc(struct xgbe_ring *ring)
++{
++ return (ring->cur - ring->dirty);
++}
++
+ static int xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel,
+ struct xgbe_ring *ring, unsigned int count)
+ {
+@@ -337,12 +341,13 @@ static irqreturn_t xgbe_isr(int irq, void *data)
+ dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
+ DBGPR(" DMA_CH%u_ISR = %08x\n", i, dma_ch_isr);
+
+- /* If we get a TI or RI interrupt that means per channel DMA
+- * interrupts are not enabled, so we use the private data napi
+- * structure, not the per channel napi structure
++ /* The TI or RI interrupt bits may still be set even if using
++ * per channel DMA interrupts. Check to be sure those are not
++ * enabled before using the private data napi structure.
+ */
+- if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
+- XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI)) {
++ if (!pdata->per_channel_irq &&
++ (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
++ XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {
+ if (napi_schedule_prep(&pdata->napi)) {
+ /* Disable Tx and Rx interrupts */
+ xgbe_disable_rx_tx_ints(pdata);
+@@ -405,26 +410,20 @@ static irqreturn_t xgbe_dma_isr(int irq, void *data)
+ return IRQ_HANDLED;
+ }
+
+-static enum hrtimer_restart xgbe_tx_timer(struct hrtimer *timer)
++static void xgbe_tx_timer(unsigned long data)
+ {
+- struct xgbe_channel *channel = container_of(timer,
+- struct xgbe_channel,
+- tx_timer);
+- struct xgbe_ring *ring = channel->tx_ring;
++ struct xgbe_channel *channel = (struct xgbe_channel *)data;
+ struct xgbe_prv_data *pdata = channel->pdata;
+ struct napi_struct *napi;
+- unsigned long flags;
+
+ DBGPR("-->xgbe_tx_timer\n");
+
+ napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
+
+- spin_lock_irqsave(&ring->lock, flags);
+-
+ if (napi_schedule_prep(napi)) {
+ /* Disable Tx and Rx interrupts */
+ if (pdata->per_channel_irq)
+- disable_irq(channel->dma_irq);
++ disable_irq_nosync(channel->dma_irq);
+ else
+ xgbe_disable_rx_tx_ints(pdata);
+
+@@ -434,11 +433,7 @@ static enum hrtimer_restart xgbe_tx_timer(struct hrtimer *timer)
+
+ channel->tx_timer_active = 0;
+
+- spin_unlock_irqrestore(&ring->lock, flags);
+-
+ DBGPR("<--xgbe_tx_timer\n");
+-
+- return HRTIMER_NORESTART;
+ }
+
+ static void xgbe_init_tx_timers(struct xgbe_prv_data *pdata)
+@@ -454,9 +449,8 @@ static void xgbe_init_tx_timers(struct xgbe_prv_data *pdata)
+ break;
+
+ DBGPR(" %s adding tx timer\n", channel->name);
+- hrtimer_init(&channel->tx_timer, CLOCK_MONOTONIC,
+- HRTIMER_MODE_REL);
+- channel->tx_timer.function = xgbe_tx_timer;
++ setup_timer(&channel->tx_timer, xgbe_tx_timer,
++ (unsigned long)channel);
+ }
+
+ DBGPR("<--xgbe_init_tx_timers\n");
+@@ -475,8 +469,7 @@ static void xgbe_stop_tx_timers(struct xgbe_prv_data *pdata)
+ break;
+
+ DBGPR(" %s deleting tx timer\n", channel->name);
+- channel->tx_timer_active = 0;
+- hrtimer_cancel(&channel->tx_timer);
++ del_timer_sync(&channel->tx_timer);
+ }
+
+ DBGPR("<--xgbe_stop_tx_timers\n");
+@@ -519,6 +512,7 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
+ RXFIFOSIZE);
+ hw_feat->tx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
+ TXFIFOSIZE);
++ hw_feat->dma_width = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADDR64);
+ hw_feat->dcb = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN);
+ hw_feat->sph = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN);
+ hw_feat->tso = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN);
+@@ -553,6 +547,21 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
+ break;
+ }
+
++ /* Translate the address width setting into actual number */
++ switch (hw_feat->dma_width) {
++ case 0:
++ hw_feat->dma_width = 32;
++ break;
++ case 1:
++ hw_feat->dma_width = 40;
++ break;
++ case 2:
++ hw_feat->dma_width = 48;
++ break;
++ default:
++ hw_feat->dma_width = 32;
++ }
++
+ /* The Queue, Channel and TC counts are zero based so increment them
+ * to get the actual number
+ */
+@@ -609,6 +618,68 @@ static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
+ }
+ }
+
++static int xgbe_request_irqs(struct xgbe_prv_data *pdata)
++{
++ struct xgbe_channel *channel;
++ struct net_device *netdev = pdata->netdev;
++ unsigned int i;
++ int ret;
++
++ ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
++ netdev->name, pdata);
++ if (ret) {
++ netdev_alert(netdev, "error requesting irq %d\n",
++ pdata->dev_irq);
++ return ret;
++ }
++
++ if (!pdata->per_channel_irq)
++ return 0;
++
++ channel = pdata->channel;
++ for (i = 0; i < pdata->channel_count; i++, channel++) {
++ snprintf(channel->dma_irq_name,
++ sizeof(channel->dma_irq_name) - 1,
++ "%s-TxRx-%u", netdev_name(netdev),
++ channel->queue_index);
++
++ ret = devm_request_irq(pdata->dev, channel->dma_irq,
++ xgbe_dma_isr, 0,
++ channel->dma_irq_name, channel);
++ if (ret) {
++ netdev_alert(netdev, "error requesting irq %d\n",
++ channel->dma_irq);
++ goto err_irq;
++ }
++ }
++
++ return 0;
++
++err_irq:
++ /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
++ for (i--, channel--; i < pdata->channel_count; i--, channel--)
++ devm_free_irq(pdata->dev, channel->dma_irq, channel);
++
++ devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
++
++ return ret;
++}
++
++static void xgbe_free_irqs(struct xgbe_prv_data *pdata)
++{
++ struct xgbe_channel *channel;
++ unsigned int i;
++
++ devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
++
++ if (!pdata->per_channel_irq)
++ return;
++
++ channel = pdata->channel;
++ for (i = 0; i < pdata->channel_count; i++, channel++)
++ devm_free_irq(pdata->dev, channel->dma_irq, channel);
++}
++
+ void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)
+ {
+ struct xgbe_hw_if *hw_if = &pdata->hw_if;
+@@ -630,6 +701,7 @@ void xgbe_init_rx_coalesce(struct xgbe_prv_data *pdata)
+ DBGPR("-->xgbe_init_rx_coalesce\n");
+
+ pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS);
++ pdata->rx_usecs = XGMAC_INIT_DMA_RX_USECS;
+ pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES;
+
+ hw_if->config_rx_coalesce(pdata);
+@@ -694,7 +766,7 @@ static void xgbe_adjust_link(struct net_device *netdev)
+ struct phy_device *phydev = pdata->phydev;
+ int new_state = 0;
+
+- if (phydev == NULL)
++ if (!phydev)
+ return;
+
+ if (phydev->link) {
+@@ -810,20 +882,20 @@ int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
+ return -EINVAL;
+ }
+
+- phy_stop(pdata->phydev);
+-
+ spin_lock_irqsave(&pdata->lock, flags);
+
+ if (caller == XGMAC_DRIVER_CONTEXT)
+ netif_device_detach(netdev);
+
+ netif_tx_stop_all_queues(netdev);
+- xgbe_napi_disable(pdata, 0);
+
+- /* Powerdown Tx/Rx */
+ hw_if->powerdown_tx(pdata);
+ hw_if->powerdown_rx(pdata);
+
++ xgbe_napi_disable(pdata, 0);
++
++ phy_stop(pdata->phydev);
++
+ pdata->power_down = 1;
+
+ spin_unlock_irqrestore(&pdata->lock, flags);
+@@ -854,14 +926,14 @@ int xgbe_powerup(struct net_device *netdev, unsigned int caller)
+
+ phy_start(pdata->phydev);
+
+- /* Enable Tx/Rx */
++ xgbe_napi_enable(pdata, 0);
++
+ hw_if->powerup_tx(pdata);
+ hw_if->powerup_rx(pdata);
+
+ if (caller == XGMAC_DRIVER_CONTEXT)
+ netif_device_attach(netdev);
+
+- xgbe_napi_enable(pdata, 0);
+ netif_tx_start_all_queues(netdev);
+
+ spin_unlock_irqrestore(&pdata->lock, flags);
+@@ -875,26 +947,39 @@ static int xgbe_start(struct xgbe_prv_data *pdata)
+ {
+ struct xgbe_hw_if *hw_if = &pdata->hw_if;
+ struct net_device *netdev = pdata->netdev;
++ int ret;
+
+ DBGPR("-->xgbe_start\n");
+
+- xgbe_set_rx_mode(netdev);
+-
+ hw_if->init(pdata);
+
+ phy_start(pdata->phydev);
+
++ xgbe_napi_enable(pdata, 1);
++
++ ret = xgbe_request_irqs(pdata);
++ if (ret)
++ goto err_napi;
++
+ hw_if->enable_tx(pdata);
+ hw_if->enable_rx(pdata);
+
+ xgbe_init_tx_timers(pdata);
+
+- xgbe_napi_enable(pdata, 1);
+ netif_tx_start_all_queues(netdev);
+
+ DBGPR("<--xgbe_start\n");
+
+ return 0;
++
++err_napi:
++ xgbe_napi_disable(pdata, 1);
++
++ phy_stop(pdata->phydev);
++
++ hw_if->exit(pdata);
++
++ return ret;
+ }
+
+ static void xgbe_stop(struct xgbe_prv_data *pdata)
+@@ -907,16 +992,21 @@ static void xgbe_stop(struct xgbe_prv_data *pdata)
+
+ DBGPR("-->xgbe_stop\n");
+
+- phy_stop(pdata->phydev);
+-
+ netif_tx_stop_all_queues(netdev);
+- xgbe_napi_disable(pdata, 1);
+
+ xgbe_stop_tx_timers(pdata);
+
+ hw_if->disable_tx(pdata);
+ hw_if->disable_rx(pdata);
+
++ xgbe_free_irqs(pdata);
++
++ xgbe_napi_disable(pdata, 1);
++
++ phy_stop(pdata->phydev);
++
++ hw_if->exit(pdata);
++
+ channel = pdata->channel;
+ for (i = 0; i < pdata->channel_count; i++, channel++) {
+ if (!channel->tx_ring)
+@@ -929,12 +1019,8 @@ static void xgbe_stop(struct xgbe_prv_data *pdata)
+ DBGPR("<--xgbe_stop\n");
+ }
+
+-static void xgbe_restart_dev(struct xgbe_prv_data *pdata, unsigned int reset)
++static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
+ {
+- struct xgbe_channel *channel;
+- struct xgbe_hw_if *hw_if = &pdata->hw_if;
+- unsigned int i;
+-
+ DBGPR("-->xgbe_restart_dev\n");
+
+ /* If not running, "restart" will happen on open */
+@@ -942,20 +1028,10 @@ static void xgbe_restart_dev(struct xgbe_prv_data *pdata, unsigned int reset)
+ return;
+
+ xgbe_stop(pdata);
+- synchronize_irq(pdata->dev_irq);
+- if (pdata->per_channel_irq) {
+- channel = pdata->channel;
+- for (i = 0; i < pdata->channel_count; i++, channel++)
+- synchronize_irq(channel->dma_irq);
+- }
+
+ xgbe_free_tx_data(pdata);
+ xgbe_free_rx_data(pdata);
+
+- /* Issue software reset to device if requested */
+- if (reset)
+- hw_if->exit(pdata);
+-
+ xgbe_start(pdata);
+
+ DBGPR("<--xgbe_restart_dev\n");
+@@ -969,7 +1045,7 @@ static void xgbe_restart(struct work_struct *work)
+
+ rtnl_lock();
+
+- xgbe_restart_dev(pdata, 1);
++ xgbe_restart_dev(pdata);
+
+ rtnl_unlock();
+ }
+@@ -1284,10 +1360,7 @@ static void xgbe_packet_info(struct xgbe_prv_data *pdata,
+ static int xgbe_open(struct net_device *netdev)
+ {
+ struct xgbe_prv_data *pdata = netdev_priv(netdev);
+- struct xgbe_hw_if *hw_if = &pdata->hw_if;
+ struct xgbe_desc_if *desc_if = &pdata->desc_if;
+- struct xgbe_channel *channel = NULL;
+- unsigned int i = 0;
+ int ret;
+
+ DBGPR("-->xgbe_open\n");
+@@ -1330,55 +1403,14 @@ static int xgbe_open(struct net_device *netdev)
+ INIT_WORK(&pdata->restart_work, xgbe_restart);
+ INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
+
+- /* Request interrupts */
+- ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
+- netdev->name, pdata);
+- if (ret) {
+- netdev_alert(netdev, "error requesting irq %d\n",
+- pdata->dev_irq);
+- goto err_rings;
+- }
+-
+- if (pdata->per_channel_irq) {
+- channel = pdata->channel;
+- for (i = 0; i < pdata->channel_count; i++, channel++) {
+- snprintf(channel->dma_irq_name,
+- sizeof(channel->dma_irq_name) - 1,
+- "%s-TxRx-%u", netdev_name(netdev),
+- channel->queue_index);
+-
+- ret = devm_request_irq(pdata->dev, channel->dma_irq,
+- xgbe_dma_isr, 0,
+- channel->dma_irq_name, channel);
+- if (ret) {
+- netdev_alert(netdev,
+- "error requesting irq %d\n",
+- channel->dma_irq);
+- goto err_irq;
+- }
+- }
+- }
+-
+ ret = xgbe_start(pdata);
+ if (ret)
+- goto err_start;
++ goto err_rings;
+
+ DBGPR("<--xgbe_open\n");
+
+ return 0;
+
+-err_start:
+- hw_if->exit(pdata);
+-
+-err_irq:
+- if (pdata->per_channel_irq) {
+- /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
+- for (i--, channel--; i < pdata->channel_count; i--, channel--)
+- devm_free_irq(pdata->dev, channel->dma_irq, channel);
+- }
+-
+- devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
+-
+ err_rings:
+ desc_if->free_ring_resources(pdata);
+
+@@ -1400,30 +1432,16 @@ err_phy_init:
+ static int xgbe_close(struct net_device *netdev)
+ {
+ struct xgbe_prv_data *pdata = netdev_priv(netdev);
+- struct xgbe_hw_if *hw_if = &pdata->hw_if;
+ struct xgbe_desc_if *desc_if = &pdata->desc_if;
+- struct xgbe_channel *channel;
+- unsigned int i;
+
+ DBGPR("-->xgbe_close\n");
+
+ /* Stop the device */
+ xgbe_stop(pdata);
+
+- /* Issue software reset to device */
+- hw_if->exit(pdata);
+-
+ /* Free the ring descriptors and buffers */
+ desc_if->free_ring_resources(pdata);
+
+- /* Release the interrupts */
+- devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
+- if (pdata->per_channel_irq) {
+- channel = pdata->channel;
+- for (i = 0; i < pdata->channel_count; i++, channel++)
+- devm_free_irq(pdata->dev, channel->dma_irq, channel);
+- }
+-
+ /* Free the channel and ring structures */
+ xgbe_free_channels(pdata);
+
+@@ -1448,7 +1466,6 @@ static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
+ struct xgbe_ring *ring;
+ struct xgbe_packet_data *packet;
+ struct netdev_queue *txq;
+- unsigned long flags;
+ int ret;
+
+ DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len);
+@@ -1460,8 +1477,6 @@ static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
+
+ ret = NETDEV_TX_OK;
+
+- spin_lock_irqsave(&ring->lock, flags);
+-
+ if (skb->len == 0) {
+ netdev_err(netdev, "empty skb received from stack\n");
+ dev_kfree_skb_any(skb);
+@@ -1508,10 +1523,6 @@ static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
+ ret = NETDEV_TX_OK;
+
+ tx_netdev_return:
+- spin_unlock_irqrestore(&ring->lock, flags);
+-
+- DBGPR("<--xgbe_xmit\n");
+-
+ return ret;
+ }
+
+@@ -1519,17 +1530,10 @@ static void xgbe_set_rx_mode(struct net_device *netdev)
+ {
+ struct xgbe_prv_data *pdata = netdev_priv(netdev);
+ struct xgbe_hw_if *hw_if = &pdata->hw_if;
+- unsigned int pr_mode, am_mode;
+
+ DBGPR("-->xgbe_set_rx_mode\n");
+
+- pr_mode = ((netdev->flags & IFF_PROMISC) != 0);
+- am_mode = ((netdev->flags & IFF_ALLMULTI) != 0);
+-
+- hw_if->set_promiscuous_mode(pdata, pr_mode);
+- hw_if->set_all_multicast_mode(pdata, am_mode);
+-
+- hw_if->add_mac_addresses(pdata);
++ hw_if->config_rx_mode(pdata);
+
+ DBGPR("<--xgbe_set_rx_mode\n");
+ }
+@@ -1589,13 +1593,21 @@ static int xgbe_change_mtu(struct net_device *netdev, int mtu)
+ pdata->rx_buf_size = ret;
+ netdev->mtu = mtu;
+
+- xgbe_restart_dev(pdata, 0);
++ xgbe_restart_dev(pdata);
+
+ DBGPR("<--xgbe_change_mtu\n");
+
+ return 0;
+ }
+
++static void xgbe_tx_timeout(struct net_device *netdev)
++{
++ struct xgbe_prv_data *pdata = netdev_priv(netdev);
++
++ netdev_warn(netdev, "tx timeout, device restarting\n");
++ schedule_work(&pdata->restart_work);
++}
++
+ static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,
+ struct rtnl_link_stats64 *s)
+ {
+@@ -1760,6 +1772,7 @@ static const struct net_device_ops xgbe_netdev_ops = {
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_do_ioctl = xgbe_ioctl,
+ .ndo_change_mtu = xgbe_change_mtu,
++ .ndo_tx_timeout = xgbe_tx_timeout,
+ .ndo_get_stats64 = xgbe_get_stats64,
+ .ndo_vlan_rx_add_vid = xgbe_vlan_rx_add_vid,
+ .ndo_vlan_rx_kill_vid = xgbe_vlan_rx_kill_vid,
+@@ -1778,29 +1791,44 @@ struct net_device_ops *xgbe_get_netdev_ops(void)
+ static void xgbe_rx_refresh(struct xgbe_channel *channel)
+ {
+ struct xgbe_prv_data *pdata = channel->pdata;
++ struct xgbe_hw_if *hw_if = &pdata->hw_if;
+ struct xgbe_desc_if *desc_if = &pdata->desc_if;
+ struct xgbe_ring *ring = channel->rx_ring;
+ struct xgbe_ring_data *rdata;
+
+- desc_if->realloc_rx_buffer(channel);
++ while (ring->dirty != ring->cur) {
++ rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
++
++ /* Reset rdata values */
++ desc_if->unmap_rdata(pdata, rdata);
++
++ if (desc_if->map_rx_buffer(pdata, ring, rdata))
++ break;
++
++ hw_if->rx_desc_reset(pdata, rdata, ring->dirty);
++
++ ring->dirty++;
++ }
++
++ /* Make sure everything is written before the register write */
++ wmb();
+
+ /* Update the Rx Tail Pointer Register with address of
+ * the last cleaned entry */
+- rdata = XGBE_GET_DESC_DATA(ring, ring->rx.realloc_index - 1);
++ rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1);
+ XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
+ lower_32_bits(rdata->rdesc_dma));
+ }
+
+-static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,
++static struct sk_buff *xgbe_create_skb(struct napi_struct *napi,
+ struct xgbe_ring_data *rdata,
+ unsigned int *len)
+ {
+- struct net_device *netdev = pdata->netdev;
+ struct sk_buff *skb;
+ u8 *packet;
+ unsigned int copy_len;
+
+- skb = netdev_alloc_skb_ip_align(netdev, rdata->rx.hdr.dma_len);
++ skb = napi_alloc_skb(napi, rdata->rx.hdr.dma_len);
+ if (!skb)
+ return NULL;
+
+@@ -1826,7 +1854,6 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)
+ struct xgbe_ring_desc *rdesc;
+ struct net_device *netdev = pdata->netdev;
+ struct netdev_queue *txq;
+- unsigned long flags;
+ int processed = 0;
+ unsigned int tx_packets = 0, tx_bytes = 0;
+
+@@ -1838,8 +1865,6 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)
+
+ txq = netdev_get_tx_queue(netdev, channel->queue_index);
+
+- spin_lock_irqsave(&ring->lock, flags);
+-
+ while ((processed < XGBE_TX_DESC_MAX_PROC) &&
+ (ring->dirty != ring->cur)) {
+ rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
+@@ -1850,7 +1875,7 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)
+
+ /* Make sure descriptor fields are read after reading the OWN
+ * bit */
+- rmb();
++ dma_rmb();
+
+ #ifdef XGMAC_ENABLE_TX_DESC_DUMP
+ xgbe_dump_tx_desc(ring, ring->dirty, 1, 0);
+@@ -1870,7 +1895,7 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)
+ }
+
+ if (!processed)
+- goto unlock;
++ return 0;
+
+ netdev_tx_completed_queue(txq, tx_packets, tx_bytes);
+
+@@ -1882,9 +1907,6 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)
+
+ DBGPR("<--xgbe_tx_poll: processed=%d\n", processed);
+
+-unlock:
+- spin_unlock_irqrestore(&ring->lock, flags);
+-
+ return processed;
+ }
+
+@@ -1936,7 +1958,7 @@ static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)
+ read_again:
+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
+
+- if (ring->dirty > (XGBE_RX_DESC_CNT >> 3))
++ if (xgbe_rx_dirty_desc(ring) > (XGBE_RX_DESC_CNT >> 3))
+ xgbe_rx_refresh(channel);
+
+ if (hw_if->dev_read(channel))
+@@ -1944,7 +1966,6 @@ read_again:
+
+ received++;
+ ring->cur++;
+- ring->dirty++;
+
+ incomplete = XGMAC_GET_BITS(packet->attributes,
+ RX_PACKET_ATTRIBUTES,
+@@ -1977,7 +1998,7 @@ read_again:
+ rdata->rx.hdr.dma_len,
+ DMA_FROM_DEVICE);
+
+- skb = xgbe_create_skb(pdata, rdata, &put_len);
++ skb = xgbe_create_skb(napi, rdata, &put_len);
+ if (!skb) {
+ error = 1;
+ goto skip_data;
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c
+index ebf4893..5f149e8 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c
+@@ -291,7 +291,6 @@ static int xgbe_get_settings(struct net_device *netdev,
+ return -ENODEV;
+
+ ret = phy_ethtool_gset(pdata->phydev, cmd);
+- cmd->transceiver = XCVR_EXTERNAL;
+
+ DBGPR("<--xgbe_get_settings\n");
+
+@@ -378,18 +377,14 @@ static int xgbe_get_coalesce(struct net_device *netdev,
+ struct ethtool_coalesce *ec)
+ {
+ struct xgbe_prv_data *pdata = netdev_priv(netdev);
+- struct xgbe_hw_if *hw_if = &pdata->hw_if;
+- unsigned int riwt;
+
+ DBGPR("-->xgbe_get_coalesce\n");
+
+ memset(ec, 0, sizeof(struct ethtool_coalesce));
+
+- riwt = pdata->rx_riwt;
+- ec->rx_coalesce_usecs = hw_if->riwt_to_usec(pdata, riwt);
++ ec->rx_coalesce_usecs = pdata->rx_usecs;
+ ec->rx_max_coalesced_frames = pdata->rx_frames;
+
+- ec->tx_coalesce_usecs = pdata->tx_usecs;
+ ec->tx_max_coalesced_frames = pdata->tx_frames;
+
+ DBGPR("<--xgbe_get_coalesce\n");
+@@ -403,13 +398,14 @@ static int xgbe_set_coalesce(struct net_device *netdev,
+ struct xgbe_prv_data *pdata = netdev_priv(netdev);
+ struct xgbe_hw_if *hw_if = &pdata->hw_if;
+ unsigned int rx_frames, rx_riwt, rx_usecs;
+- unsigned int tx_frames, tx_usecs;
++ unsigned int tx_frames;
+
+ DBGPR("-->xgbe_set_coalesce\n");
+
+ /* Check for not supported parameters */
+ if ((ec->rx_coalesce_usecs_irq) ||
+ (ec->rx_max_coalesced_frames_irq) ||
++ (ec->tx_coalesce_usecs) ||
+ (ec->tx_coalesce_usecs_irq) ||
+ (ec->tx_max_coalesced_frames_irq) ||
+ (ec->stats_block_coalesce_usecs) ||
+@@ -428,28 +424,18 @@ static int xgbe_set_coalesce(struct net_device *netdev,
+ (ec->rate_sample_interval))
+ return -EOPNOTSUPP;
+
+- /* Can only change rx-frames when interface is down (see
+- * rx_descriptor_init in xgbe-dev.c)
+- */
+- rx_frames = pdata->rx_frames;
+- if (rx_frames != ec->rx_max_coalesced_frames && netif_running(netdev)) {
+- netdev_alert(netdev,
+- "interface must be down to change rx-frames\n");
+- return -EINVAL;
+- }
+-
+ rx_riwt = hw_if->usec_to_riwt(pdata, ec->rx_coalesce_usecs);
++ rx_usecs = ec->rx_coalesce_usecs;
+ rx_frames = ec->rx_max_coalesced_frames;
+
+ /* Use smallest possible value if conversion resulted in zero */
+- if (ec->rx_coalesce_usecs && !rx_riwt)
++ if (rx_usecs && !rx_riwt)
+ rx_riwt = 1;
+
+ /* Check the bounds of values for Rx */
+ if (rx_riwt > XGMAC_MAX_DMA_RIWT) {
+- rx_usecs = hw_if->riwt_to_usec(pdata, XGMAC_MAX_DMA_RIWT);
+ netdev_alert(netdev, "rx-usec is limited to %d usecs\n",
+- rx_usecs);
++ hw_if->riwt_to_usec(pdata, XGMAC_MAX_DMA_RIWT));
+ return -EINVAL;
+ }
+ if (rx_frames > pdata->rx_desc_count) {
+@@ -458,7 +444,6 @@ static int xgbe_set_coalesce(struct net_device *netdev,
+ return -EINVAL;
+ }
+
+- tx_usecs = ec->tx_coalesce_usecs;
+ tx_frames = ec->tx_max_coalesced_frames;
+
+ /* Check the bounds of values for Tx */
+@@ -469,10 +454,10 @@ static int xgbe_set_coalesce(struct net_device *netdev,
+ }
+
+ pdata->rx_riwt = rx_riwt;
++ pdata->rx_usecs = rx_usecs;
+ pdata->rx_frames = rx_frames;
+ hw_if->config_rx_coalesce(pdata);
+
+- pdata->tx_usecs = tx_usecs;
+ pdata->tx_frames = tx_frames;
+ hw_if->config_tx_coalesce(pdata);
+
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-main.c b/drivers/net/ethernet/amd/xgbe/xgbe-main.c
+index dbd3850..7149053 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-main.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-main.c
+@@ -123,7 +123,10 @@
+ #include <linux/io.h>
+ #include <linux/of.h>
+ #include <linux/of_net.h>
++#include <linux/of_address.h>
+ #include <linux/clk.h>
++#include <linux/property.h>
++#include <linux/acpi.h>
+
+ #include "xgbe.h"
+ #include "xgbe-common.h"
+@@ -148,6 +151,7 @@ static void xgbe_default_config(struct xgbe_prv_data *pdata)
+ pdata->pause_autoneg = 1;
+ pdata->tx_pause = 1;
+ pdata->rx_pause = 1;
++ pdata->phy_speed = SPEED_UNKNOWN;
+ pdata->power_down = 0;
+ pdata->default_autoneg = AUTONEG_ENABLE;
+ pdata->default_speed = SPEED_10000;
+@@ -161,6 +165,96 @@ static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
+ xgbe_init_function_ptrs_desc(&pdata->desc_if);
+ }
+
++#ifdef CONFIG_ACPI
++static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
++{
++ struct acpi_device *adev = pdata->adev;
++ struct device *dev = pdata->dev;
++ u32 property;
++ acpi_handle handle;
++ acpi_status status;
++ unsigned long long data;
++ int cca;
++ int ret;
++
++ /* Obtain the system clock setting */
++ ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property);
++ if (ret) {
++ dev_err(dev, "unable to obtain %s property\n",
++ XGBE_ACPI_DMA_FREQ);
++ return ret;
++ }
++ pdata->sysclk_rate = property;
++
++ /* Obtain the PTP clock setting */
++ ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property);
++ if (ret) {
++ dev_err(dev, "unable to obtain %s property\n",
++ XGBE_ACPI_PTP_FREQ);
++ return ret;
++ }
++ pdata->ptpclk_rate = property;
++
++ /* Retrieve the device cache coherency value */
++ handle = adev->handle;
++ do {
++ status = acpi_evaluate_integer(handle, "_CCA", NULL, &data);
++ if (!ACPI_FAILURE(status)) {
++ cca = data;
++ break;
++ }
++
++ status = acpi_get_parent(handle, &handle);
++ } while (!ACPI_FAILURE(status));
++
++ if (ACPI_FAILURE(status)) {
++ dev_err(dev, "error obtaining acpi coherency value\n");
++ return -EINVAL;
++ }
++ pdata->coherent = !!cca;
++
++ return 0;
++}
++#else /* CONFIG_ACPI */
++static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
++{
++ return -EINVAL;
++}
++#endif /* CONFIG_ACPI */
++
++#ifdef CONFIG_OF
++static int xgbe_of_support(struct xgbe_prv_data *pdata)
++{
++ struct device *dev = pdata->dev;
++
++ /* Obtain the system clock setting */
++ pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
++ if (IS_ERR(pdata->sysclk)) {
++ dev_err(dev, "dma devm_clk_get failed\n");
++ return PTR_ERR(pdata->sysclk);
++ }
++ pdata->sysclk_rate = clk_get_rate(pdata->sysclk);
++
++ /* Obtain the PTP clock setting */
++ pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
++ if (IS_ERR(pdata->ptpclk)) {
++ dev_err(dev, "ptp devm_clk_get failed\n");
++ return PTR_ERR(pdata->ptpclk);
++ }
++ pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk);
++
++ /* Retrieve the device cache coherency value */
++ pdata->coherent = of_dma_is_coherent(dev->of_node);
++
++ return 0;
++}
++#else /* CONFIG_OF */
++static int xgbe_of_support(struct xgbe_prv_data *pdata)
++{
++ return -EINVAL;
++}
++#endif /*CONFIG_OF */
++
+ static int xgbe_probe(struct platform_device *pdev)
+ {
+ struct xgbe_prv_data *pdata;
+@@ -169,7 +263,7 @@ static int xgbe_probe(struct platform_device *pdev)
+ struct net_device *netdev;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+- const u8 *mac_addr;
++ const char *phy_mode;
+ unsigned int i;
+ int ret;
+
+@@ -186,6 +280,7 @@ static int xgbe_probe(struct platform_device *pdev)
+ pdata = netdev_priv(netdev);
+ pdata->netdev = netdev;
+ pdata->pdev = pdev;
++ pdata->adev = ACPI_COMPANION(dev);
+ pdata->dev = dev;
+ platform_set_drvdata(pdev, netdev);
+
+@@ -194,6 +289,9 @@ static int xgbe_probe(struct platform_device *pdev)
+ mutex_init(&pdata->rss_mutex);
+ spin_lock_init(&pdata->tstamp_lock);
+
++ /* Check if we should use ACPI or DT */
++ pdata->use_acpi = (!pdata->adev || acpi_disabled) ? 0 : 1;
++
+ /* Set and validate the number of descriptors for a ring */
+ BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);
+ pdata->tx_desc_count = XGBE_TX_DESC_CNT;
+@@ -212,22 +310,6 @@ static int xgbe_probe(struct platform_device *pdev)
+ goto err_io;
+ }
+
+- /* Obtain the system clock setting */
+- pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
+- if (IS_ERR(pdata->sysclk)) {
+- dev_err(dev, "dma devm_clk_get failed\n");
+- ret = PTR_ERR(pdata->sysclk);
+- goto err_io;
+- }
+-
+- /* Obtain the PTP clock setting */
+- pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
+- if (IS_ERR(pdata->ptpclk)) {
+- dev_err(dev, "ptp devm_clk_get failed\n");
+- ret = PTR_ERR(pdata->ptpclk);
+- goto err_io;
+- }
+-
+ /* Obtain the mmio areas for the device */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pdata->xgmac_regs = devm_ioremap_resource(dev, res);
+@@ -247,16 +329,42 @@ static int xgbe_probe(struct platform_device *pdev)
+ }
+ DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs);
+
+- /* Set the DMA mask */
+- if (!dev->dma_mask)
+- dev->dma_mask = &dev->coherent_dma_mask;
+- ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
+- if (ret) {
+- dev_err(dev, "dma_set_mask_and_coherent failed\n");
++ /* Retrieve the MAC address */
++ ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,
++ pdata->mac_addr,
++ sizeof(pdata->mac_addr));
++ if (ret || !is_valid_ether_addr(pdata->mac_addr)) {
++ dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);
++ if (!ret)
++ ret = -EINVAL;
+ goto err_io;
+ }
+
+- if (of_property_read_bool(dev->of_node, "dma-coherent")) {
++ /* Retrieve the PHY mode - it must be "xgmii" */
++ ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,
++ &phy_mode);
++ if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {
++ dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);
++ if (!ret)
++ ret = -EINVAL;
++ goto err_io;
++ }
++ pdata->phy_mode = PHY_INTERFACE_MODE_XGMII;
++
++ /* Check for per channel interrupt support */
++ if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY))
++ pdata->per_channel_irq = 1;
++
++ /* Obtain device settings unique to ACPI/OF */
++ if (pdata->use_acpi)
++ ret = xgbe_acpi_support(pdata);
++ else
++ ret = xgbe_of_support(pdata);
++ if (ret)
++ goto err_io;
++
++ /* Set the DMA coherency values */
++ if (pdata->coherent) {
+ pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
+ pdata->arcache = XGBE_DMA_OS_ARCACHE;
+ pdata->awcache = XGBE_DMA_OS_AWCACHE;
+@@ -266,10 +374,7 @@ static int xgbe_probe(struct platform_device *pdev)
+ pdata->awcache = XGBE_DMA_SYS_AWCACHE;
+ }
+
+- /* Check for per channel interrupt support */
+- if (of_property_read_bool(dev->of_node, XGBE_DMA_IRQS))
+- pdata->per_channel_irq = 1;
+-
++ /* Get the device interrupt */
+ ret = platform_get_irq(pdev, 0);
+ if (ret < 0) {
+ dev_err(dev, "platform_get_irq 0 failed\n");
+@@ -279,6 +384,7 @@ static int xgbe_probe(struct platform_device *pdev)
+
+ netdev->irq = pdata->dev_irq;
+ netdev->base_addr = (unsigned long)pdata->xgmac_regs;
++ memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len);
+
+ /* Set all the function pointers */
+ xgbe_init_all_fptrs(pdata);
+@@ -291,26 +397,19 @@ static int xgbe_probe(struct platform_device *pdev)
+ /* Populate the hardware features */
+ xgbe_get_all_hw_features(pdata);
+
+- /* Retrieve the MAC address */
+- mac_addr = of_get_mac_address(dev->of_node);
+- if (!mac_addr) {
+- dev_err(dev, "invalid mac address for this device\n");
+- ret = -EINVAL;
+- goto err_io;
+- }
+- memcpy(netdev->dev_addr, mac_addr, netdev->addr_len);
++ /* Set default configuration data */
++ xgbe_default_config(pdata);
+
+- /* Retrieve the PHY mode - it must be "xgmii" */
+- pdata->phy_mode = of_get_phy_mode(dev->of_node);
+- if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
+- dev_err(dev, "invalid phy-mode specified for this device\n");
+- ret = -EINVAL;
++ /* Set the DMA mask */
++ if (!dev->dma_mask)
++ dev->dma_mask = &dev->coherent_dma_mask;
++ ret = dma_set_mask_and_coherent(dev,
++ DMA_BIT_MASK(pdata->hw_feat.dma_width));
++ if (ret) {
++ dev_err(dev, "dma_set_mask_and_coherent failed\n");
+ goto err_io;
+ }
+
+- /* Set default configuration data */
+- xgbe_default_config(pdata);
+-
+ /* Calculate the number of Tx and Rx rings to be created
+ * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set
+ * the number of Tx queues to the number of Tx channels
+@@ -392,6 +491,9 @@ static int xgbe_probe(struct platform_device *pdev)
+
+ netdev->priv_flags |= IFF_UNICAST_FLT;
+
++ /* Use default watchdog timeout */
++ netdev->watchdog_timeo = 0;
++
+ xgbe_init_rx_coalesce(pdata);
+ xgbe_init_tx_coalesce(pdata);
+
+@@ -491,18 +593,35 @@ static int xgbe_resume(struct device *dev)
+ }
+ #endif /* CONFIG_PM */
+
++#ifdef CONFIG_ACPI
++static const struct acpi_device_id xgbe_acpi_match[] = {
++ { "AMDI8001", 0 },
++ {},
++};
++
++MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);
++#endif
++
++#ifdef CONFIG_OF
+ static const struct of_device_id xgbe_of_match[] = {
+ { .compatible = "amd,xgbe-seattle-v1a", },
+ {},
+ };
+
+ MODULE_DEVICE_TABLE(of, xgbe_of_match);
++#endif
++
+ static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
+
+ static struct platform_driver xgbe_driver = {
+ .driver = {
+ .name = "amd-xgbe",
++#ifdef CONFIG_ACPI
++ .acpi_match_table = xgbe_acpi_match,
++#endif
++#ifdef CONFIG_OF
+ .of_match_table = xgbe_of_match,
++#endif
+ .pm = &xgbe_pm_ops,
+ },
+ .probe = xgbe_probe,
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
+index 363b210..59e267f 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
+@@ -205,25 +205,16 @@ void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)
+
+ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
+ {
+- struct device_node *phy_node;
+ struct mii_bus *mii;
+ struct phy_device *phydev;
+ int ret = 0;
+
+ DBGPR("-->xgbe_mdio_register\n");
+
+- /* Retrieve the phy-handle */
+- phy_node = of_parse_phandle(pdata->dev->of_node, "phy-handle", 0);
+- if (!phy_node) {
+- dev_err(pdata->dev, "unable to parse phy-handle\n");
+- return -EINVAL;
+- }
+-
+ mii = mdiobus_alloc();
+- if (mii == NULL) {
++ if (!mii) {
+ dev_err(pdata->dev, "mdiobus_alloc failed\n");
+- ret = -ENOMEM;
+- goto err_node_get;
++ return -ENOMEM;
+ }
+
+ /* Register on the MDIO bus (don't probe any PHYs) */
+@@ -252,18 +243,19 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
+ request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT,
+ MDIO_ID_ARGS(phydev->c45_ids.device_ids[MDIO_MMD_PCS]));
+
+- of_node_get(phy_node);
+- phydev->dev.of_node = phy_node;
+ ret = phy_device_register(phydev);
+ if (ret) {
+ dev_err(pdata->dev, "phy_device_register failed\n");
+- of_node_put(phy_node);
++ goto err_phy_device;
++ }
++ if (!phydev->dev.driver) {
++ dev_err(pdata->dev, "phy driver probe failed\n");
++ ret = -EIO;
+ goto err_phy_device;
+ }
+
+ /* Add a reference to the PHY driver so it can't be unloaded */
+- pdata->phy_module = phydev->dev.driver ?
+- phydev->dev.driver->owner : NULL;
++ pdata->phy_module = phydev->dev.driver->owner;
+ if (!try_module_get(pdata->phy_module)) {
+ dev_err(pdata->dev, "try_module_get failed\n");
+ ret = -EIO;
+@@ -283,8 +275,6 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
+
+ pdata->phydev = phydev;
+
+- of_node_put(phy_node);
+-
+ DBGPHY_REGS(pdata);
+
+ DBGPR("<--xgbe_mdio_register\n");
+@@ -300,9 +290,6 @@ err_mdiobus_register:
+ err_mdiobus_alloc:
+ mdiobus_free(mii);
+
+-err_node_get:
+- of_node_put(phy_node);
+-
+ return ret;
+ }
+
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
+index a1bf9d1c..f0d0ac6 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
++++ b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c
+@@ -171,21 +171,15 @@ static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta)
+ struct xgbe_prv_data,
+ ptp_clock_info);
+ unsigned long flags;
+- u64 nsec;
+
+ spin_lock_irqsave(&pdata->tstamp_lock, flags);
+-
+- nsec = timecounter_read(&pdata->tstamp_tc);
+-
+- nsec += delta;
+- timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec);
+-
++ timecounter_adjtime(&pdata->tstamp_tc, delta);
+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
+
+ return 0;
+ }
+
+-static int xgbe_gettime(struct ptp_clock_info *info, struct timespec *ts)
++static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts)
+ {
+ struct xgbe_prv_data *pdata = container_of(info,
+ struct xgbe_prv_data,
+@@ -199,12 +193,13 @@ static int xgbe_gettime(struct ptp_clock_info *info, struct timespec *ts)
+
+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
+
+- *ts = ns_to_timespec(nsec);
++ *ts = ns_to_timespec64(nsec);
+
+ return 0;
+ }
+
+-static int xgbe_settime(struct ptp_clock_info *info, const struct timespec *ts)
++static int xgbe_settime(struct ptp_clock_info *info,
++ const struct timespec64 *ts)
+ {
+ struct xgbe_prv_data *pdata = container_of(info,
+ struct xgbe_prv_data,
+@@ -212,7 +207,7 @@ static int xgbe_settime(struct ptp_clock_info *info, const struct timespec *ts)
+ unsigned long flags;
+ u64 nsec;
+
+- nsec = timespec_to_ns(ts);
++ nsec = timespec64_to_ns(ts);
+
+ spin_lock_irqsave(&pdata->tstamp_lock, flags);
+
+@@ -239,7 +234,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
+ snprintf(info->name, sizeof(info->name), "%s",
+ netdev_name(pdata->netdev));
+ info->owner = THIS_MODULE;
+- info->max_adj = clk_get_rate(pdata->ptpclk);
++ info->max_adj = pdata->ptpclk_rate;
+ info->adjfreq = xgbe_adjfreq;
+ info->adjtime = xgbe_adjtime;
+ info->gettime = xgbe_gettime;
+@@ -260,7 +255,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
+ */
+ dividend = 50000000;
+ dividend <<= 32;
+- pdata->tstamp_addend = div_u64(dividend, clk_get_rate(pdata->ptpclk));
++ pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate);
+
+ /* Setup the timecounter */
+ cc->read = xgbe_cc_read;
+diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h
+index f9ec762..2ef3ffb 100644
+--- a/drivers/net/ethernet/amd/xgbe/xgbe.h
++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h
+@@ -182,10 +182,18 @@
+ #define XGBE_PHY_NAME "amd_xgbe_phy"
+ #define XGBE_PRTAD 0
+
++/* Common property names */
++#define XGBE_MAC_ADDR_PROPERTY "mac-address"
++#define XGBE_PHY_MODE_PROPERTY "phy-mode"
++#define XGBE_DMA_IRQS_PROPERTY "amd,per-channel-interrupt"
++
+ /* Device-tree clock names */
+ #define XGBE_DMA_CLOCK "dma_clk"
+ #define XGBE_PTP_CLOCK "ptp_clk"
+-#define XGBE_DMA_IRQS "amd,per-channel-interrupt"
++
++/* ACPI property names */
++#define XGBE_ACPI_DMA_FREQ "amd,dma-freq"
++#define XGBE_ACPI_PTP_FREQ "amd,ptp-freq"
+
+ /* Timestamp support - values based on 50MHz PTP clock
+ * 50MHz => 20 nsec
+@@ -214,7 +222,7 @@
+ ((_idx) & ((_ring)->rdesc_count - 1)))
+
+ /* Default coalescing parameters */
+-#define XGMAC_INIT_DMA_TX_USECS 50
++#define XGMAC_INIT_DMA_TX_USECS 1000
+ #define XGMAC_INIT_DMA_TX_FRAMES 25
+
+ #define XGMAC_MAX_DMA_RIWT 0xff
+@@ -317,8 +325,6 @@ struct xgbe_ring_data {
+ struct xgbe_tx_ring_data tx; /* Tx-related data */
+ struct xgbe_rx_ring_data rx; /* Rx-related data */
+
+- unsigned int interrupt; /* Interrupt indicator */
+-
+ unsigned int mapped_as_page;
+
+ /* Incomplete receive save location. If the budget is exhausted
+@@ -361,8 +367,7 @@ struct xgbe_ring {
+ * cur - Tx: index of descriptor to be used for current transfer
+ * Rx: index of descriptor to check for packet availability
+ * dirty - Tx: index of descriptor to check for transfer complete
+- * Rx: count of descriptors in which a packet has been received
+- * (used with skb_realloc_index to refresh the ring)
++ * Rx: index of descriptor to check for buffer reallocation
+ */
+ unsigned int cur;
+ unsigned int dirty;
+@@ -377,11 +382,6 @@ struct xgbe_ring {
+ unsigned short cur_mss;
+ unsigned short cur_vlan_ctag;
+ } tx;
+-
+- struct {
+- unsigned int realloc_index;
+- unsigned int realloc_threshold;
+- } rx;
+ };
+ } ____cacheline_aligned;
+
+@@ -408,7 +408,7 @@ struct xgbe_channel {
+ unsigned int saved_ier;
+
+ unsigned int tx_timer_active;
+- struct hrtimer tx_timer;
++ struct timer_list tx_timer;
+
+ struct xgbe_ring *tx_ring;
+ struct xgbe_ring *rx_ring;
+@@ -495,10 +495,8 @@ struct xgbe_mmc_stats {
+ struct xgbe_hw_if {
+ int (*tx_complete)(struct xgbe_ring_desc *);
+
+- int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int);
+- int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int);
+- int (*add_mac_addresses)(struct xgbe_prv_data *);
+ int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
++ int (*config_rx_mode)(struct xgbe_prv_data *);
+
+ int (*enable_rx_csum)(struct xgbe_prv_data *);
+ int (*disable_rx_csum)(struct xgbe_prv_data *);
+@@ -534,8 +532,9 @@ struct xgbe_hw_if {
+ int (*dev_read)(struct xgbe_channel *);
+ void (*tx_desc_init)(struct xgbe_channel *);
+ void (*rx_desc_init)(struct xgbe_channel *);
+- void (*rx_desc_reset)(struct xgbe_ring_data *);
+ void (*tx_desc_reset)(struct xgbe_ring_data *);
++ void (*rx_desc_reset)(struct xgbe_prv_data *, struct xgbe_ring_data *,
++ unsigned int);
+ int (*is_last_desc)(struct xgbe_ring_desc *);
+ int (*is_context_desc)(struct xgbe_ring_desc *);
+ void (*tx_start_xmit)(struct xgbe_channel *, struct xgbe_ring *);
+@@ -596,7 +595,8 @@ struct xgbe_desc_if {
+ int (*alloc_ring_resources)(struct xgbe_prv_data *);
+ void (*free_ring_resources)(struct xgbe_prv_data *);
+ int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
+- void (*realloc_rx_buffer)(struct xgbe_channel *);
++ int (*map_rx_buffer)(struct xgbe_prv_data *, struct xgbe_ring *,
++ struct xgbe_ring_data *);
+ void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *);
+ void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
+ void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
+@@ -617,7 +617,7 @@ struct xgbe_hw_features {
+ unsigned int mgk; /* PMT magic packet */
+ unsigned int mmc; /* RMON module */
+ unsigned int aoe; /* ARP Offload */
+- unsigned int ts; /* IEEE 1588-2008 Adavanced Timestamp */
++ unsigned int ts; /* IEEE 1588-2008 Advanced Timestamp */
+ unsigned int eee; /* Energy Efficient Ethernet */
+ unsigned int tx_coe; /* Tx Checksum Offload */
+ unsigned int rx_coe; /* Rx Checksum Offload */
+@@ -629,6 +629,7 @@ struct xgbe_hw_features {
+ unsigned int rx_fifo_size; /* MTL Receive FIFO Size */
+ unsigned int tx_fifo_size; /* MTL Transmit FIFO Size */
+ unsigned int adv_ts_hi; /* Advance Timestamping High Word */
++ unsigned int dma_width; /* DMA width */
+ unsigned int dcb; /* DCB Feature */
+ unsigned int sph; /* Split Header Feature */
+ unsigned int tso; /* TCP Segmentation Offload */
+@@ -650,8 +651,12 @@ struct xgbe_hw_features {
+ struct xgbe_prv_data {
+ struct net_device *netdev;
+ struct platform_device *pdev;
++ struct acpi_device *adev;
+ struct device *dev;
+
++ /* ACPI or DT flag */
++ unsigned int use_acpi;
++
+ /* XGMAC/XPCS related mmio registers */
+ void __iomem *xgmac_regs; /* XGMAC CSRs */
+ void __iomem *xpcs_regs; /* XPCS MMD registers */
+@@ -672,6 +677,7 @@ struct xgbe_prv_data {
+ struct xgbe_desc_if desc_if;
+
+ /* AXI DMA settings */
++ unsigned int coherent;
+ unsigned int axdomain;
+ unsigned int arcache;
+ unsigned int awcache;
+@@ -707,6 +713,7 @@ struct xgbe_prv_data {
+
+ /* Rx coalescing settings */
+ unsigned int rx_riwt;
++ unsigned int rx_usecs;
+ unsigned int rx_frames;
+
+ /* Current Rx buffer size */
+@@ -739,6 +746,7 @@ struct xgbe_prv_data {
+ unsigned int phy_rx_pause;
+
+ /* Netdev related settings */
++ unsigned char mac_addr[ETH_ALEN];
+ netdev_features_t netdev_features;
+ struct napi_struct napi;
+ struct xgbe_mmc_stats mmc_stats;
+@@ -748,7 +756,9 @@ struct xgbe_prv_data {
+
+ /* Device clocks */
+ struct clk *sysclk;
++ unsigned long sysclk_rate;
+ struct clk *ptpclk;
++ unsigned long ptpclk_rate;
+
+ /* Timestamp support */
+ spinlock_t tstamp_lock;
+diff --git a/drivers/net/phy/amd-xgbe-phy.c b/drivers/net/phy/amd-xgbe-phy.c
+index 903dc3d..34a75cb 100644
+--- a/drivers/net/phy/amd-xgbe-phy.c
++++ b/drivers/net/phy/amd-xgbe-phy.c
+@@ -60,6 +60,7 @@
+ #include <linux/interrupt.h>
+ #include <linux/init.h>
+ #include <linux/delay.h>
++#include <linux/workqueue.h>
+ #include <linux/netdevice.h>
+ #include <linux/etherdevice.h>
+ #include <linux/skbuff.h>
+@@ -74,6 +75,10 @@
+ #include <linux/of_platform.h>
+ #include <linux/of_device.h>
+ #include <linux/uaccess.h>
++#include <linux/bitops.h>
++#include <linux/property.h>
++#include <linux/acpi.h>
++#include <linux/jiffies.h>
+
+ MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
+ MODULE_LICENSE("Dual BSD/GPL");
+@@ -84,22 +89,47 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
+ #define XGBE_PHY_MASK 0xfffffff0
+
+ #define XGBE_PHY_SPEEDSET_PROPERTY "amd,speed-set"
++#define XGBE_PHY_BLWC_PROPERTY "amd,serdes-blwc"
++#define XGBE_PHY_CDR_RATE_PROPERTY "amd,serdes-cdr-rate"
++#define XGBE_PHY_PQ_SKEW_PROPERTY "amd,serdes-pq-skew"
++#define XGBE_PHY_TX_AMP_PROPERTY "amd,serdes-tx-amp"
++#define XGBE_PHY_DFE_CFG_PROPERTY "amd,serdes-dfe-tap-config"
++#define XGBE_PHY_DFE_ENA_PROPERTY "amd,serdes-dfe-tap-enable"
++
++#define XGBE_PHY_SPEEDS 3
++#define XGBE_PHY_SPEED_1000 0
++#define XGBE_PHY_SPEED_2500 1
++#define XGBE_PHY_SPEED_10000 2
++
++#define XGBE_AN_MS_TIMEOUT 500
+
+ #define XGBE_AN_INT_CMPLT 0x01
+ #define XGBE_AN_INC_LINK 0x02
+ #define XGBE_AN_PG_RCV 0x04
++#define XGBE_AN_INT_MASK 0x07
+
+ #define XNP_MCF_NULL_MESSAGE 0x001
+-#define XNP_ACK_PROCESSED (1 << 12)
+-#define XNP_MP_FORMATTED (1 << 13)
+-#define XNP_NP_EXCHANGE (1 << 15)
++#define XNP_ACK_PROCESSED BIT(12)
++#define XNP_MP_FORMATTED BIT(13)
++#define XNP_NP_EXCHANGE BIT(15)
+
+ #define XGBE_PHY_RATECHANGE_COUNT 500
+
++#define XGBE_PHY_KR_TRAINING_START 0x01
++#define XGBE_PHY_KR_TRAINING_ENABLE 0x02
++
++#define XGBE_PHY_FEC_ENABLE 0x01
++#define XGBE_PHY_FEC_FORWARD 0x02
++#define XGBE_PHY_FEC_MASK 0x03
++
+ #ifndef MDIO_PMA_10GBR_PMD_CTRL
+ #define MDIO_PMA_10GBR_PMD_CTRL 0x0096
+ #endif
+
++#ifndef MDIO_PMA_10GBR_FEC_ABILITY
++#define MDIO_PMA_10GBR_FEC_ABILITY 0x00aa
++#endif
++
+ #ifndef MDIO_PMA_10GBR_FEC_CTRL
+ #define MDIO_PMA_10GBR_FEC_CTRL 0x00ab
+ #endif
+@@ -108,6 +138,10 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
+ #define MDIO_AN_XNP 0x0016
+ #endif
+
++#ifndef MDIO_AN_LPX
++#define MDIO_AN_LPX 0x0019
++#endif
++
+ #ifndef MDIO_AN_INTMASK
+ #define MDIO_AN_INTMASK 0x8001
+ #endif
+@@ -116,18 +150,10 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
+ #define MDIO_AN_INT 0x8002
+ #endif
+
+-#ifndef MDIO_AN_KR_CTRL
+-#define MDIO_AN_KR_CTRL 0x8003
+-#endif
+-
+ #ifndef MDIO_CTRL1_SPEED1G
+ #define MDIO_CTRL1_SPEED1G (MDIO_CTRL1_SPEED10G & ~BMCR_SPEED100)
+ #endif
+
+-#ifndef MDIO_KR_CTRL_PDETECT
+-#define MDIO_KR_CTRL_PDETECT 0x01
+-#endif
+-
+ /* SerDes integration register offsets */
+ #define SIR0_KR_RT_1 0x002c
+ #define SIR0_STATUS 0x0040
+@@ -140,10 +166,10 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
+ #define SIR0_STATUS_RX_READY_WIDTH 1
+ #define SIR0_STATUS_TX_READY_INDEX 8
+ #define SIR0_STATUS_TX_READY_WIDTH 1
++#define SIR1_SPEED_CDR_RATE_INDEX 12
++#define SIR1_SPEED_CDR_RATE_WIDTH 4
+ #define SIR1_SPEED_DATARATE_INDEX 4
+ #define SIR1_SPEED_DATARATE_WIDTH 2
+-#define SIR1_SPEED_PI_SPD_SEL_INDEX 12
+-#define SIR1_SPEED_PI_SPD_SEL_WIDTH 4
+ #define SIR1_SPEED_PLLSEL_INDEX 3
+ #define SIR1_SPEED_PLLSEL_WIDTH 1
+ #define SIR1_SPEED_RATECHANGE_INDEX 6
+@@ -153,42 +179,52 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
+ #define SIR1_SPEED_WORDMODE_INDEX 0
+ #define SIR1_SPEED_WORDMODE_WIDTH 3
+
++#define SPEED_10000_BLWC 0
+ #define SPEED_10000_CDR 0x7
+ #define SPEED_10000_PLL 0x1
++#define SPEED_10000_PQ 0x12
+ #define SPEED_10000_RATE 0x0
+ #define SPEED_10000_TXAMP 0xa
+ #define SPEED_10000_WORD 0x7
++#define SPEED_10000_DFE_TAP_CONFIG 0x1
++#define SPEED_10000_DFE_TAP_ENABLE 0x7f
+
++#define SPEED_2500_BLWC 1
+ #define SPEED_2500_CDR 0x2
+ #define SPEED_2500_PLL 0x0
++#define SPEED_2500_PQ 0xa
+ #define SPEED_2500_RATE 0x1
+ #define SPEED_2500_TXAMP 0xf
+ #define SPEED_2500_WORD 0x1
++#define SPEED_2500_DFE_TAP_CONFIG 0x3
++#define SPEED_2500_DFE_TAP_ENABLE 0x0
+
++#define SPEED_1000_BLWC 1
+ #define SPEED_1000_CDR 0x2
+ #define SPEED_1000_PLL 0x0
++#define SPEED_1000_PQ 0xa
+ #define SPEED_1000_RATE 0x3
+ #define SPEED_1000_TXAMP 0xf
+ #define SPEED_1000_WORD 0x1
++#define SPEED_1000_DFE_TAP_CONFIG 0x3
++#define SPEED_1000_DFE_TAP_ENABLE 0x0
+
+ /* SerDes RxTx register offsets */
++#define RXTX_REG6 0x0018
+ #define RXTX_REG20 0x0050
++#define RXTX_REG22 0x0058
+ #define RXTX_REG114 0x01c8
++#define RXTX_REG129 0x0204
+
+ /* SerDes RxTx register entry bit positions and sizes */
++#define RXTX_REG6_RESETB_RXD_INDEX 8
++#define RXTX_REG6_RESETB_RXD_WIDTH 1
+ #define RXTX_REG20_BLWC_ENA_INDEX 2
+ #define RXTX_REG20_BLWC_ENA_WIDTH 1
+ #define RXTX_REG114_PQ_REG_INDEX 9
+ #define RXTX_REG114_PQ_REG_WIDTH 7
+-
+-#define RXTX_10000_BLWC 0
+-#define RXTX_10000_PQ 0x1e
+-
+-#define RXTX_2500_BLWC 1
+-#define RXTX_2500_PQ 0xa
+-
+-#define RXTX_1000_BLWC 1
+-#define RXTX_1000_PQ 0xa
++#define RXTX_REG129_RXDFE_CONFIG_INDEX 14
++#define RXTX_REG129_RXDFE_CONFIG_WIDTH 2
+
+ /* Bit setting and getting macros
+ * The get macro will extract the current bit field value from within
+@@ -291,23 +327,56 @@ do { \
+ XRXTX_IOWRITE((_priv), _reg, reg_val); \
+ } while (0)
+
++static const u32 amd_xgbe_phy_serdes_blwc[] = {
++ SPEED_1000_BLWC,
++ SPEED_2500_BLWC,
++ SPEED_10000_BLWC,
++};
++
++static const u32 amd_xgbe_phy_serdes_cdr_rate[] = {
++ SPEED_1000_CDR,
++ SPEED_2500_CDR,
++ SPEED_10000_CDR,
++};
++
++static const u32 amd_xgbe_phy_serdes_pq_skew[] = {
++ SPEED_1000_PQ,
++ SPEED_2500_PQ,
++ SPEED_10000_PQ,
++};
++
++static const u32 amd_xgbe_phy_serdes_tx_amp[] = {
++ SPEED_1000_TXAMP,
++ SPEED_2500_TXAMP,
++ SPEED_10000_TXAMP,
++};
++
++static const u32 amd_xgbe_phy_serdes_dfe_tap_cfg[] = {
++ SPEED_1000_DFE_TAP_CONFIG,
++ SPEED_2500_DFE_TAP_CONFIG,
++ SPEED_10000_DFE_TAP_CONFIG,
++};
++
++static const u32 amd_xgbe_phy_serdes_dfe_tap_ena[] = {
++ SPEED_1000_DFE_TAP_ENABLE,
++ SPEED_2500_DFE_TAP_ENABLE,
++ SPEED_10000_DFE_TAP_ENABLE,
++};
++
+ enum amd_xgbe_phy_an {
+ AMD_XGBE_AN_READY = 0,
+- AMD_XGBE_AN_START,
+- AMD_XGBE_AN_EVENT,
+ AMD_XGBE_AN_PAGE_RECEIVED,
+ AMD_XGBE_AN_INCOMPAT_LINK,
+ AMD_XGBE_AN_COMPLETE,
+ AMD_XGBE_AN_NO_LINK,
+- AMD_XGBE_AN_EXIT,
+ AMD_XGBE_AN_ERROR,
+ };
+
+ enum amd_xgbe_phy_rx {
+- AMD_XGBE_RX_READY = 0,
+- AMD_XGBE_RX_BPA,
++ AMD_XGBE_RX_BPA = 0,
+ AMD_XGBE_RX_XNP,
+ AMD_XGBE_RX_COMPLETE,
++ AMD_XGBE_RX_ERROR,
+ };
+
+ enum amd_xgbe_phy_mode {
+@@ -316,12 +385,13 @@ enum amd_xgbe_phy_mode {
+ };
+
+ enum amd_xgbe_phy_speedset {
+- AMD_XGBE_PHY_SPEEDSET_1000_10000,
++ AMD_XGBE_PHY_SPEEDSET_1000_10000 = 0,
+ AMD_XGBE_PHY_SPEEDSET_2500_10000,
+ };
+
+ struct amd_xgbe_phy_priv {
+ struct platform_device *pdev;
++ struct acpi_device *adev;
+ struct device *dev;
+
+ struct phy_device *phydev;
+@@ -336,10 +406,26 @@ struct amd_xgbe_phy_priv {
+ void __iomem *sir0_regs; /* SerDes integration registers (1/2) */
+ void __iomem *sir1_regs; /* SerDes integration registers (2/2) */
+
+- /* Maintain link status for re-starting auto-negotiation */
+- unsigned int link;
++ int an_irq;
++ char an_irq_name[IFNAMSIZ + 32];
++ struct work_struct an_irq_work;
++ unsigned int an_irq_allocated;
++
+ unsigned int speed_set;
+
++ /* SerDes UEFI configurable settings.
++ * Switching between modes/speeds requires new values for some
++ * SerDes settings. The values can be supplied as device
++ * properties in array format. The first array entry is for
++ * 1GbE, second for 2.5GbE and third for 10GbE
++ */
++ u32 serdes_blwc[XGBE_PHY_SPEEDS];
++ u32 serdes_cdr_rate[XGBE_PHY_SPEEDS];
++ u32 serdes_pq_skew[XGBE_PHY_SPEEDS];
++ u32 serdes_tx_amp[XGBE_PHY_SPEEDS];
++ u32 serdes_dfe_tap_cfg[XGBE_PHY_SPEEDS];
++ u32 serdes_dfe_tap_ena[XGBE_PHY_SPEEDS];
++
+ /* Auto-negotiation state machine support */
+ struct mutex an_mutex;
+ enum amd_xgbe_phy_an an_result;
+@@ -348,7 +434,12 @@ struct amd_xgbe_phy_priv {
+ enum amd_xgbe_phy_rx kx_state;
+ struct work_struct an_work;
+ struct workqueue_struct *an_workqueue;
++ unsigned int an_supported;
+ unsigned int parallel_detect;
++ unsigned int fec_ability;
++ unsigned long an_start;
++
++ unsigned int lpm_ctrl; /* CTRL1 for resume */
+ };
+
+ static int amd_xgbe_an_enable_kr_training(struct phy_device *phydev)
+@@ -359,7 +450,7 @@ static int amd_xgbe_an_enable_kr_training(struct phy_device *phydev)
+ if (ret < 0)
+ return ret;
+
+- ret |= 0x02;
++ ret |= XGBE_PHY_KR_TRAINING_ENABLE;
+ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, ret);
+
+ return 0;
+@@ -373,7 +464,7 @@ static int amd_xgbe_an_disable_kr_training(struct phy_device *phydev)
+ if (ret < 0)
+ return ret;
+
+- ret &= ~0x02;
++ ret &= ~XGBE_PHY_KR_TRAINING_ENABLE;
+ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, ret);
+
+ return 0;
+@@ -423,11 +514,16 @@ static void amd_xgbe_phy_serdes_complete_ratechange(struct phy_device *phydev)
+ status = XSIR0_IOREAD(priv, SIR0_STATUS);
+ if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) &&
+ XSIR_GET_BITS(status, SIR0_STATUS, TX_READY))
+- return;
++ goto rx_reset;
+ }
+
+ netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n",
+ status);
++
++rx_reset:
++ /* Perform Rx reset for the DFE changes */
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RESETB_RXD, 0);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RESETB_RXD, 1);
+ }
+
+ static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev)
+@@ -466,12 +562,20 @@ static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev)
+
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, DATARATE, SPEED_10000_RATE);
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, WORDMODE, SPEED_10000_WORD);
+- XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, TXAMP, SPEED_10000_TXAMP);
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, PLLSEL, SPEED_10000_PLL);
+- XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, PI_SPD_SEL, SPEED_10000_CDR);
+
+- XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA, RXTX_10000_BLWC);
+- XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, RXTX_10000_PQ);
++ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, CDR_RATE,
++ priv->serdes_cdr_rate[XGBE_PHY_SPEED_10000]);
++ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, TXAMP,
++ priv->serdes_tx_amp[XGBE_PHY_SPEED_10000]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA,
++ priv->serdes_blwc[XGBE_PHY_SPEED_10000]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
++ priv->serdes_pq_skew[XGBE_PHY_SPEED_10000]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG129, RXDFE_CONFIG,
++ priv->serdes_dfe_tap_cfg[XGBE_PHY_SPEED_10000]);
++ XRXTX_IOWRITE(priv, RXTX_REG22,
++ priv->serdes_dfe_tap_ena[XGBE_PHY_SPEED_10000]);
+
+ amd_xgbe_phy_serdes_complete_ratechange(phydev);
+
+@@ -514,12 +618,20 @@ static int amd_xgbe_phy_gmii_2500_mode(struct phy_device *phydev)
+
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, DATARATE, SPEED_2500_RATE);
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, WORDMODE, SPEED_2500_WORD);
+- XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, TXAMP, SPEED_2500_TXAMP);
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, PLLSEL, SPEED_2500_PLL);
+- XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, PI_SPD_SEL, SPEED_2500_CDR);
+
+- XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA, RXTX_2500_BLWC);
+- XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, RXTX_2500_PQ);
++ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, CDR_RATE,
++ priv->serdes_cdr_rate[XGBE_PHY_SPEED_2500]);
++ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, TXAMP,
++ priv->serdes_tx_amp[XGBE_PHY_SPEED_2500]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA,
++ priv->serdes_blwc[XGBE_PHY_SPEED_2500]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
++ priv->serdes_pq_skew[XGBE_PHY_SPEED_2500]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG129, RXDFE_CONFIG,
++ priv->serdes_dfe_tap_cfg[XGBE_PHY_SPEED_2500]);
++ XRXTX_IOWRITE(priv, RXTX_REG22,
++ priv->serdes_dfe_tap_ena[XGBE_PHY_SPEED_2500]);
+
+ amd_xgbe_phy_serdes_complete_ratechange(phydev);
+
+@@ -562,12 +674,20 @@ static int amd_xgbe_phy_gmii_mode(struct phy_device *phydev)
+
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, DATARATE, SPEED_1000_RATE);
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, WORDMODE, SPEED_1000_WORD);
+- XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, TXAMP, SPEED_1000_TXAMP);
+ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, PLLSEL, SPEED_1000_PLL);
+- XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, PI_SPD_SEL, SPEED_1000_CDR);
+
+- XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA, RXTX_1000_BLWC);
+- XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, RXTX_1000_PQ);
++ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, CDR_RATE,
++ priv->serdes_cdr_rate[XGBE_PHY_SPEED_1000]);
++ XSIR1_IOWRITE_BITS(priv, SIR1_SPEED, TXAMP,
++ priv->serdes_tx_amp[XGBE_PHY_SPEED_1000]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA,
++ priv->serdes_blwc[XGBE_PHY_SPEED_1000]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
++ priv->serdes_pq_skew[XGBE_PHY_SPEED_1000]);
++ XRXTX_IOWRITE_BITS(priv, RXTX_REG129, RXDFE_CONFIG,
++ priv->serdes_dfe_tap_cfg[XGBE_PHY_SPEED_1000]);
++ XRXTX_IOWRITE(priv, RXTX_REG22,
++ priv->serdes_dfe_tap_ena[XGBE_PHY_SPEED_1000]);
+
+ amd_xgbe_phy_serdes_complete_ratechange(phydev);
+
+@@ -635,6 +755,77 @@ static int amd_xgbe_phy_set_mode(struct phy_device *phydev,
+ return ret;
+ }
+
++static bool amd_xgbe_phy_use_xgmii_mode(struct phy_device *phydev)
++{
++ if (phydev->autoneg == AUTONEG_ENABLE) {
++ if (phydev->advertising & ADVERTISED_10000baseKR_Full)
++ return true;
++ } else {
++ if (phydev->speed == SPEED_10000)
++ return true;
++ }
++
++ return false;
++}
++
++static bool amd_xgbe_phy_use_gmii_2500_mode(struct phy_device *phydev)
++{
++ if (phydev->autoneg == AUTONEG_ENABLE) {
++ if (phydev->advertising & ADVERTISED_2500baseX_Full)
++ return true;
++ } else {
++ if (phydev->speed == SPEED_2500)
++ return true;
++ }
++
++ return false;
++}
++
++static bool amd_xgbe_phy_use_gmii_mode(struct phy_device *phydev)
++{
++ if (phydev->autoneg == AUTONEG_ENABLE) {
++ if (phydev->advertising & ADVERTISED_1000baseKX_Full)
++ return true;
++ } else {
++ if (phydev->speed == SPEED_1000)
++ return true;
++ }
++
++ return false;
++}
++
++static int amd_xgbe_phy_set_an(struct phy_device *phydev, bool enable,
++ bool restart)
++{
++ int ret;
++
++ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
++ if (ret < 0)
++ return ret;
++
++ ret &= ~MDIO_AN_CTRL1_ENABLE;
++
++ if (enable)
++ ret |= MDIO_AN_CTRL1_ENABLE;
++
++ if (restart)
++ ret |= MDIO_AN_CTRL1_RESTART;
++
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, ret);
++
++ return 0;
++}
++
++static int amd_xgbe_phy_restart_an(struct phy_device *phydev)
++{
++ return amd_xgbe_phy_set_an(phydev, true, true);
++}
++
++static int amd_xgbe_phy_disable_an(struct phy_device *phydev)
++{
++ return amd_xgbe_phy_set_an(phydev, false, false);
++}
++
+ static enum amd_xgbe_phy_an amd_xgbe_an_tx_training(struct phy_device *phydev,
+ enum amd_xgbe_phy_rx *state)
+ {
+@@ -645,7 +836,7 @@ static enum amd_xgbe_phy_an amd_xgbe_an_tx_training(struct phy_device *phydev,
+
+ /* If we're not in KR mode then we're done */
+ if (!amd_xgbe_phy_in_kr_mode(phydev))
+- return AMD_XGBE_AN_EVENT;
++ return AMD_XGBE_AN_PAGE_RECEIVED;
+
+ /* Enable/Disable FEC */
+ ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
+@@ -660,10 +851,9 @@ static enum amd_xgbe_phy_an amd_xgbe_an_tx_training(struct phy_device *phydev,
+ if (ret < 0)
+ return AMD_XGBE_AN_ERROR;
+
++ ret &= ~XGBE_PHY_FEC_MASK;
+ if ((ad_reg & 0xc000) && (lp_reg & 0xc000))
+- ret |= 0x01;
+- else
+- ret &= ~0x01;
++ ret |= priv->fec_ability;
+
+ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_CTRL, ret);
+
+@@ -672,14 +862,17 @@ static enum amd_xgbe_phy_an amd_xgbe_an_tx_training(struct phy_device *phydev,
+ if (ret < 0)
+ return AMD_XGBE_AN_ERROR;
+
+- XSIR0_IOWRITE_BITS(priv, SIR0_KR_RT_1, RESET, 1);
++ if (ret & XGBE_PHY_KR_TRAINING_ENABLE) {
++ XSIR0_IOWRITE_BITS(priv, SIR0_KR_RT_1, RESET, 1);
+
+- ret |= 0x01;
+- phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, ret);
++ ret |= XGBE_PHY_KR_TRAINING_START;
++ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL,
++ ret);
+
+- XSIR0_IOWRITE_BITS(priv, SIR0_KR_RT_1, RESET, 0);
++ XSIR0_IOWRITE_BITS(priv, SIR0_KR_RT_1, RESET, 0);
++ }
+
+- return AMD_XGBE_AN_EVENT;
++ return AMD_XGBE_AN_PAGE_RECEIVED;
+ }
+
+ static enum amd_xgbe_phy_an amd_xgbe_an_tx_xnp(struct phy_device *phydev,
+@@ -696,7 +889,7 @@ static enum amd_xgbe_phy_an amd_xgbe_an_tx_xnp(struct phy_device *phydev,
+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP + 1, 0);
+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP, msg);
+
+- return AMD_XGBE_AN_EVENT;
++ return AMD_XGBE_AN_PAGE_RECEIVED;
+ }
+
+ static enum amd_xgbe_phy_an amd_xgbe_an_rx_bpa(struct phy_device *phydev,
+@@ -735,11 +928,11 @@ static enum amd_xgbe_phy_an amd_xgbe_an_rx_xnp(struct phy_device *phydev,
+ int ad_reg, lp_reg;
+
+ /* Check Extended Next Page support */
+- ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
++ ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP);
+ if (ad_reg < 0)
+ return AMD_XGBE_AN_ERROR;
+
+- lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA);
++ lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPX);
+ if (lp_reg < 0)
+ return AMD_XGBE_AN_ERROR;
+
+@@ -748,226 +941,271 @@ static enum amd_xgbe_phy_an amd_xgbe_an_rx_xnp(struct phy_device *phydev,
+ amd_xgbe_an_tx_training(phydev, state);
+ }
+
+-static enum amd_xgbe_phy_an amd_xgbe_an_start(struct phy_device *phydev)
++static enum amd_xgbe_phy_an amd_xgbe_an_page_received(struct phy_device *phydev)
+ {
+ struct amd_xgbe_phy_priv *priv = phydev->priv;
++ enum amd_xgbe_phy_rx *state;
++ unsigned long an_timeout;
+ int ret;
+
+- /* Be sure we aren't looping trying to negotiate */
+- if (amd_xgbe_phy_in_kr_mode(phydev)) {
+- if (priv->kr_state != AMD_XGBE_RX_READY)
+- return AMD_XGBE_AN_NO_LINK;
+- priv->kr_state = AMD_XGBE_RX_BPA;
++ if (!priv->an_start) {
++ priv->an_start = jiffies;
+ } else {
+- if (priv->kx_state != AMD_XGBE_RX_READY)
+- return AMD_XGBE_AN_NO_LINK;
+- priv->kx_state = AMD_XGBE_RX_BPA;
++ an_timeout = priv->an_start +
++ msecs_to_jiffies(XGBE_AN_MS_TIMEOUT);
++ if (time_after(jiffies, an_timeout)) {
++ /* Auto-negotiation timed out, reset state */
++ priv->kr_state = AMD_XGBE_RX_BPA;
++ priv->kx_state = AMD_XGBE_RX_BPA;
++
++ priv->an_start = jiffies;
++ }
+ }
+
+- /* Set up Advertisement register 3 first */
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
+- if (ret < 0)
+- return AMD_XGBE_AN_ERROR;
+-
+- if (phydev->supported & SUPPORTED_10000baseR_FEC)
+- ret |= 0xc000;
+- else
+- ret &= ~0xc000;
+-
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2, ret);
++ state = amd_xgbe_phy_in_kr_mode(phydev) ? &priv->kr_state
++ : &priv->kx_state;
+
+- /* Set up Advertisement register 2 next */
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
+- if (ret < 0)
+- return AMD_XGBE_AN_ERROR;
++ switch (*state) {
++ case AMD_XGBE_RX_BPA:
++ ret = amd_xgbe_an_rx_bpa(phydev, state);
++ break;
+
+- if (phydev->supported & SUPPORTED_10000baseKR_Full)
+- ret |= 0x80;
+- else
+- ret &= ~0x80;
++ case AMD_XGBE_RX_XNP:
++ ret = amd_xgbe_an_rx_xnp(phydev, state);
++ break;
+
+- if ((phydev->supported & SUPPORTED_1000baseKX_Full) ||
+- (phydev->supported & SUPPORTED_2500baseX_Full))
+- ret |= 0x20;
+- else
+- ret &= ~0x20;
++ default:
++ ret = AMD_XGBE_AN_ERROR;
++ }
+
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1, ret);
++ return ret;
++}
+
+- /* Set up Advertisement register 1 last */
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
+- if (ret < 0)
+- return AMD_XGBE_AN_ERROR;
++static enum amd_xgbe_phy_an amd_xgbe_an_incompat_link(struct phy_device *phydev)
++{
++ struct amd_xgbe_phy_priv *priv = phydev->priv;
++ int ret;
+
+- if (phydev->supported & SUPPORTED_Pause)
+- ret |= 0x400;
+- else
+- ret &= ~0x400;
++ /* Be sure we aren't looping trying to negotiate */
++ if (amd_xgbe_phy_in_kr_mode(phydev)) {
++ priv->kr_state = AMD_XGBE_RX_ERROR;
+
+- if (phydev->supported & SUPPORTED_Asym_Pause)
+- ret |= 0x800;
+- else
+- ret &= ~0x800;
++ if (!(phydev->advertising & SUPPORTED_1000baseKX_Full) &&
++ !(phydev->advertising & SUPPORTED_2500baseX_Full))
++ return AMD_XGBE_AN_NO_LINK;
+
+- /* We don't intend to perform XNP */
+- ret &= ~XNP_NP_EXCHANGE;
++ if (priv->kx_state != AMD_XGBE_RX_BPA)
++ return AMD_XGBE_AN_NO_LINK;
++ } else {
++ priv->kx_state = AMD_XGBE_RX_ERROR;
+
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, ret);
++ if (!(phydev->advertising & SUPPORTED_10000baseKR_Full))
++ return AMD_XGBE_AN_NO_LINK;
+
+- /* Enable and start auto-negotiation */
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++ if (priv->kr_state != AMD_XGBE_RX_BPA)
++ return AMD_XGBE_AN_NO_LINK;
++ }
+
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_KR_CTRL);
+- if (ret < 0)
++ ret = amd_xgbe_phy_disable_an(phydev);
++ if (ret)
+ return AMD_XGBE_AN_ERROR;
+
+- ret |= MDIO_KR_CTRL_PDETECT;
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_KR_CTRL, ret);
+-
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
+- if (ret < 0)
++ ret = amd_xgbe_phy_switch_mode(phydev);
++ if (ret)
+ return AMD_XGBE_AN_ERROR;
+
+- ret |= MDIO_AN_CTRL1_ENABLE;
+- ret |= MDIO_AN_CTRL1_RESTART;
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, ret);
++ ret = amd_xgbe_phy_restart_an(phydev);
++ if (ret)
++ return AMD_XGBE_AN_ERROR;
+
+- return AMD_XGBE_AN_EVENT;
++ return AMD_XGBE_AN_INCOMPAT_LINK;
+ }
+
+-static enum amd_xgbe_phy_an amd_xgbe_an_event(struct phy_device *phydev)
++static irqreturn_t amd_xgbe_an_isr(int irq, void *data)
+ {
+- enum amd_xgbe_phy_an new_state;
+- int ret;
++ struct amd_xgbe_phy_priv *priv = (struct amd_xgbe_phy_priv *)data;
+
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT);
+- if (ret < 0)
+- return AMD_XGBE_AN_ERROR;
++ /* Interrupt reason must be read and cleared outside of IRQ context */
++ disable_irq_nosync(priv->an_irq);
+
+- new_state = AMD_XGBE_AN_EVENT;
+- if (ret & XGBE_AN_PG_RCV)
+- new_state = AMD_XGBE_AN_PAGE_RECEIVED;
+- else if (ret & XGBE_AN_INC_LINK)
+- new_state = AMD_XGBE_AN_INCOMPAT_LINK;
+- else if (ret & XGBE_AN_INT_CMPLT)
+- new_state = AMD_XGBE_AN_COMPLETE;
++ queue_work(priv->an_workqueue, &priv->an_irq_work);
+
+- if (new_state != AMD_XGBE_AN_EVENT)
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++ return IRQ_HANDLED;
++}
++
++static void amd_xgbe_an_irq_work(struct work_struct *work)
++{
++ struct amd_xgbe_phy_priv *priv = container_of(work,
++ struct amd_xgbe_phy_priv,
++ an_irq_work);
+
+- return new_state;
++ /* Avoid a race between enabling the IRQ and exiting the work by
++ * waiting for the work to finish and then queueing it
++ */
++ flush_work(&priv->an_work);
++ queue_work(priv->an_workqueue, &priv->an_work);
+ }
+
+-static enum amd_xgbe_phy_an amd_xgbe_an_page_received(struct phy_device *phydev)
++static void amd_xgbe_an_state_machine(struct work_struct *work)
+ {
+- struct amd_xgbe_phy_priv *priv = phydev->priv;
+- enum amd_xgbe_phy_rx *state;
+- int ret;
++ struct amd_xgbe_phy_priv *priv = container_of(work,
++ struct amd_xgbe_phy_priv,
++ an_work);
++ struct phy_device *phydev = priv->phydev;
++ enum amd_xgbe_phy_an cur_state = priv->an_state;
++ int int_reg, int_mask;
+
+- state = amd_xgbe_phy_in_kr_mode(phydev) ? &priv->kr_state
+- : &priv->kx_state;
++ mutex_lock(&priv->an_mutex);
+
+- switch (*state) {
+- case AMD_XGBE_RX_BPA:
+- ret = amd_xgbe_an_rx_bpa(phydev, state);
++ /* Read the interrupt */
++ int_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT);
++ if (!int_reg)
++ goto out;
++
++next_int:
++ if (int_reg < 0) {
++ priv->an_state = AMD_XGBE_AN_ERROR;
++ int_mask = XGBE_AN_INT_MASK;
++ } else if (int_reg & XGBE_AN_PG_RCV) {
++ priv->an_state = AMD_XGBE_AN_PAGE_RECEIVED;
++ int_mask = XGBE_AN_PG_RCV;
++ } else if (int_reg & XGBE_AN_INC_LINK) {
++ priv->an_state = AMD_XGBE_AN_INCOMPAT_LINK;
++ int_mask = XGBE_AN_INC_LINK;
++ } else if (int_reg & XGBE_AN_INT_CMPLT) {
++ priv->an_state = AMD_XGBE_AN_COMPLETE;
++ int_mask = XGBE_AN_INT_CMPLT;
++ } else {
++ priv->an_state = AMD_XGBE_AN_ERROR;
++ int_mask = 0;
++ }
++
++ /* Clear the interrupt to be processed */
++ int_reg &= ~int_mask;
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, int_reg);
++
++ priv->an_result = priv->an_state;
++
++again:
++ cur_state = priv->an_state;
++
++ switch (priv->an_state) {
++ case AMD_XGBE_AN_READY:
++ priv->an_supported = 0;
+ break;
+
+- case AMD_XGBE_RX_XNP:
+- ret = amd_xgbe_an_rx_xnp(phydev, state);
++ case AMD_XGBE_AN_PAGE_RECEIVED:
++ priv->an_state = amd_xgbe_an_page_received(phydev);
++ priv->an_supported++;
++ break;
++
++ case AMD_XGBE_AN_INCOMPAT_LINK:
++ priv->an_supported = 0;
++ priv->parallel_detect = 0;
++ priv->an_state = amd_xgbe_an_incompat_link(phydev);
++ break;
++
++ case AMD_XGBE_AN_COMPLETE:
++ priv->parallel_detect = priv->an_supported ? 0 : 1;
++ netdev_dbg(phydev->attached_dev, "%s successful\n",
++ priv->an_supported ? "Auto negotiation"
++ : "Parallel detection");
++ break;
++
++ case AMD_XGBE_AN_NO_LINK:
+ break;
+
+ default:
+- ret = AMD_XGBE_AN_ERROR;
++ priv->an_state = AMD_XGBE_AN_ERROR;
+ }
+
+- return ret;
+-}
++ if (priv->an_state == AMD_XGBE_AN_NO_LINK) {
++ int_reg = 0;
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++ } else if (priv->an_state == AMD_XGBE_AN_ERROR) {
++ netdev_err(phydev->attached_dev,
++ "error during auto-negotiation, state=%u\n",
++ cur_state);
+
+-static enum amd_xgbe_phy_an amd_xgbe_an_incompat_link(struct phy_device *phydev)
+-{
+- int ret;
++ int_reg = 0;
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++ }
+
+- ret = amd_xgbe_phy_switch_mode(phydev);
+- if (ret)
+- return AMD_XGBE_AN_ERROR;
++ if (priv->an_state >= AMD_XGBE_AN_COMPLETE) {
++ priv->an_result = priv->an_state;
++ priv->an_state = AMD_XGBE_AN_READY;
++ priv->kr_state = AMD_XGBE_RX_BPA;
++ priv->kx_state = AMD_XGBE_RX_BPA;
++ priv->an_start = 0;
++ }
+
+- return AMD_XGBE_AN_START;
+-}
++ if (cur_state != priv->an_state)
++ goto again;
+
+-static void amd_xgbe_an_state_machine(struct work_struct *work)
+-{
+- struct amd_xgbe_phy_priv *priv = container_of(work,
+- struct amd_xgbe_phy_priv,
+- an_work);
+- struct phy_device *phydev = priv->phydev;
+- enum amd_xgbe_phy_an cur_state;
+- int sleep;
+- unsigned int an_supported = 0;
++ if (int_reg)
++ goto next_int;
+
+- /* Start in KX mode */
+- if (amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX))
+- priv->an_state = AMD_XGBE_AN_ERROR;
++out:
++ enable_irq(priv->an_irq);
+
+- while (1) {
+- mutex_lock(&priv->an_mutex);
++ mutex_unlock(&priv->an_mutex);
++}
+
+- cur_state = priv->an_state;
++static int amd_xgbe_an_init(struct phy_device *phydev)
++{
++ int ret;
+
+- switch (priv->an_state) {
+- case AMD_XGBE_AN_START:
+- an_supported = 0;
+- priv->parallel_detect = 0;
+- priv->an_state = amd_xgbe_an_start(phydev);
+- break;
++ /* Set up Advertisement register 3 first */
++ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
++ if (ret < 0)
++ return ret;
+
+- case AMD_XGBE_AN_EVENT:
+- priv->an_state = amd_xgbe_an_event(phydev);
+- break;
++ if (phydev->advertising & SUPPORTED_10000baseR_FEC)
++ ret |= 0xc000;
++ else
++ ret &= ~0xc000;
+
+- case AMD_XGBE_AN_PAGE_RECEIVED:
+- priv->an_state = amd_xgbe_an_page_received(phydev);
+- an_supported++;
+- break;
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2, ret);
+
+- case AMD_XGBE_AN_INCOMPAT_LINK:
+- priv->an_state = amd_xgbe_an_incompat_link(phydev);
+- break;
++ /* Set up Advertisement register 2 next */
++ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
++ if (ret < 0)
++ return ret;
+
+- case AMD_XGBE_AN_COMPLETE:
+- priv->parallel_detect = an_supported ? 0 : 1;
+- netdev_info(phydev->attached_dev, "%s successful\n",
+- an_supported ? "Auto negotiation"
+- : "Parallel detection");
+- /* fall through */
++ if (phydev->advertising & SUPPORTED_10000baseKR_Full)
++ ret |= 0x80;
++ else
++ ret &= ~0x80;
+
+- case AMD_XGBE_AN_NO_LINK:
+- case AMD_XGBE_AN_EXIT:
+- goto exit_unlock;
++ if ((phydev->advertising & SUPPORTED_1000baseKX_Full) ||
++ (phydev->advertising & SUPPORTED_2500baseX_Full))
++ ret |= 0x20;
++ else
++ ret &= ~0x20;
+
+- default:
+- priv->an_state = AMD_XGBE_AN_ERROR;
+- }
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1, ret);
+
+- if (priv->an_state == AMD_XGBE_AN_ERROR) {
+- netdev_err(phydev->attached_dev,
+- "error during auto-negotiation, state=%u\n",
+- cur_state);
+- goto exit_unlock;
+- }
++ /* Set up Advertisement register 1 last */
++ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
++ if (ret < 0)
++ return ret;
+
+- sleep = (priv->an_state == AMD_XGBE_AN_EVENT) ? 1 : 0;
++ if (phydev->advertising & SUPPORTED_Pause)
++ ret |= 0x400;
++ else
++ ret &= ~0x400;
+
+- mutex_unlock(&priv->an_mutex);
++ if (phydev->advertising & SUPPORTED_Asym_Pause)
++ ret |= 0x800;
++ else
++ ret &= ~0x800;
+
+- if (sleep)
+- usleep_range(20, 50);
+- }
++ /* We don't intend to perform XNP */
++ ret &= ~XNP_NP_EXCHANGE;
+
+-exit_unlock:
+- priv->an_result = priv->an_state;
+- priv->an_state = AMD_XGBE_AN_READY;
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, ret);
+
+- mutex_unlock(&priv->an_mutex);
++ return 0;
+ }
+
+ static int amd_xgbe_phy_soft_reset(struct phy_device *phydev)
+@@ -992,33 +1230,68 @@ static int amd_xgbe_phy_soft_reset(struct phy_device *phydev)
+ if (ret & MDIO_CTRL1_RESET)
+ return -ETIMEDOUT;
+
+- /* Make sure the XPCS and SerDes are in compatible states */
+- return amd_xgbe_phy_xgmii_mode(phydev);
++ /* Disable auto-negotiation for now */
++ ret = amd_xgbe_phy_disable_an(phydev);
++ if (ret < 0)
++ return ret;
++
++ /* Clear auto-negotiation interrupts */
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++
++ return 0;
+ }
+
+ static int amd_xgbe_phy_config_init(struct phy_device *phydev)
+ {
+ struct amd_xgbe_phy_priv *priv = phydev->priv;
++ struct net_device *netdev = phydev->attached_dev;
++ int ret;
+
+- /* Initialize supported features */
+- phydev->supported = SUPPORTED_Autoneg;
+- phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
+- phydev->supported |= SUPPORTED_Backplane;
+- phydev->supported |= SUPPORTED_10000baseKR_Full |
+- SUPPORTED_10000baseR_FEC;
+- switch (priv->speed_set) {
+- case AMD_XGBE_PHY_SPEEDSET_1000_10000:
+- phydev->supported |= SUPPORTED_1000baseKX_Full;
+- break;
+- case AMD_XGBE_PHY_SPEEDSET_2500_10000:
+- phydev->supported |= SUPPORTED_2500baseX_Full;
+- break;
++ if (!priv->an_irq_allocated) {
++ /* Allocate the auto-negotiation workqueue and interrupt */
++ snprintf(priv->an_irq_name, sizeof(priv->an_irq_name) - 1,
++ "%s-pcs", netdev_name(netdev));
++
++ priv->an_workqueue =
++ create_singlethread_workqueue(priv->an_irq_name);
++ if (!priv->an_workqueue) {
++ netdev_err(netdev, "phy workqueue creation failed\n");
++ return -ENOMEM;
++ }
++
++ ret = devm_request_irq(priv->dev, priv->an_irq,
++ amd_xgbe_an_isr, 0, priv->an_irq_name,
++ priv);
++ if (ret) {
++ netdev_err(netdev, "phy irq request failed\n");
++ destroy_workqueue(priv->an_workqueue);
++ return ret;
++ }
++
++ priv->an_irq_allocated = 1;
+ }
+- phydev->advertising = phydev->supported;
+
+- /* Turn off and clear interrupts */
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INTMASK, 0);
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++ /* Set initial mode - call the mode setting routines
++ * directly to insure we are properly configured
++ */
++ if (amd_xgbe_phy_use_xgmii_mode(phydev))
++ ret = amd_xgbe_phy_xgmii_mode(phydev);
++ else if (amd_xgbe_phy_use_gmii_mode(phydev))
++ ret = amd_xgbe_phy_gmii_mode(phydev);
++ else if (amd_xgbe_phy_use_gmii_2500_mode(phydev))
++ ret = amd_xgbe_phy_gmii_2500_mode(phydev);
++ else
++ ret = -EINVAL;
++ if (ret < 0)
++ return ret;
++
++ /* Set up advertisement registers based on current settings */
++ ret = amd_xgbe_an_init(phydev);
++ if (ret)
++ return ret;
++
++ /* Enable auto-negotiation interrupts */
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INTMASK, 0x07);
+
+ return 0;
+ }
+@@ -1028,25 +1301,19 @@ static int amd_xgbe_phy_setup_forced(struct phy_device *phydev)
+ int ret;
+
+ /* Disable auto-negotiation */
+- ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
++ ret = amd_xgbe_phy_disable_an(phydev);
+ if (ret < 0)
+ return ret;
+
+- ret &= ~MDIO_AN_CTRL1_ENABLE;
+- phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, ret);
+-
+ /* Validate/Set specified speed */
+ switch (phydev->speed) {
+ case SPEED_10000:
+- ret = amd_xgbe_phy_xgmii_mode(phydev);
++ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR);
+ break;
+
+ case SPEED_2500:
+- ret = amd_xgbe_phy_gmii_2500_mode(phydev);
+- break;
+-
+ case SPEED_1000:
+- ret = amd_xgbe_phy_gmii_mode(phydev);
++ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX);
+ break;
+
+ default:
+@@ -1066,10 +1333,11 @@ static int amd_xgbe_phy_setup_forced(struct phy_device *phydev)
+ return 0;
+ }
+
+-static int amd_xgbe_phy_config_aneg(struct phy_device *phydev)
++static int __amd_xgbe_phy_config_aneg(struct phy_device *phydev)
+ {
+ struct amd_xgbe_phy_priv *priv = phydev->priv;
+ u32 mmd_mask = phydev->c45_ids.devices_in_package;
++ int ret;
+
+ if (phydev->autoneg != AUTONEG_ENABLE)
+ return amd_xgbe_phy_setup_forced(phydev);
+@@ -1078,56 +1346,79 @@ static int amd_xgbe_phy_config_aneg(struct phy_device *phydev)
+ if (!(mmd_mask & MDIO_DEVS_AN))
+ return -EINVAL;
+
+- /* Start/Restart the auto-negotiation state machine */
+- mutex_lock(&priv->an_mutex);
++ /* Disable auto-negotiation interrupt */
++ disable_irq(priv->an_irq);
++
++ /* Start auto-negotiation in a supported mode */
++ if (phydev->advertising & SUPPORTED_10000baseKR_Full)
++ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR);
++ else if ((phydev->advertising & SUPPORTED_1000baseKX_Full) ||
++ (phydev->advertising & SUPPORTED_2500baseX_Full))
++ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX);
++ else
++ ret = -EINVAL;
++ if (ret < 0) {
++ enable_irq(priv->an_irq);
++ return ret;
++ }
++
++ /* Disable and stop any in progress auto-negotiation */
++ ret = amd_xgbe_phy_disable_an(phydev);
++ if (ret < 0)
++ return ret;
++
++ /* Clear any auto-negotitation interrupts */
++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
++
+ priv->an_result = AMD_XGBE_AN_READY;
+- priv->an_state = AMD_XGBE_AN_START;
+- priv->kr_state = AMD_XGBE_RX_READY;
+- priv->kx_state = AMD_XGBE_RX_READY;
+- mutex_unlock(&priv->an_mutex);
++ priv->an_state = AMD_XGBE_AN_READY;
++ priv->kr_state = AMD_XGBE_RX_BPA;
++ priv->kx_state = AMD_XGBE_RX_BPA;
+
+- queue_work(priv->an_workqueue, &priv->an_work);
++ /* Re-enable auto-negotiation interrupt */
++ enable_irq(priv->an_irq);
+
+- return 0;
++ /* Set up advertisement registers based on current settings */
++ ret = amd_xgbe_an_init(phydev);
++ if (ret)
++ return ret;
++
++ /* Enable and start auto-negotiation */
++ return amd_xgbe_phy_restart_an(phydev);
+ }
+
+-static int amd_xgbe_phy_aneg_done(struct phy_device *phydev)
++static int amd_xgbe_phy_config_aneg(struct phy_device *phydev)
+ {
+ struct amd_xgbe_phy_priv *priv = phydev->priv;
+- enum amd_xgbe_phy_an state;
++ int ret;
+
+ mutex_lock(&priv->an_mutex);
+- state = priv->an_result;
++
++ ret = __amd_xgbe_phy_config_aneg(phydev);
++
+ mutex_unlock(&priv->an_mutex);
+
+- return (state == AMD_XGBE_AN_COMPLETE);
++ return ret;
++}
++
++static int amd_xgbe_phy_aneg_done(struct phy_device *phydev)
++{
++ struct amd_xgbe_phy_priv *priv = phydev->priv;
++
++ return (priv->an_result == AMD_XGBE_AN_COMPLETE);
+ }
+
+ static int amd_xgbe_phy_update_link(struct phy_device *phydev)
+ {
+ struct amd_xgbe_phy_priv *priv = phydev->priv;
+- enum amd_xgbe_phy_an state;
+- unsigned int check_again, autoneg;
+ int ret;
+
+ /* If we're doing auto-negotiation don't report link down */
+- mutex_lock(&priv->an_mutex);
+- state = priv->an_state;
+- mutex_unlock(&priv->an_mutex);
+-
+- if (state != AMD_XGBE_AN_READY) {
++ if (priv->an_state != AMD_XGBE_AN_READY) {
+ phydev->link = 1;
+ return 0;
+ }
+
+- /* Since the device can be in the wrong mode when a link is
+- * (re-)established (cable connected after the interface is
+- * up, etc.), the link status may report no link. If there
+- * is no link, try switching modes and checking the status
+- * again if auto negotiation is enabled.
+- */
+- check_again = (phydev->autoneg == AUTONEG_ENABLE) ? 1 : 0;
+-again:
+ /* Link status is latched low, so read once to clear
+ * and then read again to get current state
+ */
+@@ -1141,25 +1432,6 @@ again:
+
+ phydev->link = (ret & MDIO_STAT1_LSTATUS) ? 1 : 0;
+
+- if (!phydev->link) {
+- if (check_again) {
+- ret = amd_xgbe_phy_switch_mode(phydev);
+- if (ret < 0)
+- return ret;
+- check_again = 0;
+- goto again;
+- }
+- }
+-
+- autoneg = (phydev->link && !priv->link) ? 1 : 0;
+- priv->link = phydev->link;
+- if (autoneg) {
+- /* Link is (back) up, re-start auto-negotiation */
+- ret = amd_xgbe_phy_config_aneg(phydev);
+- if (ret < 0)
+- return ret;
+- }
+-
+ return 0;
+ }
+
+@@ -1249,6 +1521,7 @@ static int amd_xgbe_phy_read_status(struct phy_device *phydev)
+
+ static int amd_xgbe_phy_suspend(struct phy_device *phydev)
+ {
++ struct amd_xgbe_phy_priv *priv = phydev->priv;
+ int ret;
+
+ mutex_lock(&phydev->lock);
+@@ -1257,6 +1530,8 @@ static int amd_xgbe_phy_suspend(struct phy_device *phydev)
+ if (ret < 0)
+ goto unlock;
+
++ priv->lpm_ctrl = ret;
++
+ ret |= MDIO_CTRL1_LPOWER;
+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
+
+@@ -1270,69 +1545,106 @@ unlock:
+
+ static int amd_xgbe_phy_resume(struct phy_device *phydev)
+ {
+- int ret;
++ struct amd_xgbe_phy_priv *priv = phydev->priv;
+
+ mutex_lock(&phydev->lock);
+
+- ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
+- if (ret < 0)
+- goto unlock;
++ priv->lpm_ctrl &= ~MDIO_CTRL1_LPOWER;
++ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, priv->lpm_ctrl);
+
+- ret &= ~MDIO_CTRL1_LPOWER;
+- phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
++ mutex_unlock(&phydev->lock);
+
+- ret = 0;
++ return 0;
++}
+
+-unlock:
+- mutex_unlock(&phydev->lock);
++static unsigned int amd_xgbe_phy_resource_count(struct platform_device *pdev,
++ unsigned int type)
++{
++ unsigned int count;
++ int i;
+
+- return ret;
++ for (i = 0, count = 0; i < pdev->num_resources; i++) {
++ struct resource *r = &pdev->resource[i];
++
++ if (type == resource_type(r))
++ count++;
++ }
++
++ return count;
+ }
+
+ static int amd_xgbe_phy_probe(struct phy_device *phydev)
+ {
+ struct amd_xgbe_phy_priv *priv;
+- struct platform_device *pdev;
+- struct device *dev;
+- char *wq_name;
+- const __be32 *property;
+- unsigned int speed_set;
++ struct platform_device *phy_pdev;
++ struct device *dev, *phy_dev;
++ unsigned int phy_resnum, phy_irqnum;
+ int ret;
+
+- if (!phydev->dev.of_node)
++ if (!phydev->bus || !phydev->bus->parent)
+ return -EINVAL;
+
+- pdev = of_find_device_by_node(phydev->dev.of_node);
+- if (!pdev)
+- return -EINVAL;
+- dev = &pdev->dev;
+-
+- wq_name = kasprintf(GFP_KERNEL, "%s-amd-xgbe-phy", phydev->bus->name);
+- if (!wq_name) {
+- ret = -ENOMEM;
+- goto err_pdev;
+- }
++ dev = phydev->bus->parent;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+- if (!priv) {
+- ret = -ENOMEM;
+- goto err_name;
+- }
++ if (!priv)
++ return -ENOMEM;
+
+- priv->pdev = pdev;
++ priv->pdev = to_platform_device(dev);
++ priv->adev = ACPI_COMPANION(dev);
+ priv->dev = dev;
+ priv->phydev = phydev;
++ mutex_init(&priv->an_mutex);
++ INIT_WORK(&priv->an_irq_work, amd_xgbe_an_irq_work);
++ INIT_WORK(&priv->an_work, amd_xgbe_an_state_machine);
++
++ if (!priv->adev || acpi_disabled) {
++ struct device_node *bus_node;
++ struct device_node *phy_node;
++
++ bus_node = priv->dev->of_node;
++ phy_node = of_parse_phandle(bus_node, "phy-handle", 0);
++ if (!phy_node) {
++ dev_err(dev, "unable to parse phy-handle\n");
++ ret = -EINVAL;
++ goto err_priv;
++ }
++
++ phy_pdev = of_find_device_by_node(phy_node);
++ of_node_put(phy_node);
++
++ if (!phy_pdev) {
++ dev_err(dev, "unable to obtain phy device\n");
++ ret = -EINVAL;
++ goto err_priv;
++ }
++
++ phy_resnum = 0;
++ phy_irqnum = 0;
++ } else {
++ /* In ACPI, the XGBE and PHY resources are the grouped
++ * together with the PHY resources at the end
++ */
++ phy_pdev = priv->pdev;
++ phy_resnum = amd_xgbe_phy_resource_count(phy_pdev,
++ IORESOURCE_MEM) - 3;
++ phy_irqnum = amd_xgbe_phy_resource_count(phy_pdev,
++ IORESOURCE_IRQ) - 1;
++ }
++ phy_dev = &phy_pdev->dev;
+
+ /* Get the device mmio areas */
+- priv->rxtx_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ priv->rxtx_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
++ phy_resnum++);
+ priv->rxtx_regs = devm_ioremap_resource(dev, priv->rxtx_res);
+ if (IS_ERR(priv->rxtx_regs)) {
+ dev_err(dev, "rxtx ioremap failed\n");
+ ret = PTR_ERR(priv->rxtx_regs);
+- goto err_priv;
++ goto err_put;
+ }
+
+- priv->sir0_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ priv->sir0_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
++ phy_resnum++);
+ priv->sir0_regs = devm_ioremap_resource(dev, priv->sir0_res);
+ if (IS_ERR(priv->sir0_regs)) {
+ dev_err(dev, "sir0 ioremap failed\n");
+@@ -1340,7 +1652,8 @@ static int amd_xgbe_phy_probe(struct phy_device *phydev)
+ goto err_rxtx;
+ }
+
+- priv->sir1_res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
++ priv->sir1_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
++ phy_resnum++);
+ priv->sir1_regs = devm_ioremap_resource(dev, priv->sir1_res);
+ if (IS_ERR(priv->sir1_regs)) {
+ dev_err(dev, "sir1 ioremap failed\n");
+@@ -1348,40 +1661,153 @@ static int amd_xgbe_phy_probe(struct phy_device *phydev)
+ goto err_sir0;
+ }
+
++ /* Get the auto-negotiation interrupt */
++ ret = platform_get_irq(phy_pdev, phy_irqnum);
++ if (ret < 0) {
++ dev_err(dev, "platform_get_irq failed\n");
++ goto err_sir1;
++ }
++ priv->an_irq = ret;
++
+ /* Get the device speed set property */
+- speed_set = 0;
+- property = of_get_property(dev->of_node, XGBE_PHY_SPEEDSET_PROPERTY,
+- NULL);
+- if (property)
+- speed_set = be32_to_cpu(*property);
+-
+- switch (speed_set) {
+- case 0:
+- priv->speed_set = AMD_XGBE_PHY_SPEEDSET_1000_10000;
+- break;
+- case 1:
+- priv->speed_set = AMD_XGBE_PHY_SPEEDSET_2500_10000;
++ ret = device_property_read_u32(phy_dev, XGBE_PHY_SPEEDSET_PROPERTY,
++ &priv->speed_set);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_SPEEDSET_PROPERTY);
++ goto err_sir1;
++ }
++
++ switch (priv->speed_set) {
++ case AMD_XGBE_PHY_SPEEDSET_1000_10000:
++ case AMD_XGBE_PHY_SPEEDSET_2500_10000:
+ break;
+ default:
+- dev_err(dev, "invalid amd,speed-set property\n");
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_SPEEDSET_PROPERTY);
+ ret = -EINVAL;
+ goto err_sir1;
+ }
+
+- priv->link = 1;
++ if (device_property_present(phy_dev, XGBE_PHY_BLWC_PROPERTY)) {
++ ret = device_property_read_u32_array(phy_dev,
++ XGBE_PHY_BLWC_PROPERTY,
++ priv->serdes_blwc,
++ XGBE_PHY_SPEEDS);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_BLWC_PROPERTY);
++ goto err_sir1;
++ }
++ } else {
++ memcpy(priv->serdes_blwc, amd_xgbe_phy_serdes_blwc,
++ sizeof(priv->serdes_blwc));
++ }
+
+- mutex_init(&priv->an_mutex);
+- INIT_WORK(&priv->an_work, amd_xgbe_an_state_machine);
+- priv->an_workqueue = create_singlethread_workqueue(wq_name);
+- if (!priv->an_workqueue) {
+- ret = -ENOMEM;
+- goto err_sir1;
++ if (device_property_present(phy_dev, XGBE_PHY_CDR_RATE_PROPERTY)) {
++ ret = device_property_read_u32_array(phy_dev,
++ XGBE_PHY_CDR_RATE_PROPERTY,
++ priv->serdes_cdr_rate,
++ XGBE_PHY_SPEEDS);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_CDR_RATE_PROPERTY);
++ goto err_sir1;
++ }
++ } else {
++ memcpy(priv->serdes_cdr_rate, amd_xgbe_phy_serdes_cdr_rate,
++ sizeof(priv->serdes_cdr_rate));
++ }
++
++ if (device_property_present(phy_dev, XGBE_PHY_PQ_SKEW_PROPERTY)) {
++ ret = device_property_read_u32_array(phy_dev,
++ XGBE_PHY_PQ_SKEW_PROPERTY,
++ priv->serdes_pq_skew,
++ XGBE_PHY_SPEEDS);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_PQ_SKEW_PROPERTY);
++ goto err_sir1;
++ }
++ } else {
++ memcpy(priv->serdes_pq_skew, amd_xgbe_phy_serdes_pq_skew,
++ sizeof(priv->serdes_pq_skew));
++ }
++
++ if (device_property_present(phy_dev, XGBE_PHY_TX_AMP_PROPERTY)) {
++ ret = device_property_read_u32_array(phy_dev,
++ XGBE_PHY_TX_AMP_PROPERTY,
++ priv->serdes_tx_amp,
++ XGBE_PHY_SPEEDS);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_TX_AMP_PROPERTY);
++ goto err_sir1;
++ }
++ } else {
++ memcpy(priv->serdes_tx_amp, amd_xgbe_phy_serdes_tx_amp,
++ sizeof(priv->serdes_tx_amp));
++ }
++
++ if (device_property_present(phy_dev, XGBE_PHY_DFE_CFG_PROPERTY)) {
++ ret = device_property_read_u32_array(phy_dev,
++ XGBE_PHY_DFE_CFG_PROPERTY,
++ priv->serdes_dfe_tap_cfg,
++ XGBE_PHY_SPEEDS);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_DFE_CFG_PROPERTY);
++ goto err_sir1;
++ }
++ } else {
++ memcpy(priv->serdes_dfe_tap_cfg,
++ amd_xgbe_phy_serdes_dfe_tap_cfg,
++ sizeof(priv->serdes_dfe_tap_cfg));
+ }
+
++ if (device_property_present(phy_dev, XGBE_PHY_DFE_ENA_PROPERTY)) {
++ ret = device_property_read_u32_array(phy_dev,
++ XGBE_PHY_DFE_ENA_PROPERTY,
++ priv->serdes_dfe_tap_ena,
++ XGBE_PHY_SPEEDS);
++ if (ret) {
++ dev_err(dev, "invalid %s property\n",
++ XGBE_PHY_DFE_ENA_PROPERTY);
++ goto err_sir1;
++ }
++ } else {
++ memcpy(priv->serdes_dfe_tap_ena,
++ amd_xgbe_phy_serdes_dfe_tap_ena,
++ sizeof(priv->serdes_dfe_tap_ena));
++ }
++
++ /* Initialize supported features */
++ phydev->supported = SUPPORTED_Autoneg;
++ phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
++ phydev->supported |= SUPPORTED_Backplane;
++ phydev->supported |= SUPPORTED_10000baseKR_Full;
++ switch (priv->speed_set) {
++ case AMD_XGBE_PHY_SPEEDSET_1000_10000:
++ phydev->supported |= SUPPORTED_1000baseKX_Full;
++ break;
++ case AMD_XGBE_PHY_SPEEDSET_2500_10000:
++ phydev->supported |= SUPPORTED_2500baseX_Full;
++ break;
++ }
++
++ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_ABILITY);
++ if (ret < 0)
++ return ret;
++ priv->fec_ability = ret & XGBE_PHY_FEC_MASK;
++ if (priv->fec_ability & XGBE_PHY_FEC_ENABLE)
++ phydev->supported |= SUPPORTED_10000baseR_FEC;
++
++ phydev->advertising = phydev->supported;
++
+ phydev->priv = priv;
+
+- kfree(wq_name);
+- of_dev_put(pdev);
++ if (!priv->adev || acpi_disabled)
++ platform_device_put(phy_pdev);
+
+ return 0;
+
+@@ -1400,15 +1826,13 @@ err_rxtx:
+ devm_release_mem_region(dev, priv->rxtx_res->start,
+ resource_size(priv->rxtx_res));
+
++err_put:
++ if (!priv->adev || acpi_disabled)
++ platform_device_put(phy_pdev);
++
+ err_priv:
+ devm_kfree(dev, priv);
+
+-err_name:
+- kfree(wq_name);
+-
+-err_pdev:
+- of_dev_put(pdev);
+-
+ return ret;
+ }
+
+@@ -1417,13 +1841,12 @@ static void amd_xgbe_phy_remove(struct phy_device *phydev)
+ struct amd_xgbe_phy_priv *priv = phydev->priv;
+ struct device *dev = priv->dev;
+
+- /* Stop any in process auto-negotiation */
+- mutex_lock(&priv->an_mutex);
+- priv->an_state = AMD_XGBE_AN_EXIT;
+- mutex_unlock(&priv->an_mutex);
++ if (priv->an_irq_allocated) {
++ devm_free_irq(dev, priv->an_irq, priv);
+
+- flush_workqueue(priv->an_workqueue);
+- destroy_workqueue(priv->an_workqueue);
++ flush_workqueue(priv->an_workqueue);
++ destroy_workqueue(priv->an_workqueue);
++ }
+
+ /* Release resources */
+ devm_iounmap(dev, priv->sir1_regs);
+@@ -1452,6 +1875,7 @@ static struct phy_driver amd_xgbe_phy_driver[] = {
+ .phy_id_mask = XGBE_PHY_MASK,
+ .name = "AMD XGBE PHY",
+ .features = 0,
++ .flags = PHY_IS_INTERNAL,
+ .probe = amd_xgbe_phy_probe,
+ .remove = amd_xgbe_phy_remove,
+ .soft_reset = amd_xgbe_phy_soft_reset,
+diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
+index abcafaa..6bdf476 100644
+--- a/include/linux/clocksource.h
++++ b/include/linux/clocksource.h
+@@ -87,6 +87,15 @@ static inline u64 cyclecounter_cyc2ns(const struct cyclecounter *cc,
+ }
+
+ /**
++ * timecounter_adjtime - Shifts the time of the clock.
++ * @delta: Desired change in nanoseconds.
++ */
++static inline void timecounter_adjtime(struct timecounter *tc, s64 delta)
++{
++ tc->nsec += delta;
++}
++
++/**
+ * timecounter_init - initialize a time counter
+ * @tc: Pointer to time counter which is to be initialized/reset
+ * @cc: A cycle counter, ready to be used.
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-1-styx-linux-tracking.git-2a3f98071e81b66033f6272f6c632023d1dcb1d2.patch b/meta-seattle/recipes-kernel/linux/files/412-1-styx-linux-tracking.git-2a3f98071e81b66033f6272f6c632023d1dcb1d2.patch
new file mode 100644
index 00000000..1f392a48
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-1-styx-linux-tracking.git-2a3f98071e81b66033f6272f6c632023d1dcb1d2.patch
@@ -0,0 +1,350 @@
+From 2f12ab9f8409067cd3a977994659c1a0e8f3088b Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Mon, 10 Aug 2015 17:19:12 +0200
+Subject: [PATCH] Subject: [PATCH] ACPI / scan: Add support for ACPI _CLS
+ device matching
+
+Device drivers typically use ACPI _HIDs/_CIDs listed in struct device_driver
+acpi_match_table to match devices. However, for generic drivers, we do not
+want to list _HID for all supported devices. Also, certain classes of devices
+do not have _CID (e.g. SATA, USB). Instead, we can leverage ACPI _CLS,
+which specifies PCI-defined class code (i.e. base-class, subclass and
+programming interface). This patch adds support for matching ACPI devices using
+the _CLS method.
+
+To support loadable module, current design uses _HID or _CID to match device's
+modalias. With the new way of matching with _CLS this would requires modification
+to the current ACPI modalias key to include _CLS. This patch appends PCI-defined
+class-code to the existing ACPI modalias as following.
+
+ acpi:<HID>:<CID1>:<CID2>:..:<CIDn>:<bbsspp>:
+E.g:
+ # cat /sys/devices/platform/AMDI0600:00/modalias
+ acpi:AMDI0600:010601:
+
+where bb is th base-class code, ss is te sub-class code, and pp is the
+programming interface code
+
+Since there would not be _HID/_CID in the ACPI matching table of the driver,
+this patch adds a field to acpi_device_id to specify the matching _CLS.
+
+ static const struct acpi_device_id ahci_acpi_match[] = {
+ { "", 0, PCI_CLASS_STORAGE_SATA_AHCI },
+ {},
+ };
+
+In this case, the corresponded entry in modules.alias file would be:
+
+ alias acpi*:010601:* ahci_platform
+
+Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/acpi/acpica/acutils.h | 3 ++
+ drivers/acpi/acpica/nsxfname.c | 21 ++++++++++--
+ drivers/acpi/acpica/utids.c | 71 +++++++++++++++++++++++++++++++++++++++
+ drivers/acpi/scan.c | 20 ++++++++---
+ include/acpi/acnames.h | 1 +
+ include/acpi/actypes.h | 4 ++-
+ include/linux/mod_devicetable.h | 1 +
+ scripts/mod/devicetable-offsets.c | 1 +
+ scripts/mod/file2alias.c | 14 ++++++--
+ 9 files changed, 126 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
+index 2b3c5bd..218ddfd 100644
+--- a/drivers/acpi/acpica/acutils.h
++++ b/drivers/acpi/acpica/acutils.h
+@@ -430,6 +430,9 @@ acpi_status
+ acpi_ut_execute_CID(struct acpi_namespace_node *device_node,
+ struct acpi_pnp_device_id_list ** return_cid_list);
+
++acpi_status
++acpi_ut_execute_CLS(struct acpi_namespace_node *device_node,
++ struct acpi_pnp_device_id **return_id);
+ /*
+ * utlock - reader/writer locks
+ */
+diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c
+index d66c326..3754db5 100644
+--- a/drivers/acpi/acpica/nsxfname.c
++++ b/drivers/acpi/acpica/nsxfname.c
+@@ -276,11 +276,12 @@ acpi_get_object_info(acpi_handle handle,
+ struct acpi_pnp_device_id *hid = NULL;
+ struct acpi_pnp_device_id *uid = NULL;
+ struct acpi_pnp_device_id *sub = NULL;
++ struct acpi_pnp_device_id *cls = NULL;
+ char *next_id_string;
+ acpi_object_type type;
+ acpi_name name;
+ u8 param_count = 0;
+- u8 valid = 0;
++ u16 valid = 0;
+ u32 info_size;
+ u32 i;
+ acpi_status status;
+@@ -320,7 +321,7 @@ acpi_get_object_info(acpi_handle handle,
+ if ((type == ACPI_TYPE_DEVICE) || (type == ACPI_TYPE_PROCESSOR)) {
+ /*
+ * Get extra info for ACPI Device/Processor objects only:
+- * Run the Device _HID, _UID, _SUB, and _CID methods.
++ * Run the Device _HID, _UID, _SUB, _CID and _CLS methods.
+ *
+ * Note: none of these methods are required, so they may or may
+ * not be present for this device. The Info->Valid bitfield is used
+@@ -351,6 +352,14 @@ acpi_get_object_info(acpi_handle handle,
+ valid |= ACPI_VALID_SUB;
+ }
+
++ /* Execute the Device._CLS method */
++
++ status = acpi_ut_execute_CLS(node, &cls);
++ if (ACPI_SUCCESS(status)) {
++ info_size += cls->length;
++ valid |= ACPI_VALID_CLS;
++ }
++
+ /* Execute the Device._CID method */
+
+ status = acpi_ut_execute_CID(node, &cid_list);
+@@ -468,6 +477,11 @@ acpi_get_object_info(acpi_handle handle,
+ sub, next_id_string);
+ }
+
++ if (cls) {
++ next_id_string = acpi_ns_copy_device_id(&info->cls,
++ cls, next_id_string);
++ }
++
+ if (cid_list) {
+ info->compatible_id_list.count = cid_list->count;
+ info->compatible_id_list.list_size = cid_list->list_size;
+@@ -510,6 +524,9 @@ cleanup:
+ if (cid_list) {
+ ACPI_FREE(cid_list);
+ }
++ if (cls) {
++ ACPI_FREE(cls);
++ }
+ return (status);
+ }
+
+diff --git a/drivers/acpi/acpica/utids.c b/drivers/acpi/acpica/utids.c
+index 27431cf..bc77122 100644
+--- a/drivers/acpi/acpica/utids.c
++++ b/drivers/acpi/acpica/utids.c
+@@ -416,3 +416,74 @@ cleanup:
+ acpi_ut_remove_reference(obj_desc);
+ return_ACPI_STATUS(status);
+ }
++
++/*******************************************************************************
++ *
++ * FUNCTION: acpi_ut_execute_CLS
++ *
++ * PARAMETERS: device_node - Node for the device
++ * return_id - Where the string UID is returned
++ *
++ * RETURN: Status
++ *
++ * DESCRIPTION: Executes the _CLS control method that returns PCI-defined
++ * class code of the device. The ACPI spec define _CLS as a
++ * package with three integers. The returned string has format:
++ *
++ * "bbsspp"
++ * where:
++ * bb = Base-class code
++ * ss = Sub-class code
++ * pp = Programming Interface code
++ *
++ ******************************************************************************/
++
++acpi_status
++acpi_ut_execute_CLS(struct acpi_namespace_node *device_node,
++ struct acpi_pnp_device_id **return_id)
++{
++ struct acpi_pnp_device_id *cls;
++ union acpi_operand_object *obj_desc;
++ union acpi_operand_object **cls_objects;
++ acpi_status status;
++
++ ACPI_FUNCTION_TRACE(ut_execute_CLS);
++ status = acpi_ut_evaluate_object(device_node, METHOD_NAME__CLS,
++ ACPI_BTYPE_PACKAGE, &obj_desc);
++ if (ACPI_FAILURE(status))
++ return_ACPI_STATUS(status);
++
++ cls_objects = obj_desc->package.elements;
++
++ if (obj_desc->common.type == ACPI_TYPE_PACKAGE &&
++ obj_desc->package.count == 3 &&
++ cls_objects[0]->common.type == ACPI_TYPE_INTEGER &&
++ cls_objects[1]->common.type == ACPI_TYPE_INTEGER &&
++ cls_objects[2]->common.type == ACPI_TYPE_INTEGER) {
++
++ /* Allocate a buffer for the CLS */
++ cls = ACPI_ALLOCATE_ZEROED(sizeof(struct acpi_pnp_device_id) +
++ (acpi_size) 7);
++ if (!cls) {
++ status = AE_NO_MEMORY;
++ goto cleanup;
++ }
++
++ cls->string =
++ ACPI_ADD_PTR(char, cls, sizeof(struct acpi_pnp_device_id));
++
++ sprintf(cls->string, "%02x%02x%02x",
++ (u8)ACPI_TO_INTEGER(cls_objects[0]->integer.value),
++ (u8)ACPI_TO_INTEGER(cls_objects[1]->integer.value),
++ (u8)ACPI_TO_INTEGER(cls_objects[2]->integer.value));
++ cls->length = 7;
++ *return_id = cls;
++ }
++
++cleanup:
++
++ /* On exit, we must delete the return object */
++
++ acpi_ut_remove_reference(obj_desc);
++ return_ACPI_STATUS(status);
++}
+diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
+index 03141aa..ca6297b1 100644
+--- a/drivers/acpi/scan.c
++++ b/drivers/acpi/scan.c
+@@ -1031,11 +1031,18 @@ static const struct acpi_device_id *__acpi_match_device(
+ if (!device || !device->status.present)
+ return NULL;
+
+- list_for_each_entry(hwid, &device->pnp.ids, list) {
+- /* First, check the ACPI/PNP IDs provided by the caller. */
+- for (id = ids; id->id[0]; id++)
+- if (!strcmp((char *) id->id, hwid->id))
+- return id;
++ list_for_each_entry(hwid, &device->pnp.ids, list) {
++ for (id = ids; id->id[0] || id->cls; id++) {
++ if (id->id[0] && !strcmp((char *) id->id, hwid->id)) {
++ return id;
++ } else if (id->cls) {
++ char buf[7];
++
++ sprintf(buf, "%06x", id->cls);
++ if (!strcmp(buf, hwid->id))
++ return id;
++ }
++ }
+
+ /*
+ * Next, check the special "PRP0001" ID and try to match the
+@@ -2057,6 +2064,9 @@ static void acpi_set_pnp_ids(acpi_handle handle, struct acpi_device_pnp *pnp,
+ pnp->unique_id = kstrdup(info->unique_id.string,
+ GFP_KERNEL);
+
++ if (info->valid & ACPI_VALID_CLS)
++ acpi_add_id(pnp, info->cls.string);
++
+ kfree(info);
+
+ /*
+diff --git a/include/acpi/acnames.h b/include/acpi/acnames.h
+index 273de70..b52c0dc 100644
+--- a/include/acpi/acnames.h
++++ b/include/acpi/acnames.h
+@@ -51,6 +51,7 @@
+ #define METHOD_NAME__BBN "_BBN"
+ #define METHOD_NAME__CBA "_CBA"
+ #define METHOD_NAME__CID "_CID"
++#define METHOD_NAME__CLS "_CLS"
+ #define METHOD_NAME__CRS "_CRS"
+ #define METHOD_NAME__DDN "_DDN"
+ #define METHOD_NAME__HID "_HID"
+diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h
+index 1c3002e..0ad0c61 100644
+--- a/include/acpi/actypes.h
++++ b/include/acpi/actypes.h
+@@ -1166,7 +1166,7 @@ struct acpi_device_info {
+ u32 name; /* ACPI object Name */
+ acpi_object_type type; /* ACPI object Type */
+ u8 param_count; /* If a method, required parameter count */
+- u8 valid; /* Indicates which optional fields are valid */
++ u16 valid; /* Indicates which optional fields are valid */
+ u8 flags; /* Miscellaneous info */
+ u8 highest_dstates[4]; /* _sx_d values: 0xFF indicates not valid */
+ u8 lowest_dstates[5]; /* _sx_w values: 0xFF indicates not valid */
+@@ -1175,6 +1175,7 @@ struct acpi_device_info {
+ struct acpi_pnp_device_id hardware_id; /* _HID value */
+ struct acpi_pnp_device_id unique_id; /* _UID value */
+ struct acpi_pnp_device_id subsystem_id; /* _SUB value */
++ struct acpi_pnp_device_id cls; /* _CLS value */
+ struct acpi_pnp_device_id_list compatible_id_list; /* _CID list <must be last> */
+ };
+
+@@ -1192,6 +1193,7 @@ struct acpi_device_info {
+ #define ACPI_VALID_CID 0x20
+ #define ACPI_VALID_SXDS 0x40
+ #define ACPI_VALID_SXWS 0x80
++#define ACPI_VALID_CLS 0x100
+
+ /* Flags for _STA return value (current_status above) */
+
+diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
+index 3bfd567..8a958d1 100644
+--- a/include/linux/mod_devicetable.h
++++ b/include/linux/mod_devicetable.h
+@@ -35,6 +35,7 @@ struct ieee1394_device_id {
+ __u32 specifier_id;
+ __u32 version;
+ kernel_ulong_t driver_data;
++ __u32 cls;
+ };
+
+
+diff --git a/scripts/mod/devicetable-offsets.c b/scripts/mod/devicetable-offsets.c
+index fce36d0..aac0be3 100644
+--- a/scripts/mod/devicetable-offsets.c
++++ b/scripts/mod/devicetable-offsets.c
+@@ -63,6 +63,7 @@ int main(void)
+
+ DEVID(acpi_device_id);
+ DEVID_FIELD(acpi_device_id, id);
++ DEVID_FIELD(acpi_device_id, cls);
+
+ DEVID(pnp_device_id);
+ DEVID_FIELD(pnp_device_id, id);
+diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
+index 78691d5..f5599ad 100644
+--- a/scripts/mod/file2alias.c
++++ b/scripts/mod/file2alias.c
+@@ -511,12 +511,22 @@ static int do_serio_entry(const char *filename,
+ }
+ ADD_TO_DEVTABLE("serio", serio_device_id, do_serio_entry);
+
+-/* looks like: "acpi:ACPI0003 or acpi:PNP0C0B" or "acpi:LNXVIDEO" */
++/* looks like: "acpi:ACPI0003" or "acpi:PNP0C0B" or "acpi:LNXVIDEO" or
++ * "acpi:bbsspp" (bb=base-class, ss=sub-class, pp=prog-if)
++ *
++ * NOTE: * Each driver should use one of the following : _HID, _CIDs or _CLS.
++ */
+ static int do_acpi_entry(const char *filename,
+ void *symval, char *alias)
+ {
+ DEF_FIELD_ADDR(symval, acpi_device_id, id);
+- sprintf(alias, "acpi*:%s:*", *id);
++ DEF_FIELD_ADDR(symval, acpi_device_id, cls);
++
++ if (id && strlen((const char *)*id))
++ sprintf(alias, "acpi*:%s:*", *id);
++ else if (cls)
++ sprintf(alias, "acpi*:%06x:*", *cls);
++
+ return 1;
+ }
+ ADD_TO_DEVTABLE("acpi", acpi_device_id, do_acpi_entry);
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-2-styx-linux-tracking.git-390adff766de2d7117ec666674d114dfd5b5a911.patch b/meta-seattle/recipes-kernel/linux/files/412-2-styx-linux-tracking.git-390adff766de2d7117ec666674d114dfd5b5a911.patch
new file mode 100644
index 00000000..4d01aeba
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-2-styx-linux-tracking.git-390adff766de2d7117ec666674d114dfd5b5a911.patch
@@ -0,0 +1,92 @@
+From c6824811936cbbdb9a13100b23b2f39b307b571f Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Mon, 10 Aug 2015 17:28:23 +0200
+Subject: [PATCH] Subject: [PATCH] ata: ahci_platform: Add ACPI _CLS matching
+
+This patch adds ACPI supports for AHCI platform driver, which uses _CLS
+method to match the device.
+
+The following is an example of ASL structure in DSDT for a SATA controller,
+which contains _CLS package to be matched by the ahci_platform driver:
+
+ Device (AHC0) // AHCI Controller
+ {
+ Name(_HID, "AMDI0600")
+ Name (_CCA, 1)
+ Name (_CLS, Package (3)
+ {
+ 0x01, // Base Class: Mass Storage
+ 0x06, // Sub-Class: serial ATA
+ 0x01, // Interface: AHCI
+ })
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite, 0xE0300000, 0x00010000)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,,,) { 387 }
+ })
+ }
+
+Also, since ATA driver should not require PCI support for ATA_ACPI,
+this patch removes dependency in the driver/ata/Kconfig.
+
+Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/ata/Kconfig | 2 +-
+ drivers/ata/ahci_platform.c | 9 +++++++++
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
+index 9dca4b9..7954ea2 100644
+--- a/drivers/ata/Kconfig
++++ b/drivers/ata/Kconfig
+@@ -48,7 +48,7 @@ config ATA_VERBOSE_ERROR
+
+ config ATA_ACPI
+ bool "ATA ACPI Support"
+- depends on ACPI && PCI
++ depends on ACPI
+ default y
+ help
+ This option adds support for ATA-related ACPI objects.
+diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
+index 78d6ae0..c0c055d 100644
+--- a/drivers/ata/ahci_platform.c
++++ b/drivers/ata/ahci_platform.c
+@@ -20,6 +20,8 @@
+ #include <linux/platform_device.h>
+ #include <linux/libata.h>
+ #include <linux/ahci_platform.h>
++#include <linux/acpi.h>
++#include <linux/pci_ids.h>
+ #include "ahci.h"
+
+ #define DRV_NAME "ahci"
+@@ -78,12 +80,19 @@ static const struct of_device_id ahci_of_match[] = {
+ };
+ MODULE_DEVICE_TABLE(of, ahci_of_match);
+
++static const struct acpi_device_id ahci_acpi_match[] = {
++ { "", 0, PCI_CLASS_STORAGE_SATA_AHCI },
++ {},
++};
++MODULE_DEVICE_TABLE(acpi, ahci_acpi_match);
++
+ static struct platform_driver ahci_driver = {
+ .probe = ahci_probe,
+ .remove = ata_platform_remove_one,
+ .driver = {
+ .name = DRV_NAME,
+ .of_match_table = ahci_of_match,
++ .acpi_match_table = ahci_acpi_match,
+ .pm = &ahci_pm_ops,
+ },
+ };
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-3-styx-linux-tracking.git-427c918b150e5f9c25ea36b3d640e511a08abb5f.patch b/meta-seattle/recipes-kernel/linux/files/412-3-styx-linux-tracking.git-427c918b150e5f9c25ea36b3d640e511a08abb5f.patch
new file mode 100644
index 00000000..72954448
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-3-styx-linux-tracking.git-427c918b150e5f9c25ea36b3d640e511a08abb5f.patch
@@ -0,0 +1,213 @@
+From 8c969157c0ac60d23ff2102ca0b5a893cedf2fad Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Mon, 10 Aug 2015 17:53:12 +0200
+Subject: [PATCH] Subject: [PATCH] pci-host-generic
+
+From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+Date: Tue, 20 Jan 2015 19:30:58 -0600
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/pci/host/Kconfig | 2 +-
+ drivers/pci/host/pci-host-generic.c | 97 ++++++++++++++++++++++++++++++++-----
+ 2 files changed, 87 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
+index 1dfb567..aeca260 100644
+--- a/drivers/pci/host/Kconfig
++++ b/drivers/pci/host/Kconfig
+@@ -53,7 +53,7 @@ config PCI_RCAR_GEN2_PCIE
+
+ config PCI_HOST_GENERIC
+ bool "Generic PCI host controller"
+- depends on ARM && OF
++ depends on (ARM || ARM64) && OF
+ help
+ Say Y here if you want to support a simple generic PCI host
+ controller, such as the one emulated by kvmtool.
+diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c
+index ba46e58..01931e8 100644
+--- a/drivers/pci/host/pci-host-generic.c
++++ b/drivers/pci/host/pci-host-generic.c
+@@ -44,12 +44,21 @@ struct gen_pci {
+ struct list_head resources;
+ };
+
++#ifdef CONFIG_ARM64
++#define bus_to_gen_pci(b) \
++ ((struct gen_pci *)b->sysdata)
++#else
++#define bus_to_gen_pci(b) \
++ ((struct gen_pci *) \
++ (((struct pci_sys_data *) \
++ (bus->sysdata))->private_data))
++#endif
++
+ static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
+ unsigned int devfn,
+ int where)
+ {
+- struct pci_sys_data *sys = bus->sysdata;
+- struct gen_pci *pci = sys->private_data;
++ struct gen_pci *pci = bus_to_gen_pci(bus);
+ resource_size_t idx = bus->number - pci->cfg.bus_range->start;
+
+ return pci->cfg.win[idx] + ((devfn << 8) | where);
+@@ -64,8 +73,7 @@ static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
+ unsigned int devfn,
+ int where)
+ {
+- struct pci_sys_data *sys = bus->sysdata;
+- struct gen_pci *pci = sys->private_data;
++ struct gen_pci *pci = bus_to_gen_pci(bus);
+ resource_size_t idx = bus->number - pci->cfg.bus_range->start;
+
+ return pci->cfg.win[idx] + ((devfn << 12) | where);
+@@ -94,6 +102,13 @@ MODULE_DEVICE_TABLE(of, gen_pci_of_match);
+
+ static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
+ {
++ struct pci_host_bridge_window *win;
++
++ list_for_each_entry(win, &pci->resources, list)
++ /* Release only requested resources */
++ if (win->res->parent)
++ release_resource(win->res);
++
+ pci_free_resource_list(&pci->resources);
+ }
+
+@@ -117,11 +132,6 @@ static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
+ case IORESOURCE_IO:
+ parent = &ioport_resource;
+ err = pci_remap_iospace(res, iobase);
+- if (err) {
+- dev_warn(dev, "error %d: failed to map resource %pR\n",
+- err, res);
+- continue;
+- }
+ break;
+ case IORESOURCE_MEM:
+ parent = &iomem_resource;
+@@ -129,11 +139,20 @@ static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
+ break;
+ case IORESOURCE_BUS:
+ pci->cfg.bus_range = res;
++ continue;
+ default:
++ err = -EINVAL;
+ continue;
+ }
+
+- err = devm_request_resource(dev, parent, res);
++ if (err) {
++ dev_warn(dev,
++ "error %d: failed to add resource %pR\n", err,
++ res);
++ continue;
++ }
++
++ err = request_resource(parent, res);
+ if (err)
+ goto out_release_res;
+ }
+@@ -198,12 +217,51 @@ static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
+ return 0;
+ }
+
++#ifndef CONFIG_ARM64
+ static int gen_pci_setup(int nr, struct pci_sys_data *sys)
+ {
+ struct gen_pci *pci = sys->private_data;
+ list_splice_init(&pci->resources, &sys->resources);
+ return 1;
+ }
++#endif
++
++#ifdef CONFIG_ARM64
++struct pci_bus *gen_scan_root_bus(struct device *parent, int bus,
++ struct pci_ops *ops, void *sysdata,
++ struct list_head *resources)
++{
++ struct pci_host_bridge_window *window;
++ bool found = false;
++ struct pci_bus *b;
++ int max;
++
++ list_for_each_entry(window, resources, list)
++ if (window->res->flags & IORESOURCE_BUS) {
++ found = true;
++ break;
++ }
++
++ b = pci_create_root_bus(parent, bus, ops, sysdata, resources);
++ if (!b)
++ return NULL;
++
++ if (!found) {
++ dev_info(&b->dev,
++ "No busn resource found for root bus, will use [bus %02x-ff]\n",
++ bus);
++ pci_bus_insert_busn_res(b, bus, 255);
++ }
++
++ max = pci_scan_child_bus(b);
++
++ if (!found)
++ pci_bus_update_busn_res_end(b, max);
++
++ pci_bus_add_devices(b);
++ return b;
++}
++#endif
+
+ static int gen_pci_probe(struct platform_device *pdev)
+ {
+@@ -214,6 +272,7 @@ static int gen_pci_probe(struct platform_device *pdev)
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
++#ifndef CONFIG_ARM64
+ struct hw_pci hw = {
+ .nr_controllers = 1,
+ .private_data = (void **)&pci,
+@@ -221,6 +280,9 @@ static int gen_pci_probe(struct platform_device *pdev)
+ .map_irq = of_irq_parse_and_map_pci,
+ .ops = &gen_pci_ops,
+ };
++#else
++ struct pci_bus *bus;
++#endif
+
+ if (!pci)
+ return -ENOMEM;
+@@ -257,8 +319,21 @@ static int gen_pci_probe(struct platform_device *pdev)
+ gen_pci_release_of_pci_ranges(pci);
+ return err;
+ }
+-
++#ifdef CONFIG_ARM64
++ bus = gen_scan_root_bus(&pdev->dev, pci->cfg.bus_range->start,
++ &gen_pci_ops, pci, &pci->resources);
++ if (!bus) {
++ dev_err(&pdev->dev, "failed to enable PCIe ports\n");
++ return -ENODEV;
++ }
++
++ if (!pci_has_flag(PCI_PROBE_ONLY)) {
++ pci_bus_size_bridges(bus);
++ pci_bus_assign_resources(bus);
++ }
++#else
+ pci_common_init_dev(dev, &hw);
++#endif /* CONFIG_ARM64 */
+ return 0;
+ }
+
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-4-styx-linux-tracking.git-d1072e3d950aa6e348313a31395091003611f794.patch b/meta-seattle/recipes-kernel/linux/files/412-4-styx-linux-tracking.git-d1072e3d950aa6e348313a31395091003611f794.patch
new file mode 100644
index 00000000..10042a94
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-4-styx-linux-tracking.git-d1072e3d950aa6e348313a31395091003611f794.patch
@@ -0,0 +1,54 @@
+From a0f4d0a183159646da9eacd6645c9c8de1fe958c Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Mon, 10 Aug 2015 18:05:08 +0200
+Subject: [PATCH] [PATCH] probe-only
+
+From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+Date: Tue, 20 Jan 2015 19:48:59 -0600
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/pci/pci.c | 8 +++++++-
+ drivers/pci/setup-bus.c | 3 ++-
+ 2 files changed, 9 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
+index acc4b6e..221f47f 100644
+--- a/drivers/pci/pci.c
++++ b/drivers/pci/pci.c
+@@ -1198,7 +1198,13 @@ EXPORT_SYMBOL_GPL(pci_load_and_free_saved_state);
+
+ int __weak pcibios_enable_device(struct pci_dev *dev, int bars)
+ {
+- return pci_enable_resources(dev, bars);
++ int err;
++
++ if (!pci_has_flag(PCI_PROBE_ONLY)) {
++ err = pci_enable_resources(dev, bars);
++ if (err < 0)
++ return err;
++ }
+ }
+
+ static int do_pci_enable_device(struct pci_dev *dev, int bars)
+diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
+index 508cc56..029222c 100644
+--- a/drivers/pci/setup-bus.c
++++ b/drivers/pci/setup-bus.c
+@@ -1737,7 +1737,8 @@ void __init pci_assign_unassigned_resources(void)
+ struct pci_bus *root_bus;
+
+ list_for_each_entry(root_bus, &pci_root_buses, node)
+- pci_assign_unassigned_root_bus_resources(root_bus);
++ if (!pci_has_flag(PCI_PROBE_ONLY))
++ pci_assign_unassigned_root_bus_resources(root_bus);
+ }
+
+ void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-5-styx-linux-tracking.git-2a80b31ff435cd274a61d685a4861bf0da461c90.patch b/meta-seattle/recipes-kernel/linux/files/412-5-styx-linux-tracking.git-2a80b31ff435cd274a61d685a4861bf0da461c90.patch
new file mode 100644
index 00000000..47ca0ef1
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-5-styx-linux-tracking.git-2a80b31ff435cd274a61d685a4861bf0da461c90.patch
@@ -0,0 +1,388 @@
+From 4343fa95a5f0e2e9c32faecc05e4aa1e12e27f72 Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Tue, 11 Aug 2015 13:21:33 +0200
+Subject: [PATCH] [PATCH] DO NOT UPSTREAM YET: Clean up GIC irq domain for ACPI
+
+From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+Date: Tue, 20 Jan 2015 20:02:28 -0600
+
+Instead of using the irq_default_domain, define the acpi_irq_domain.
+This still have the same assumption that ACPI only support a single
+GIC domain.
+
+Also, rename acpi_gic_init() to acpi_irq_init()
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ arch/arm64/kernel/acpi.c | 14 ++++--
+ drivers/acpi/gsi.c | 31 ++++++++++----
+ drivers/irqchip/irq-gic.c | 83 ++++++++++++++++++++++++++++++------
+ drivers/irqchip/irqchip.c | 2 +-
+ drivers/pci/pci-acpi.c | 25 +++++++++++
+ include/linux/irqchip/arm-gic-acpi.h | 6 ++-
+ include/linux/irqchip/arm-gic.h | 17 ++++++++
+ 7 files changed, 151 insertions(+), 27 deletions(-)
+
+diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
+index 8b83955..ea80ce2 100644
+--- a/arch/arm64/kernel/acpi.c
++++ b/arch/arm64/kernel/acpi.c
+@@ -319,7 +319,7 @@ void __init acpi_boot_table_init(void)
+ }
+ }
+
+-void __init acpi_gic_init(void)
++void __init acpi_irq_init(void)
+ {
+ struct acpi_table_header *table;
+ acpi_status status;
+@@ -329,6 +329,14 @@ void __init acpi_gic_init(void)
+ if (acpi_disabled)
+ return;
+
++ /**
++ * NOTE: We need to declare this before we initialize the GIC
++ * so that we can use pointers to MADT table and MSI_FRAME sub-table
++ * for reference.
++ */
++ acpi_gbl_permanent_mmap = 1;
++
++
+ status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size);
+ if (ACPI_FAILURE(status)) {
+ const char *msg = acpi_format_exception(status);
+@@ -337,8 +345,8 @@ void __init acpi_gic_init(void)
+ return;
+ }
+
+- err = gic_v2_acpi_init(table);
+- if (err)
++ err = gic_v2_acpi_init(table, &acpi_irq_domain);
++ if (err || !acpi_irq_domain)
+ pr_err("Failed to initialize GIC IRQ controller");
+
+ early_acpi_os_unmap_memory((char *)table, tbl_size);
+diff --git a/drivers/acpi/gsi.c b/drivers/acpi/gsi.c
+index 38208f2..7f1b8a0 100644
+--- a/drivers/acpi/gsi.c
++++ b/drivers/acpi/gsi.c
+@@ -11,6 +11,7 @@
+ #include <linux/acpi.h>
+ #include <linux/irq.h>
+ #include <linux/irqdomain.h>
++#include <linux/of.h>
+
+ enum acpi_irq_model_id acpi_irq_model;
+
+@@ -43,6 +44,8 @@ static unsigned int acpi_gsi_get_irq_type(int trigger, int polarity)
+ * Returns: linux IRQ number on success (>0)
+ * -EINVAL on failure
+ */
++static struct irq_domain *acpi_irq_domain;
++
+ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+ {
+ /*
+@@ -50,7 +53,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+ * the mapping corresponding to default domain by passing NULL
+ * as irq_domain parameter
+ */
+- *irq = irq_find_mapping(NULL, gsi);
++ *irq = irq_find_mapping(acpi_irq_domain, gsi);
+ /*
+ * *irq == 0 means no mapping, that should
+ * be reported as a failure
+@@ -74,20 +77,32 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger,
+ {
+ unsigned int irq;
+ unsigned int irq_type = acpi_gsi_get_irq_type(trigger, polarity);
++ struct gic_irq_alloc_info info;
++ struct irq_data *d;
+
+ /*
+ * There is no way at present to look-up the IRQ domain on ACPI,
+ * hence always create mapping referring to the default domain
+ * by passing NULL as irq_domain parameter
+ */
+- irq = irq_create_mapping(NULL, gsi);
+- if (!irq)
+- return -EINVAL;
++ if (!acpi_irq_domain)
++ BUG();
++
++ if (gic_init_irq_alloc_info(GIC_INT_TYPE_NONE,
++ gsi, irq_type, NULL, &info) < 0)
++ return -EINVAL;
++
++ irq = __irq_domain_alloc_irqs(acpi_irq_domain, -1, 1,
++ dev_to_node(dev), &info, false);
++ if (irq < 0)
++ return -ENOSPC;
++
++ d = irq_domain_get_irq_data(acpi_irq_domain, irq);
++ if (!d)
++ return -EFAULT;
++
++ d->chip->irq_set_type(d, irq_type);
+
+- /* Set irq type if specified and different than the current one */
+- if (irq_type != IRQ_TYPE_NONE &&
+- irq_type != irq_get_trigger_type(irq))
+- irq_set_irq_type(irq, irq_type);
+ return irq;
+ }
+ EXPORT_SYMBOL_GPL(acpi_register_gsi);
+diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
+index 01999d7..997d073 100644
+--- a/drivers/irqchip/irq-gic.c
++++ b/drivers/irqchip/irq-gic.c
+@@ -854,10 +854,13 @@ static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
+ int i, ret;
+ irq_hw_number_t hwirq;
+ unsigned int type = IRQ_TYPE_NONE;
+- struct of_phandle_args *irq_data = arg;
++ struct gic_irq_alloc_info *info = arg;
++ u32 intspec[3];
+
+- ret = gic_irq_domain_xlate(domain, irq_data->np, irq_data->args,
+- irq_data->args_count, &hwirq, &type);
++ intspec[0] = info->gic_int_type;
++ intspec[1] = info->hwirq;
++ intspec[2] = info->irq_type;
++ ret = gic_irq_domain_xlate(domain, info->ref, intspec, 3, &hwirq, &type);
+ if (ret)
+ return ret;
+
+@@ -867,6 +870,51 @@ static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
+ return 0;
+ }
+
++int gic_init_irq_alloc_info(unsigned int gic_int_type, unsigned int irq,
++ unsigned int irq_type, void *ref,
++ struct gic_irq_alloc_info *info)
++{
++ if (!info)
++ return -EINVAL;
++
++ if ((irq_type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_HIGH &&
++ (irq_type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_EDGE_RISING)
++ return -EINVAL;
++
++ info->ref = ref;
++ info->irq_type = irq_type;
++
++ /*
++ * ACPI have no bindings to indicate SPI or PPI, so we
++ * use different mappings from DT in ACPI.
++ *
++ * For FDT
++ * PPI interrupt: in the range [0, 15];
++ * SPI interrupt: in the range [0, 987];
++ *
++ * For ACPI, GSI should be unique so using
++ * the hwirq directly for the mapping:
++ * PPI interrupt: in the range [16, 31];
++ * SPI interrupt: in the range [32, 1019];
++ */
++
++ if (gic_int_type != ~0U) {
++ info->gic_int_type = gic_int_type;
++ info->hwirq = irq;
++
++ } else {
++ if (irq < 32) {
++ info->gic_int_type = GIC_INT_TYPE_PPI;
++ info->hwirq = irq - 16;
++ } else {
++ info->gic_int_type = GIC_INT_TYPE_SPI;
++ info->hwirq = irq - 32;
++ }
++ }
++
++ return 0;
++}
++
+ static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = {
+ .xlate = gic_irq_domain_xlate,
+ .alloc = gic_irq_domain_alloc,
+@@ -945,7 +993,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
+ gic_irqs = 1020;
+ gic->gic_irqs = gic_irqs;
+
+- if (node) { /* DT case */
++ if (!acpi_disabled) { /* ACPI case */
++ gic->domain = irq_domain_add_linear(node, gic_irqs,
++ &gic_irq_domain_hierarchy_ops, gic);
++ } else if (node) { /* DT case */
+ gic->domain = irq_domain_add_linear(node, gic_irqs,
+ &gic_irq_domain_hierarchy_ops,
+ gic);
+@@ -992,9 +1043,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
+ gic_pm_init(gic);
+ }
+
+-#ifdef CONFIG_OF
+ static int gic_cnt __initdata;
+
++#ifdef CONFIG_OF
+ static int __init
+ gic_of_init(struct device_node *node, struct device_node *parent)
+ {
+@@ -1086,7 +1137,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header,
+ }
+
+ int __init
+-gic_v2_acpi_init(struct acpi_table_header *table)
++gic_v2_acpi_init(struct acpi_table_header *table, struct irq_domain **domain)
+ {
+ void __iomem *cpu_base, *dist_base;
+ int count;
+@@ -1130,13 +1181,19 @@ gic_v2_acpi_init(struct acpi_table_header *table)
+ return -ENOMEM;
+ }
+
+- /*
+- * Initialize zero GIC instance (no multi-GIC support). Also, set GIC
+- * as default IRQ domain to allow for GSI registration and GSI to IRQ
+- * number translation (see acpi_register_gsi() and acpi_gsi_to_irq()).
+- */
+- gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL);
+- irq_set_default_host(gic_data[0].domain);
++ gic_init_bases(gic_cnt, -1, dist_base, cpu_base, 0, NULL);
++ *domain = gic_data[gic_cnt].domain;
++
++ if (!*domain) {
++ pr_err("Unable to create domain\n");
++ return -EFAULT;
++ }
++
++ if (IS_ENABLED(CONFIG_ARM_GIC_V2M)) {
++ gicv2m_acpi_init(table, gic_data[gic_cnt].domain);
++ }
++
++ gic_cnt++;
+
+ acpi_irq_model = ACPI_IRQ_MODEL_GIC;
+ return 0;
+diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c
+index afd1af3..0d3a8b1 100644
+--- a/drivers/irqchip/irqchip.c
++++ b/drivers/irqchip/irqchip.c
+@@ -28,5 +28,5 @@ void __init irqchip_init(void)
+ {
+ of_irq_init(__irqchip_of_table);
+
+- acpi_irq_init();
++ acpi_irq_init();
+ }
+diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
+index 6f6f175..fe42097 100644
+--- a/drivers/pci/pci-acpi.c
++++ b/drivers/pci/pci-acpi.c
+@@ -12,6 +12,7 @@
+ #include <linux/pci.h>
+ #include <linux/pci_hotplug.h>
+ #include <linux/module.h>
++#include <linux/msi.h>
+ #include <linux/pci-aspm.h>
+ #include <linux/pci-acpi.h>
+ #include <linux/pm_runtime.h>
+@@ -714,3 +715,27 @@ static int __init acpi_pci_init(void)
+ return 0;
+ }
+ arch_initcall(acpi_pci_init);
++
++#ifdef CONFIG_PCI_MSI
++void pci_acpi_set_phb_msi_domain(struct pci_bus *bus) {
++#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
++ u32 msi_frame_id = 0;
++ int num;
++
++ if (acpi_disabled)
++ return;
++
++ /**
++ * Since ACPI 5.1 currently does not define
++ * a way to associate MSI frame ID to a device,
++ * we can only support single MSI frame at the moment.
++ * Therefore, the id 0 is used as a default.
++ */
++ num = msi_get_num_irq_domain();
++ if (num <= 0 || num > 1)
++ return;
++
++ dev_set_msi_domain(&bus->dev, irq_find_acpi_msi_domain(msi_frame_id));
++#endif
++}
++#endif /* CONFIG_PCI_MSI */
+diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h
+index de3419e..fa8033b 100644
+--- a/include/linux/irqchip/arm-gic-acpi.h
++++ b/include/linux/irqchip/arm-gic-acpi.h
+@@ -10,6 +10,8 @@
+ #ifndef ARM_GIC_ACPI_H_
+ #define ARM_GIC_ACPI_H_
+
++#include <linux/irqchip/arm-gic.h>
++
+ #ifdef CONFIG_ACPI
+
+ /*
+@@ -22,8 +24,8 @@
+
+ struct acpi_table_header;
+
+-int gic_v2_acpi_init(struct acpi_table_header *table);
+-void acpi_gic_init(void);
++void acpi_irq_init(void);
++int gic_v2_acpi_init(struct acpi_table_header *table, struct irq_domain **domain);
+ #else
+ static inline void acpi_gic_init(void) { }
+ #endif
+diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
+index 9de976b..f490f26 100644
+--- a/include/linux/irqchip/arm-gic.h
++++ b/include/linux/irqchip/arm-gic.h
+@@ -89,12 +89,25 @@
+ #define GICH_MISR_EOI (1 << 0)
+ #define GICH_MISR_U (1 << 1)
+
++#define GIC_INT_TYPE_SPI 0
++#define GIC_INT_TYPE_PPI 1
++#define GIC_INT_TYPE_NONE ~0U
++
+ #ifndef __ASSEMBLY__
+
+ #include <linux/irqdomain.h>
+
+ struct device_node;
+
++struct gic_irq_alloc_info {
++
++ enum irq_domain_ref_type ref_type;
++ void *ref;
++ unsigned int irq_type;
++ unsigned int gic_int_type;
++ unsigned int hwirq;
++};
++
+ void gic_set_irqchip_flags(unsigned long flags);
+ void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
+ u32 offset, struct device_node *);
+@@ -114,5 +127,9 @@ int gic_get_cpu_id(unsigned int cpu);
+ void gic_migrate_target(unsigned int new_cpu_id);
+ unsigned long gic_get_sgir_physaddr(void);
+
++extern int gic_init_irq_alloc_info(unsigned int gic_int_type, unsigned int irq,
++ unsigned int irq_type, void *ref,
++ struct gic_irq_alloc_info *info);
++
+ #endif /* __ASSEMBLY */
+ #endif
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-6-styx-linux-tracking.git-1c9b07fb461d87b41854fef3a07fff65e0d95113.patch b/meta-seattle/recipes-kernel/linux/files/412-6-styx-linux-tracking.git-1c9b07fb461d87b41854fef3a07fff65e0d95113.patch
new file mode 100644
index 00000000..345218ca
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-6-styx-linux-tracking.git-1c9b07fb461d87b41854fef3a07fff65e0d95113.patch
@@ -0,0 +1,163 @@
+From 4f0837d4d1274b6e25d6bd76ac448e25592d6ea0 Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Tue, 11 Aug 2015 13:37:41 +0200
+Subject: [PATCH] [PATCH] DO NOT UPSTREAM YET: irqdomain
+
+From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+Date: Tue, 20 Jan 2015 20:02:28 -0600
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ include/linux/irqdomain.h | 14 +++++++++++++-
+ kernel/irq/irqdomain.c | 44 ++++++++++++++++++++++++++++++++++++--------
+ 2 files changed, 49 insertions(+), 9 deletions(-)
+
+diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
+index 676d730..ddd6602 100644
+--- a/include/linux/irqdomain.h
++++ b/include/linux/irqdomain.h
+@@ -45,6 +45,11 @@ struct irq_data;
+ /* Number of irqs reserved for a legacy isa controller */
+ #define NUM_ISA_INTERRUPTS 16
+
++enum irq_domain_ref_type {
++ IRQ_DOMAIN_REF_OF_DEV_NODE = 0,
++ IRQ_DOMAIN_REF_ACPI_MSI_FRAME,
++};
++
+ /**
+ * struct irq_domain_ops - Methods for irq_domain objects
+ * @match: Match an interrupt controller device node to a host, returns
+@@ -61,7 +66,7 @@ struct irq_data;
+ * to setup the irq_desc when returning from map().
+ */
+ struct irq_domain_ops {
+- int (*match)(struct irq_domain *d, struct device_node *node);
++ int (*match)(struct irq_domain *d, enum irq_domain_ref_type type, void *data);
+ int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw);
+ void (*unmap)(struct irq_domain *d, unsigned int virq);
+ int (*xlate)(struct irq_domain *d, struct device_node *node,
+@@ -116,6 +121,11 @@ struct irq_domain {
+
+ /* Optional data */
+ struct device_node *of_node;
++ enum irq_domain_ref_type type;
++ union {
++ struct device_node *of_node;
++ void *acpi_ref;
++ };
+ struct irq_domain_chip_generic *gc;
+ #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ struct irq_domain *parent;
+@@ -163,6 +173,8 @@ struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
+ void *host_data);
+ extern struct irq_domain *irq_find_host(struct device_node *node);
+ extern void irq_set_default_host(struct irq_domain *host);
++extern struct irq_domain *irq_find_domain(enum irq_domain_ref_type type,
++ void *ref);
+
+ /**
+ * irq_domain_add_linear() - Allocate and register a linear revmap irq_domain.
+diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
+index 7fac311..0f0559f 100644
+--- a/kernel/irq/irqdomain.c
++++ b/kernel/irq/irqdomain.c
+@@ -1,5 +1,6 @@
+ #define pr_fmt(fmt) "irq: " fmt
+
++#include <linux/acpi.h>
+ #include <linux/debugfs.h>
+ #include <linux/hardirq.h>
+ #include <linux/interrupt.h>
+@@ -187,10 +188,11 @@ struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
+ EXPORT_SYMBOL_GPL(irq_domain_add_legacy);
+
+ /**
+- * irq_find_host() - Locates a domain for a given device node
+- * @node: device-tree node of the interrupt controller
++ * irq_find_domain() - Locates a domain for a given a refence pointer
++ * @type: specify irq domain reference pointer type to be match
++ * @ref: pointer to the reference data structure to be matched
+ */
+-struct irq_domain *irq_find_host(struct device_node *node)
++struct irq_domain *irq_find_domain(enum irq_domain_ref_type type, void *ref)
+ {
+ struct irq_domain *h, *found = NULL;
+ int rc;
+@@ -202,10 +204,16 @@ struct irq_domain *irq_find_host(struct device_node *node)
+ */
+ mutex_lock(&irq_domain_mutex);
+ list_for_each_entry(h, &irq_domain_list, link) {
+- if (h->ops->match)
+- rc = h->ops->match(h, node);
+- else
+- rc = (h->of_node != NULL) && (h->of_node == node);
++ if (h->ops->match) {
++ rc = h->ops->match(h, type, ref);
++ } else if (type == IRQ_DOMAIN_REF_OF_DEV_NODE ||
++ type == IRQ_DOMAIN_REF_ACPI_MSI_FRAME) {
++ /* Here, we just need to compare reference pointer */
++ rc = (h->of_node != NULL) && (h->of_node == ref);
++ } else {
++ /* For non-DT and non-ACPI reference, must specify match */
++ BUG();
++ }
+
+ if (rc) {
+ found = h;
+@@ -215,6 +223,16 @@ struct irq_domain *irq_find_host(struct device_node *node)
+ mutex_unlock(&irq_domain_mutex);
+ return found;
+ }
++EXPORT_SYMBOL_GPL(irq_find_domain);
++
++/**
++ * irq_find_host() - Locates a domain for a given device node
++ * @node: device-tree node of the interrupt controller
++ */
++struct irq_domain *irq_find_host(struct device_node *node)
++{
++ return irq_find_domain(IRQ_DOMAIN_REF_OF_DEV_NODE, node);
++}
+ EXPORT_SYMBOL_GPL(irq_find_host);
+
+ /**
+@@ -464,12 +482,16 @@ int irq_create_strict_mappings(struct irq_domain *domain, unsigned int irq_base,
+ }
+ EXPORT_SYMBOL_GPL(irq_create_strict_mappings);
+
++//SURAVEE: HACK
++#include <linux/irqchip/arm-gic.h>
++
+ unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data)
+ {
+ struct irq_domain *domain;
+ irq_hw_number_t hwirq;
+ unsigned int type = IRQ_TYPE_NONE;
+ int virq;
++ struct gic_irq_alloc_info info;
+
+ domain = irq_data->np ? irq_find_host(irq_data->np) : irq_default_domain;
+ if (!domain) {
+@@ -496,7 +518,13 @@ unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data)
+ if (virq)
+ return virq;
+
+- virq = irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, irq_data);
++//SURAVEE: TODO: Need to make this as part of irqdomain ops
++ if (gic_init_irq_alloc_info(irq_data->args[0], irq_data->args[1],
++ irq_data->args[2], irq_data->np,
++ &info))
++ return 0;
++
++ virq = irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, &info);
+ if (virq <= 0)
+ return 0;
+ } else {
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-7-styx-linux-tracking.git-f9a9d954f23b967cd26338afda9a0a96afe62c25.patch b/meta-seattle/recipes-kernel/linux/files/412-7-styx-linux-tracking.git-f9a9d954f23b967cd26338afda9a0a96afe62c25.patch
new file mode 100644
index 00000000..7e3514e8
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-7-styx-linux-tracking.git-f9a9d954f23b967cd26338afda9a0a96afe62c25.patch
@@ -0,0 +1,422 @@
+From 6082a087207706d5951768d2d48aaa2d21fc2c0d Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Tue, 11 Aug 2015 15:09:19 +0200
+Subject: [PATCH] DO NOT UPSTREAM YET: Introducing ACPI support for GICv2m
+
+From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
+Date: Tue, 20 Jan 2015 23:21:20 -0600
+
+Upstream-Status: Pending
+
+Ported from 3.19 kernel, patch provided by AMD.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/irqchip/irq-gic-v2m.c | 193 ++++++++++++++++++++++++++---------
+ drivers/pci/pci-acpi.c | 55 ++++++----
+ include/linux/irqchip/arm-gic-acpi.h | 1 +
+ include/linux/pci-acpi.h | 3 +
+ 4 files changed, 185 insertions(+), 67 deletions(-)
+
+diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
+index fdf7065..c32eb55 100644
+--- a/drivers/irqchip/irq-gic-v2m.c
++++ b/drivers/irqchip/irq-gic-v2m.c
+@@ -15,6 +15,7 @@
+
+ #define pr_fmt(fmt) "GICv2m: " fmt
+
++#include <linux/acpi.h>
+ #include <linux/irq.h>
+ #include <linux/irqdomain.h>
+ #include <linux/kernel.h>
+@@ -22,6 +23,7 @@
+ #include <linux/of_pci.h>
+ #include <linux/slab.h>
+ #include <linux/spinlock.h>
++#include <linux/irqchip/arm-gic.h>
+
+ /*
+ * MSI_TYPER:
+@@ -45,7 +47,6 @@
+
+ struct v2m_data {
+ spinlock_t msi_cnt_lock;
+- struct msi_controller mchip;
+ struct resource res; /* GICv2m resource */
+ void __iomem *base; /* GICv2m virt address */
+ u32 spi_start; /* The SPI number that MSIs start */
+@@ -115,17 +116,17 @@ static int gicv2m_irq_gic_domain_alloc(struct irq_domain *domain,
+ unsigned int virq,
+ irq_hw_number_t hwirq)
+ {
+- struct of_phandle_args args;
++ struct gic_irq_alloc_info info;
+ struct irq_data *d;
+ int err;
+
+- args.np = domain->parent->of_node;
+- args.args_count = 3;
+- args.args[0] = 0;
+- args.args[1] = hwirq - 32;
+- args.args[2] = IRQ_TYPE_EDGE_RISING;
++ err = gic_init_irq_alloc_info(GIC_INT_TYPE_NONE, hwirq,
++ IRQ_TYPE_EDGE_RISING,
++ domain->parent->of_node, &info);
++ if (err)
++ return err;
+
+- err = irq_domain_alloc_irqs_parent(domain, virq, 1, &args);
++ err = irq_domain_alloc_irqs_parent(domain, virq, 1, &info);
+ if (err)
+ return err;
+
+@@ -192,7 +193,7 @@ static void gicv2m_irq_domain_free(struct irq_domain *domain,
+ irq_domain_free_irqs_parent(domain, virq, nr_irqs);
+ }
+
+-static const struct irq_domain_ops gicv2m_domain_ops = {
++static struct irq_domain_ops gicv2m_domain_ops = {
+ .alloc = gicv2m_irq_domain_alloc,
+ .free = gicv2m_irq_domain_free,
+ };
+@@ -213,11 +214,18 @@ static bool is_msi_spi_valid(u32 base, u32 num)
+ return true;
+ }
+
+-static int __init gicv2m_init_one(struct device_node *node,
+- struct irq_domain *parent)
++char gicv2m_msi_domain_name[] = "V2M-MSI";
++char gicv2m_domain_name[] = "GICV2M";
++
++static int __init gicv2m_init_one(struct irq_domain *parent,
++ u32 *spi_start, u32 *nr_spis,
++ struct resource *res,
++ enum irq_domain_ref_type type,
++ void *ref)
+ {
+ int ret;
+ struct v2m_data *v2m;
++ struct irq_domain *inner_domain;
+
+ v2m = kzalloc(sizeof(struct v2m_data), GFP_KERNEL);
+ if (!v2m) {
+@@ -225,23 +233,17 @@ static int __init gicv2m_init_one(struct device_node *node,
+ return -ENOMEM;
+ }
+
+- ret = of_address_to_resource(node, 0, &v2m->res);
+- if (ret) {
+- pr_err("Failed to allocate v2m resource.\n");
+- goto err_free_v2m;
+- }
+-
+- v2m->base = ioremap(v2m->res.start, resource_size(&v2m->res));
++ v2m->base = ioremap(res->start, resource_size(res));
+ if (!v2m->base) {
+ pr_err("Failed to map GICv2m resource\n");
+ ret = -ENOMEM;
+ goto err_free_v2m;
+ }
++ memcpy(&v2m->res,res, sizeof(struct resource));
+
+- if (!of_property_read_u32(node, "arm,msi-base-spi", &v2m->spi_start) &&
+- !of_property_read_u32(node, "arm,msi-num-spis", &v2m->nr_spis)) {
+- pr_info("Overriding V2M MSI_TYPER (base:%u, num:%u)\n",
+- v2m->spi_start, v2m->nr_spis);
++ if (*spi_start && *nr_spis) {
++ v2m->spi_start = *spi_start;
++ v2m->nr_spis = *nr_spis;
+ } else {
+ u32 typer = readl_relaxed(v2m->base + V2M_MSI_TYPER);
+
+@@ -261,43 +263,50 @@ static int __init gicv2m_init_one(struct device_node *node,
+ goto err_iounmap;
+ }
+
+- v2m->domain = irq_domain_add_tree(NULL, &gicv2m_domain_ops, v2m);
+- if (!v2m->domain) {
++ inner_domain = irq_domain_add_tree(node, &gicv2m_domain_ops, v2m);
++ if (!inner_domain) {
+ pr_err("Failed to create GICv2m domain\n");
+ ret = -ENOMEM;
+ goto err_free_bm;
+ }
+
+- v2m->domain->parent = parent;
+- v2m->mchip.of_node = node;
+- v2m->mchip.domain = pci_msi_create_irq_domain(node,
+- &gicv2m_msi_domain_info,
+- v2m->domain);
+- if (!v2m->mchip.domain) {
+- pr_err("Failed to create MSI domain\n");
+- ret = -ENOMEM;
+- goto err_free_domains;
+- }
+-
+- spin_lock_init(&v2m->msi_cnt_lock);
+-
+- ret = of_pci_msi_chip_add(&v2m->mchip);
+- if (ret) {
+- pr_err("Failed to add msi_chip.\n");
+- goto err_free_domains;
+- }
+-
+- pr_info("Node %s: range[%#lx:%#lx], SPI[%d:%d]\n", node->name,
+- (unsigned long)v2m->res.start, (unsigned long)v2m->res.end,
+- v2m->spi_start, (v2m->spi_start + v2m->nr_spis));
++ inner_domain->bus_token = DOMAIN_BUS_PLATFORM_MSI;
++ inner_domain->name = gicv2m_domain_name;
++
++ ret = -ENOMEM;
++ if (type == IRQ_DOMAIN_REF_OF_DEV_NODE) {
++ v2m->domain = pci_msi_create_irq_domain(
++ (struct device_node *)ref,
++ &gicv2m_msi_domain_info,
++ inner_domain);
++ if (!v2m->domain) {
++ pr_err("Failed to create MSI domain\n");
++ goto err_free_domains;
++ }
++ } else {
++ v2m->domain = pci_msi_create_irq_domain( NULL,
++ &gicv2m_msi_domain_info,
++ inner_domain);
++ if (!v2m->domain) {
++ pr_err("Failed to create MSI domain\n");
++ goto err_free_domains;
++ }
++
++ v2m->domain->type = type;
++ v2m->domain->acpi_ref = ref;
++ }
++
++ v2m->domain->name = gicv2m_msi_domain_name;
++
++ spin_lock_init(&v2m->msi_cnt_lock);
+
+ return 0;
+
+ err_free_domains:
+- if (v2m->mchip.domain)
+- irq_domain_remove(v2m->mchip.domain);
+ if (v2m->domain)
+ irq_domain_remove(v2m->domain);
++ if (inner_domain)
++ irq_domain_remove(inner_domain);
+ err_free_bm:
+ kfree(v2m->bm);
+ err_iounmap:
+@@ -319,15 +328,101 @@ int __init gicv2m_of_init(struct device_node *node, struct irq_domain *parent)
+
+ for (child = of_find_matching_node(node, gicv2m_device_id); child;
+ child = of_find_matching_node(child, gicv2m_device_id)) {
++ u32 spi_start = 0, nr_spis = 0;
++ struct resource res;
++
+ if (!of_find_property(child, "msi-controller", NULL))
+ continue;
+
+- ret = gicv2m_init_one(child, parent);
++ ret = of_address_to_resource(child, 0, &res);
++ if (ret) {
++ pr_err("Failed to allocate v2m resource.\n");
++ break;
++ }
++
++ if (!of_property_read_u32(child, "arm,msi-base-spi", &spi_start) &&
++ !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis))
++ pr_info("Overriding V2M MSI_TYPER (base:%u, num:%u)\n",
++ spi_start, nr_spis);
++
++ ret = gicv2m_init_one(parent, &spi_start, &nr_spis, &res,
++ IRQ_DOMAIN_REF_OF_DEV_NODE, child);
++
+ if (ret) {
+ of_node_put(node);
+ break;
+ }
++ pr_info("Node %s: range[%#lx:%#lx], SPI[%d:%d]\n", child->name,
++ (unsigned long)res.start, (unsigned long)res.end,
++ spi_start, (spi_start + nr_spis));
+ }
+
+ return ret;
+ }
++
++#ifdef CONFIG_ACPI
++static struct acpi_madt_generic_msi_frame *msi_frame;
++
++static int __init
++gicv2m_acpi_parse_madt_msi(struct acpi_subtable_header *header,
++ const unsigned long end)
++{
++ struct acpi_madt_generic_msi_frame *frame;
++
++ frame = (struct acpi_madt_generic_msi_frame *)header;
++ if (BAD_MADT_ENTRY(frame, end))
++ return -EINVAL;
++
++ if (msi_frame)
++ pr_warn("Only one GIC MSI FRAME supported.\n");
++ else
++ msi_frame = frame;
++
++ return 0;
++}
++
++int __init gicv2m_acpi_init(struct acpi_table_header *table,
++ struct irq_domain *parent)
++{
++ int ret = 0;
++ int count, i;
++ struct acpi_madt_generic_msi_frame *cur;
++
++ count = acpi_parse_entries(ACPI_SIG_MADT, sizeof(struct acpi_table_madt),
++ gicv2m_acpi_parse_madt_msi, table,
++ ACPI_MADT_TYPE_GENERIC_MSI_FRAME, 0);
++
++ if ((count <= 0) || !msi_frame) {
++ pr_debug("No valid ACPI GIC MSI FRAME exist\n");
++ return 0;
++ }
++
++ for (i = 0, cur = msi_frame; i < count; i++, cur++) {
++ struct resource res;
++ u32 spi_start = 0, nr_spis = 0;
++
++ res.start = cur->base_address;
++ res.end = cur->base_address + 0x1000;
++
++ if (cur->flags & ACPI_MADT_OVERRIDE_SPI_VALUES) {
++ spi_start = cur->spi_base;
++ nr_spis = cur->spi_count;
++
++ pr_info("ACPI overriding V2M MSI_TYPER (base:%u, num:%u)\n",
++ spi_start, nr_spis);
++ }
++
++ ret = gicv2m_init_one(parent, &spi_start, &nr_spis, &res,
++ IRQ_DOMAIN_REF_ACPI_MSI_FRAME, msi_frame);
++ if (ret)
++ break;
++
++ pr_info("MSI frame ID %u: range[%#lx:%#lx], SPI[%d:%d]\n",
++ cur->msi_frame_id,
++ (unsigned long)res.start, (unsigned long)res.end,
++ spi_start, (spi_start + nr_spis));
++ }
++ return ret;
++}
++
++#endif /* CONFIG_ACPI */
+diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
+index fe42097..fa0d8ec 100644
+--- a/drivers/pci/pci-acpi.c
++++ b/drivers/pci/pci-acpi.c
+@@ -9,6 +9,7 @@
+
+ #include <linux/delay.h>
+ #include <linux/init.h>
++#include <linux/irqdomain.h>
+ #include <linux/pci.h>
+ #include <linux/pci_hotplug.h>
+ #include <linux/module.h>
+@@ -717,25 +718,43 @@ static int __init acpi_pci_init(void)
+ arch_initcall(acpi_pci_init);
+
+ #ifdef CONFIG_PCI_MSI
+-void pci_acpi_set_phb_msi_domain(struct pci_bus *bus) {
++static struct acpi_madt_generic_msi_frame *msi_frame;
++static int
++pci_acpi_parse_madt_msi(struct acpi_subtable_header *header,
++ const unsigned long end)
++{
++ struct acpi_madt_generic_msi_frame *frame;
++ frame = (struct acpi_madt_generic_msi_frame *)header;
++ if (BAD_MADT_ENTRY(frame, end))
++ return -EINVAL;
++
++ /* We currently support one MSI frame only */
++ if (!msi_frame)
++ msi_frame = frame;
++
++ return 0;
++}
++
++void pci_acpi_set_phb_msi_domain(struct pci_bus *bus)
++{
++ int count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_MSI_FRAME,
++ pci_acpi_parse_madt_msi, 0);
++ if (count > 0) {
+ #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
+- u32 msi_frame_id = 0;
+- int num;
+-
+- if (acpi_disabled)
+- return;
+-
+- /**
+- * Since ACPI 5.1 currently does not define
+- * a way to associate MSI frame ID to a device,
+- * we can only support single MSI frame at the moment.
+- * Therefore, the id 0 is used as a default.
+- */
+- num = msi_get_num_irq_domain();
+- if (num <= 0 || num > 1)
+- return;
+-
+- dev_set_msi_domain(&bus->dev, irq_find_acpi_msi_domain(msi_frame_id));
++ struct irq_domain *domain;
++ /**
++ * Since ACPI 5.1 currently does not define
++ * a way to associate MSI frame ID to a device,
++ * we can only support single MSI frame at the moment.
++ */
++ domain = irq_find_domain(IRQ_DOMAIN_REF_ACPI_MSI_FRAME, msi_frame);
++ if (!domain) {
++ pr_debug("Fail to find domain for MSI\n");
++ return;
++ }
++
++ dev_set_msi_domain(&bus->dev, domain);
+ #endif
++ }
+ }
+ #endif /* CONFIG_PCI_MSI */
+diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h
+index fa8033b..b02f065 100644
+--- a/include/linux/irqchip/arm-gic-acpi.h
++++ b/include/linux/irqchip/arm-gic-acpi.h
+@@ -26,6 +26,7 @@ struct acpi_table_header;
+
+ void acpi_irq_init(void);
+ int gic_v2_acpi_init(struct acpi_table_header *table, struct irq_domain **domain);
++int gicv2m_acpi_init(struct acpi_table_header *table, struct irq_domain *parent);
+ #else
+ static inline void acpi_gic_init(void) { }
+ #endif
+diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
+index a965efa..759916d 100644
+--- a/include/linux/pci-acpi.h
++++ b/include/linux/pci-acpi.h
+@@ -77,6 +77,8 @@ static inline void acpiphp_remove_slots(struct pci_bus *bus) { }
+ static inline void acpiphp_check_host_bridge(struct acpi_device *adev) { }
+ #endif
+
++void pci_acpi_set_phb_msi_domain(struct pci_bus *bus);
++
+ extern const u8 pci_acpi_dsm_uuid[];
+ #define DEVICE_LABEL_DSM 0x07
+ #define RESET_DELAY_DSM 0x08
+@@ -85,6 +87,7 @@ extern const u8 pci_acpi_dsm_uuid[];
+ #else /* CONFIG_ACPI */
+ static inline void acpi_pci_add_bus(struct pci_bus *bus) { }
+ static inline void acpi_pci_remove_bus(struct pci_bus *bus) { }
++static inline void pci_acpi_set_phb_msi_domain(struct pci_bus *bus) { };
+ #endif /* CONFIG_ACPI */
+
+ #ifdef CONFIG_ACPI_APEI
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/412-styx-Fix-build-issues-after-porting-PCI-patches-to-4.1.2-.patch b/meta-seattle/recipes-kernel/linux/files/412-styx-Fix-build-issues-after-porting-PCI-patches-to-4.1.2-.patch
new file mode 100644
index 00000000..d1127fa8
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/412-styx-Fix-build-issues-after-porting-PCI-patches-to-4.1.2-.patch
@@ -0,0 +1,110 @@
+From 8471812e8eee4a56562885cb5746d42587c5074a Mon Sep 17 00:00:00 2001
+From: Adrian Calianu <adrian.calianu@enea.com>
+Date: Thu, 13 Aug 2015 09:28:28 +0200
+Subject: [PATCH] Fix build issues after porting PCI patches to 4.1.2 kernel
+
+Upstream-Status: Inappropriate
+Since is just a patch that fix previous "styx" patchset.
+
+Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
+---
+ drivers/irqchip/irq-gic-v2m.c | 3 +--
+ drivers/pci/host/pci-host-generic.c | 9 ++++-----
+ include/linux/irqchip/arm-gic.h | 2 ++
+ include/linux/irqdomain.h | 1 -
+ include/linux/mod_devicetable.h | 1 +
+ 5 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
+index c32eb55..5b219f3 100644
+--- a/drivers/irqchip/irq-gic-v2m.c
++++ b/drivers/irqchip/irq-gic-v2m.c
+@@ -263,14 +263,13 @@ static int __init gicv2m_init_one(struct irq_domain *parent,
+ goto err_iounmap;
+ }
+
+- inner_domain = irq_domain_add_tree(node, &gicv2m_domain_ops, v2m);
++ inner_domain = irq_domain_add_tree(NULL, &gicv2m_domain_ops, v2m);
+ if (!inner_domain) {
+ pr_err("Failed to create GICv2m domain\n");
+ ret = -ENOMEM;
+ goto err_free_bm;
+ }
+
+- inner_domain->bus_token = DOMAIN_BUS_PLATFORM_MSI;
+ inner_domain->name = gicv2m_domain_name;
+
+ ret = -ENOMEM;
+diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c
+index 01931e8..a4780c7 100644
+--- a/drivers/pci/host/pci-host-generic.c
++++ b/drivers/pci/host/pci-host-generic.c
+@@ -102,10 +102,9 @@ MODULE_DEVICE_TABLE(of, gen_pci_of_match);
+
+ static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
+ {
+- struct pci_host_bridge_window *win;
++ struct resource_entry *win;
+
+- list_for_each_entry(win, &pci->resources, list)
+- /* Release only requested resources */
++ resource_list_for_each_entry(win, &pci->resources)
+ if (win->res->parent)
+ release_resource(win->res);
+
+@@ -231,12 +230,12 @@ struct pci_bus *gen_scan_root_bus(struct device *parent, int bus,
+ struct pci_ops *ops, void *sysdata,
+ struct list_head *resources)
+ {
+- struct pci_host_bridge_window *window;
++ struct resource_entry *window;
+ bool found = false;
+ struct pci_bus *b;
+ int max;
+
+- list_for_each_entry(window, resources, list)
++ resource_list_for_each_entry(window, resources)
+ if (window->res->flags & IORESOURCE_BUS) {
+ found = true;
+ break;
+diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
+index f490f26..8eaeac1 100644
+--- a/include/linux/irqchip/arm-gic.h
++++ b/include/linux/irqchip/arm-gic.h
+@@ -122,7 +122,9 @@ static inline void gic_init(unsigned int nr, int start,
+
+ int gicv2m_of_init(struct device_node *node, struct irq_domain *parent);
+
++/*
+ void gic_send_sgi(unsigned int cpu_id, unsigned int irq);
++*/
+ int gic_get_cpu_id(unsigned int cpu);
+ void gic_migrate_target(unsigned int new_cpu_id);
+ unsigned long gic_get_sgir_physaddr(void);
+diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
+index ddd6602..9964c3e 100644
+--- a/include/linux/irqdomain.h
++++ b/include/linux/irqdomain.h
+@@ -120,7 +120,6 @@ struct irq_domain {
+ unsigned int flags;
+
+ /* Optional data */
+- struct device_node *of_node;
+ enum irq_domain_ref_type type;
+ union {
+ struct device_node *of_node;
+diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
+index 8a958d1..8492ad7 100644
+--- a/include/linux/mod_devicetable.h
++++ b/include/linux/mod_devicetable.h
+@@ -190,6 +190,7 @@ struct css_device_id {
+ struct acpi_device_id {
+ __u8 id[ACPI_ID_LEN];
+ kernel_ulong_t driver_data;
++ __u32 cls;
+ };
+
+ #define PNP_ID_LEN 8
+--
+1.9.1
+
diff --git a/meta-seattle/recipes-kernel/linux/files/bigendian.cfg b/meta-seattle/recipes-kernel/linux/files/bigendian.cfg
new file mode 100644
index 00000000..c5cdc99a
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/bigendian.cfg
@@ -0,0 +1 @@
+CONFIG_CPU_BIG_ENDIAN=y
diff --git a/meta-seattle/recipes-kernel/linux/files/defconfig b/meta-seattle/recipes-kernel/linux/files/defconfig
new file mode 100644
index 00000000..ec3e3673
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/files/defconfig
@@ -0,0 +1,4874 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm64 4.1.2 Kernel Configuration
+#
+CONFIG_ARM64=y
+CONFIG_64BIT=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_MMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_HAVE_GENERIC_RCU_GUP=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_SWIOTLB=y
+CONFIG_IOMMU_HELPER=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_PGTABLE_LEVELS=4
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+
+#
+# General setup
+#
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+# CONFIG_COMPILE_TEST is not set
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_DEFAULT_HOSTNAME="hierofalcon"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_FHANDLE=y
+# CONFIG_USELIB is not set
+CONFIG_AUDIT=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_AUDITSYSCALL=y
+CONFIG_AUDIT_WATCH=y
+CONFIG_AUDIT_TREE=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+CONFIG_SPARSE_IRQ=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ_COMMON=y
+# CONFIG_HZ_PERIODIC is not set
+CONFIG_NO_HZ_IDLE=y
+# CONFIG_NO_HZ_FULL is not set
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+CONFIG_SRCU=y
+# CONFIG_TASKS_RCU is not set
+CONFIG_RCU_STALL_COMMON=y
+# CONFIG_RCU_USER_QS is not set
+CONFIG_RCU_FANOUT=64
+CONFIG_RCU_FANOUT_LEAF=16
+# CONFIG_RCU_FANOUT_EXACT is not set
+CONFIG_RCU_FAST_NO_HZ=y
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_RCU_KTHREAD_PRIO=0
+CONFIG_RCU_NOCB_CPU=y
+# CONFIG_RCU_NOCB_CPU_NONE is not set
+# CONFIG_RCU_NOCB_CPU_ZERO is not set
+CONFIG_RCU_NOCB_CPU_ALL=y
+# CONFIG_RCU_EXPEDITE_BOOT is not set
+CONFIG_BUILD_BIN2C=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_PAGE_COUNTER=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_MEMCG_SWAP_ENABLED=y
+CONFIG_MEMCG_KMEM=y
+# CONFIG_CGROUP_HUGETLB is not set
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_CGROUP=y
+# CONFIG_DEBUG_BLK_CGROUP is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_RD_LZ4=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_HAVE_UID16=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_BPF=y
+CONFIG_EXPERT=y
+# CONFIG_UPTIME_LIMITED_KERNEL is not set
+CONFIG_UID16=y
+CONFIG_MULTIUSER=y
+# CONFIG_SGETMASK_SYSCALL is not set
+CONFIG_SYSFS_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+# CONFIG_BPF_SYSCALL is not set
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_ADVISE_SYSCALLS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLUB_CPU_PARTIAL=y
+# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_UPROBES is not set
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_RCU_TABLE_FREE=y
+CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
+CONFIG_HAVE_CMPXCHG_DOUBLE=y
+CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+# CONFIG_CC_STACKPROTECTOR is not set
+CONFIG_CC_STACKPROTECTOR_NONE=y
+# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
+# CONFIG_CC_STACKPROTECTOR_STRONG is not set
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_COMPAT_OLD_SIGACTION=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_MODULE_SIG is not set
+# CONFIG_MODULE_COMPRESS is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_BSGLIB=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_THROTTLING=y
+# CONFIG_BLK_CMDLINE_PARSER is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+CONFIG_AIX_PARTITION=y
+CONFIG_OSF_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_LDM_PARTITION=y
+# CONFIG_LDM_DEBUG is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+CONFIG_SUN_PARTITION=y
+CONFIG_KARMA_PARTITION=y
+CONFIG_EFI_PARTITION=y
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_CMDLINE_PARTITION is not set
+CONFIG_BLOCK_COMPAT=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_CFQ_GROUP_IOSCHED=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_PREEMPT_NOTIFIERS=y
+CONFIG_PADATA=y
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+CONFIG_INLINE_READ_UNLOCK=y
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+CONFIG_INLINE_WRITE_UNLOCK=y
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_FREEZER=y
+
+#
+# Platform selection
+#
+# CONFIG_ARCH_EXYNOS7 is not set
+# CONFIG_ARCH_FSL_LS2085A is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_QCOM is not set
+CONFIG_ARCH_SEATTLE=y
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_SPRD is not set
+# CONFIG_ARCH_THUNDER is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_XGENE is not set
+# CONFIG_ARCH_ZYNQMP is not set
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MSI_IRQ_DOMAIN=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
+CONFIG_PCI_STUB=y
+CONFIG_PCI_ATS=y
+CONFIG_PCI_IOV=y
+CONFIG_PCI_PRI=y
+CONFIG_PCI_PASID=y
+CONFIG_PCI_LABEL=y
+
+#
+# PCI host controller drivers
+#
+CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_PCIEAER=y
+CONFIG_PCIE_ECRC=y
+CONFIG_PCIEAER_INJECT=m
+CONFIG_PCIEASPM=y
+# CONFIG_PCIEASPM_DEBUG is not set
+CONFIG_PCIEASPM_DEFAULT=y
+# CONFIG_PCIEASPM_POWERSAVE is not set
+# CONFIG_PCIEASPM_PERFORMANCE is not set
+CONFIG_PCIE_PME=y
+CONFIG_HOTPLUG_PCI=y
+# CONFIG_HOTPLUG_PCI_CPCI is not set
+# CONFIG_HOTPLUG_PCI_SHPC is not set
+
+#
+# Kernel Features
+#
+
+#
+# ARM errata workarounds via the alternatives framework
+#
+CONFIG_ARM64_ERRATUM_826319=y
+CONFIG_ARM64_ERRATUM_827319=y
+CONFIG_ARM64_ERRATUM_824069=y
+CONFIG_ARM64_ERRATUM_819472=y
+CONFIG_ARM64_ERRATUM_832075=y
+CONFIG_ARM64_ERRATUM_845719=y
+CONFIG_ARM64_4K_PAGES=y
+# CONFIG_ARM64_64K_PAGES is not set
+# CONFIG_ARM64_VA_BITS_39 is not set
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_ARM64_VA_BITS=48
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SMP=y
+CONFIG_SCHED_MC=y
+CONFIG_SCHED_SMT=y
+CONFIG_NR_CPUS=8
+CONFIG_HOTPLUG_CPU=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_NO_BOOTMEM=y
+CONFIG_MEMORY_ISOLATION=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MEMORY_BALLOON=y
+CONFIG_BALLOON_COMPACTION=y
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_NEED_BOUNCE_POOL=y
+CONFIG_MMU_NOTIFIER=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+CONFIG_CLEANCACHE=y
+CONFIG_FRONTSWAP=y
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+# CONFIG_CMA_DEBUGFS is not set
+CONFIG_CMA_AREAS=7
+CONFIG_ZSWAP=y
+CONFIG_ZPOOL=y
+# CONFIG_ZBUD is not set
+CONFIG_ZSMALLOC=y
+# CONFIG_PGTABLE_MAPPING is not set
+# CONFIG_ZSMALLOC_STAT is not set
+CONFIG_GENERIC_EARLY_IOREMAP=y
+# CONFIG_SECCOMP is not set
+# CONFIG_XEN is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_ARMV8_DEPRECATED is not set
+
+#
+# Boot options
+#
+CONFIG_CMDLINE=" debug"
+# CONFIG_CMDLINE_FORCE is not set
+CONFIG_EFI_STUB=y
+CONFIG_EFI=y
+CONFIG_DMI=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_COMPAT_BINFMT_ELF=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_BINFMT_SCRIPT=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=m
+CONFIG_COREDUMP=y
+CONFIG_COMPAT=y
+CONFIG_SYSVIPC_COMPAT=y
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_WAKELOCKS is not set
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_ADVANCED_DEBUG=y
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_DPM_WATCHDOG is not set
+CONFIG_PM_CLK=y
+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_CPU_PM=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Idle
+#
+# CONFIG_CPU_IDLE is not set
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+CONFIG_CPU_FREQ_STAT=m
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+
+#
+# CPU frequency scaling drivers
+#
+# CONFIG_CPUFREQ_DT is not set
+# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
+CONFIG_NET=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_DIAG=m
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=m
+CONFIG_XFRM=y
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_SUB_POLICY=y
+CONFIG_XFRM_MIGRATE=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_XFRM_IPCOMP=m
+CONFIG_NET_KEY=m
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_FIB_TRIE_STATS=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_ROUTE_CLASSID=y
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE_DEMUX=m
+CONFIG_NET_IP_TUNNEL=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=m
+CONFIG_NET_UDP_TUNNEL=m
+# CONFIG_NET_FOU is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+# CONFIG_GENEVE is not set
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=m
+CONFIG_INET_TCP_DIAG=m
+CONFIG_INET_UDP_DIAG=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=m
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_WESTWOOD=m
+CONFIG_TCP_CONG_HTCP=m
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_CONG_ILLINOIS=m
+# CONFIG_TCP_CONG_DCTCP is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_TCP_MD5SIG=y
+CONFIG_IPV6=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=y
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_IPV6_VTI=m
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_SIT_6RD=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_GRE is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IPV6_PIMSM_V2=y
+CONFIG_NETLABEL=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NET_PTP_CLASSIFY=y
+CONFIG_NETWORK_PHY_TIMESTAMPING=y
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=m
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_ACCT=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_LOG_COMMON=m
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_ZONES=y
+CONFIG_NF_CONNTRACK_PROCFS=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
+CONFIG_NF_CONNTRACK_TIMESTAMP=y
+CONFIG_NF_CONNTRACK_LABELS=y
+CONFIG_NF_CT_PROTO_DCCP=m
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_BROADCAST=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_SNMP=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
+CONFIG_NF_CT_NETLINK_HELPER=m
+CONFIG_NETFILTER_NETLINK_QUEUE_CT=y
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_NF_NAT_PROTO_DCCP=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_REDIRECT=m
+CONFIG_NETFILTER_SYNPROXY=m
+CONFIG_NF_TABLES=m
+CONFIG_NF_TABLES_INET=m
+CONFIG_NFT_EXTHDR=m
+CONFIG_NFT_META=m
+CONFIG_NFT_CT=m
+CONFIG_NFT_RBTREE=m
+CONFIG_NFT_HASH=m
+CONFIG_NFT_COUNTER=m
+CONFIG_NFT_LOG=m
+CONFIG_NFT_LIMIT=m
+# CONFIG_NFT_MASQ is not set
+# CONFIG_NFT_REDIR is not set
+CONFIG_NFT_NAT=m
+CONFIG_NFT_QUEUE=m
+CONFIG_NFT_REJECT=m
+CONFIG_NFT_REJECT_INET=m
+CONFIG_NFT_COMPAT=m
+CONFIG_NETFILTER_XTABLES=y
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=m
+CONFIG_NETFILTER_XT_CONNMARK=m
+CONFIG_NETFILTER_XT_SET=m
+
+#
+# Xtables targets
+#
+CONFIG_NETFILTER_XT_TARGET_AUDIT=m
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+CONFIG_NETFILTER_XT_TARGET_CT=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HL=m
+CONFIG_NETFILTER_XT_TARGET_HMARK=m
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_NAT=m
+CONFIG_NETFILTER_XT_TARGET_NETMAP=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_RATEEST=m
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
+CONFIG_NETFILTER_XT_TARGET_TEE=m
+CONFIG_NETFILTER_XT_TARGET_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
+
+#
+# Xtables matches
+#
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_BPF=m
+CONFIG_NETFILTER_XT_MATCH_CGROUP=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_CPU=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ECN=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_IPVS=m
+CONFIG_NETFILTER_XT_MATCH_L2TP=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_NFACCT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_IP_SET=m
+CONFIG_IP_SET_MAX=256
+CONFIG_IP_SET_BITMAP_IP=m
+CONFIG_IP_SET_BITMAP_IPMAC=m
+CONFIG_IP_SET_BITMAP_PORT=m
+CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
+CONFIG_IP_SET_HASH_IPPORT=m
+CONFIG_IP_SET_HASH_IPPORTIP=m
+CONFIG_IP_SET_HASH_IPPORTNET=m
+# CONFIG_IP_SET_HASH_MAC is not set
+CONFIG_IP_SET_HASH_NETPORTNET=m
+CONFIG_IP_SET_HASH_NET=m
+CONFIG_IP_SET_HASH_NETNET=m
+CONFIG_IP_SET_HASH_NETPORT=m
+CONFIG_IP_SET_HASH_NETIFACE=m
+CONFIG_IP_SET_LIST_SET=m
+CONFIG_IP_VS=m
+CONFIG_IP_VS_IPV6=y
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_AH_ESP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+CONFIG_IP_VS_PROTO_SCTP=y
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+# CONFIG_IP_VS_FO is not set
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+
+#
+# IPVS SH scheduler
+#
+CONFIG_IP_VS_SH_TAB_BITS=8
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
+CONFIG_IP_VS_NFCT=y
+CONFIG_IP_VS_PE_SIP=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
+CONFIG_NF_TABLES_IPV4=m
+CONFIG_NFT_CHAIN_ROUTE_IPV4=m
+CONFIG_NFT_REJECT_IPV4=m
+CONFIG_NF_TABLES_ARP=m
+CONFIG_NF_LOG_ARP=m
+CONFIG_NF_LOG_IPV4=m
+CONFIG_NF_REJECT_IPV4=y
+CONFIG_NF_NAT_IPV4=m
+CONFIG_NFT_CHAIN_NAT_IPV4=m
+CONFIG_NF_NAT_MASQUERADE_IPV4=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_RPFILTER=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_SYNPROXY=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_SECURITY=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV6=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_NF_TABLES_IPV6=m
+CONFIG_NFT_CHAIN_ROUTE_IPV6=m
+CONFIG_NFT_REJECT_IPV6=m
+CONFIG_NF_REJECT_IPV6=m
+CONFIG_NF_LOG_IPV6=m
+CONFIG_NF_NAT_IPV6=m
+CONFIG_NFT_CHAIN_NAT_IPV6=m
+CONFIG_NF_NAT_MASQUERADE_IPV6=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_RPFILTER=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_TARGET_SYNPROXY=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_RAW=m
+CONFIG_IP6_NF_SECURITY=m
+CONFIG_IP6_NF_NAT=m
+CONFIG_IP6_NF_TARGET_MASQUERADE=m
+# CONFIG_IP6_NF_TARGET_NPT is not set
+CONFIG_NF_TABLES_BRIDGE=m
+CONFIG_NFT_BRIDGE_META=m
+CONFIG_NFT_BRIDGE_REJECT=m
+CONFIG_NF_LOG_BRIDGE=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_IP6=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_NFLOG=m
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set
+CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y
+# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set
+CONFIG_SCTP_COOKIE_HMAC_MD5=y
+CONFIG_SCTP_COOKIE_HMAC_SHA1=y
+# CONFIG_RDS is not set
+CONFIG_TIPC=m
+CONFIG_TIPC_MEDIA_UDP=y
+CONFIG_ATM=m
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_LANE=m
+# CONFIG_ATM_MPOA is not set
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_L2TP=m
+CONFIG_L2TP_DEBUGFS=m
+CONFIG_L2TP_V3=y
+CONFIG_L2TP_IP=m
+CONFIG_L2TP_ETH=m
+CONFIG_STP=m
+CONFIG_GARP=m
+CONFIG_MRP=m
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLAN_8021Q_MVRP=y
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+CONFIG_6LOWPAN=m
+CONFIG_6LOWPAN_NHC=m
+CONFIG_6LOWPAN_NHC_DEST=m
+CONFIG_6LOWPAN_NHC_FRAGMENT=m
+CONFIG_6LOWPAN_NHC_HOP=m
+CONFIG_6LOWPAN_NHC_IPV6=m
+CONFIG_6LOWPAN_NHC_MOBILITY=m
+CONFIG_6LOWPAN_NHC_ROUTING=m
+CONFIG_6LOWPAN_NHC_UDP=m
+CONFIG_IEEE802154=m
+CONFIG_IEEE802154_SOCKET=m
+CONFIG_IEEE802154_6LOWPAN=m
+CONFIG_MAC802154=m
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFB=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_DRR=m
+CONFIG_NET_SCH_MQPRIO=m
+CONFIG_NET_SCH_CHOKE=m
+CONFIG_NET_SCH_QFQ=m
+CONFIG_NET_SCH_CODEL=m
+CONFIG_NET_SCH_FQ_CODEL=m
+CONFIG_NET_SCH_FQ=m
+CONFIG_NET_SCH_HHF=m
+CONFIG_NET_SCH_PIE=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_SCH_PLUG=m
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_CLS_U32_PERF=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_FLOW=m
+CONFIG_NET_CLS_CGROUP=y
+CONFIG_NET_CLS_BPF=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_IPSET=m
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_GACT=m
+CONFIG_GACT_PROB=y
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_IPT=m
+CONFIG_NET_ACT_NAT=m
+CONFIG_NET_ACT_PEDIT=m
+CONFIG_NET_ACT_SIMP=m
+CONFIG_NET_ACT_SKBEDIT=m
+CONFIG_NET_ACT_CSUM=m
+# CONFIG_NET_ACT_VLAN is not set
+# CONFIG_NET_ACT_BPF is not set
+# CONFIG_NET_ACT_CONNMARK is not set
+CONFIG_NET_CLS_IND=y
+CONFIG_NET_SCH_FIFO=y
+CONFIG_DCB=y
+CONFIG_DNS_RESOLVER=y
+CONFIG_BATMAN_ADV=m
+CONFIG_BATMAN_ADV_BLA=y
+CONFIG_BATMAN_ADV_DAT=y
+CONFIG_BATMAN_ADV_NC=y
+CONFIG_BATMAN_ADV_MCAST=y
+# CONFIG_BATMAN_ADV_DEBUG is not set
+CONFIG_OPENVSWITCH=m
+CONFIG_OPENVSWITCH_GRE=m
+CONFIG_OPENVSWITCH_VXLAN=m
+CONFIG_VSOCKETS=m
+CONFIG_NETLINK_MMAP=y
+CONFIG_NETLINK_DIAG=m
+CONFIG_MPLS=y
+CONFIG_NET_MPLS_GSO=m
+# CONFIG_MPLS_ROUTING is not set
+# CONFIG_HSR is not set
+# CONFIG_NET_SWITCHDEV is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_CGROUP_NET_CLASSID=y
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_BQL=y
+# CONFIG_BPF_JIT is not set
+CONFIG_NET_FLOW_LIMIT=y
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+CONFIG_NET_DROP_MONITOR=y
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+CONFIG_IRDA=m
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+CONFIG_IRNET=m
+CONFIG_IRCOMM=m
+# CONFIG_IRDA_ULTRA is not set
+
+#
+# IrDA options
+#
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+CONFIG_IRDA_FAST_RR=y
+# CONFIG_IRDA_DEBUG is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+
+#
+# Dongle support
+#
+CONFIG_DONGLE=y
+CONFIG_ESI_DONGLE=m
+CONFIG_ACTISYS_DONGLE=m
+CONFIG_TEKRAM_DONGLE=m
+CONFIG_TOIM3232_DONGLE=m
+CONFIG_LITELINK_DONGLE=m
+CONFIG_MA600_DONGLE=m
+CONFIG_GIRBIL_DONGLE=m
+CONFIG_MCP2120_DONGLE=m
+CONFIG_OLD_BELKIN_DONGLE=m
+CONFIG_ACT200L_DONGLE=m
+CONFIG_KINGSUN_DONGLE=m
+CONFIG_KSDAZZLE_DONGLE=m
+CONFIG_KS959_DONGLE=m
+
+#
+# FIR device drivers
+#
+CONFIG_USB_IRDA=m
+CONFIG_SIGMATEL_FIR=m
+CONFIG_VLSI_FIR=m
+CONFIG_MCS_FIR=m
+CONFIG_BT=m
+CONFIG_BT_BREDR=y
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+CONFIG_BT_LE=y
+CONFIG_BT_6LOWPAN=m
+# CONFIG_BT_SELFTEST is not set
+CONFIG_BT_DEBUGFS=y
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_INTEL=m
+CONFIG_BT_BCM=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTUSB_BCM=y
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_ATH3K=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIUART_3WIRE=y
+# CONFIG_BT_HCIUART_INTEL is not set
+# CONFIG_BT_HCIUART_BCM is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+CONFIG_BT_ATH3K=m
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+CONFIG_CFG80211=m
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEBUGFS=y
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
+CONFIG_LIB80211=m
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=m
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+# CONFIG_MAC80211_RC_MINSTREL_VHT is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+CONFIG_MAC80211_MESH=y
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_MESSAGE_TRACING is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=m
+CONFIG_RFKILL_LEDS=y
+# CONFIG_RFKILL_INPUT is not set
+CONFIG_RFKILL_GPIO=m
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+# CONFIG_NET_9P_DEBUG is not set
+# CONFIG_CAIF is not set
+CONFIG_CEPH_LIB=m
+# CONFIG_CEPH_LIB_PRETTYDEBUG is not set
+# CONFIG_CEPH_LIB_USE_DNS_RESOLVER is not set
+CONFIG_NFC=m
+CONFIG_NFC_DIGITAL=m
+CONFIG_NFC_NCI=m
+CONFIG_NFC_HCI=m
+CONFIG_NFC_SHDLC=y
+
+#
+# Near Field Communication (NFC) devices
+#
+CONFIG_NFC_PN533=m
+CONFIG_NFC_SIM=m
+CONFIG_NFC_PORT100=m
+CONFIG_NFC_PN544=m
+CONFIG_NFC_PN544_I2C=m
+CONFIG_NFC_MICROREAD=m
+CONFIG_NFC_MICROREAD_I2C=m
+CONFIG_NFC_MRVL=m
+CONFIG_NFC_MRVL_USB=m
+CONFIG_NFC_ST21NFCA=m
+CONFIG_NFC_ST21NFCA_I2C=m
+# CONFIG_NFC_ST21NFCB is not set
+# CONFIG_NFC_NXP_NCI is not set
+CONFIG_HAVE_BPF_JIT=y
+
+#
+# Device Drivers
+#
+CONFIG_ARM_AMBA=y
+# CONFIG_TEGRA_AHB is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_UEVENT_HELPER is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
+CONFIG_WANT_DEV_COREDUMP=y
+CONFIG_ALLOW_DEV_COREDUMP=y
+CONFIG_DEV_COREDUMP=y
+# CONFIG_DEBUG_DRIVER is not set
+CONFIG_DEBUG_DEVRES=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=m
+CONFIG_REGMAP_MMIO=y
+CONFIG_DMA_SHARED_BUFFER=y
+# CONFIG_FENCE_TRACE is not set
+CONFIG_DMA_CMA=y
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+
+#
+# Bus devices
+#
+CONFIG_ARM_CCI=y
+CONFIG_ARM_CCI400_COMMON=y
+CONFIG_ARM_CCI400_PMU=y
+CONFIG_ARM_CCN=y
+CONFIG_VEXPRESS_CONFIG=y
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=m
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=m
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+# CONFIG_MTD_PARTITIONED_MASTER is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=m
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+CONFIG_MTD_PHYSMAP_OF=m
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOCG3 is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR & LPDDR2 PCM memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_SPI_NOR is not set
+CONFIG_MTD_UBI=m
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+# CONFIG_MTD_UBI_BLOCK is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+
+#
+# Device Tree and Open Firmware support
+#
+CONFIG_OF_UNITTEST=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_ADDRESS_PCI=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_OF_MTD=y
+CONFIG_OF_RESERVED_MEM=y
+CONFIG_OF_RESOLVE=y
+# CONFIG_OF_OVERLAY is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+CONFIG_BLK_DEV_NULL_BLK=m
+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
+CONFIG_ZRAM=m
+# CONFIG_ZRAM_LZ4_COMPRESS is not set
+# CONFIG_ZRAM_DEBUG is not set
+CONFIG_BLK_CPQ_CISS_DA=m
+CONFIG_CISS_SCSI_TAPE=y
+CONFIG_BLK_DEV_DAC960=m
+CONFIG_BLK_DEV_UMEM=m
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_DRBD=m
+# CONFIG_DRBD_FAULT_INJECTION is not set
+CONFIG_BLK_DEV_NBD=y
+CONFIG_BLK_DEV_NVME=m
+CONFIG_BLK_DEV_SKD=m
+CONFIG_BLK_DEV_OSD=m
+CONFIG_BLK_DEV_SX8=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=131070
+# CONFIG_BLK_DEV_PMEM is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+CONFIG_ATA_OVER_ETH=m
+CONFIG_VIRTIO_BLK=y
+CONFIG_BLK_DEV_RBD=m
+# CONFIG_BLK_DEV_RSXX is not set
+
+#
+# Misc devices
+#
+CONFIG_SENSORS_LIS3LV02D=m
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+CONFIG_TIFM_CORE=m
+CONFIG_TIFM_7XX1=m
+# CONFIG_ICS932S401 is not set
+CONFIG_ENCLOSURE_SERVICES=m
+# CONFIG_HP_ILO is not set
+CONFIG_APDS9802ALS=m
+CONFIG_ISL29003=m
+CONFIG_ISL29020=m
+CONFIG_SENSORS_TSL2550=m
+# CONFIG_SENSORS_BH1780 is not set
+CONFIG_SENSORS_BH1770=m
+CONFIG_SENSORS_APDS990X=m
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_BMP085_I2C is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_SRAM is not set
+CONFIG_VEXPRESS_SYSCFG=y
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_LEGACY=m
+CONFIG_EEPROM_MAX6875=m
+CONFIG_EEPROM_93CX6=m
+CONFIG_CB710_CORE=m
+# CONFIG_CB710_DEBUG is not set
+CONFIG_CB710_DEBUG_ASSUMPTIONS=y
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+CONFIG_SENSORS_LIS3_I2C=m
+
+#
+# Altera FPGA firmware download module
+#
+CONFIG_ALTERA_STAPL=m
+
+#
+# Intel MIC Bus Driver
+#
+
+#
+# Intel MIC Host Driver
+#
+
+#
+# Intel MIC Card Driver
+#
+# CONFIG_GENWQE is not set
+# CONFIG_ECHO is not set
+# CONFIG_CXL_BASE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+CONFIG_SCSI_NETLINK=y
+# CONFIG_SCSI_MQ_DEFAULT is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=m
+CONFIG_SCSI_ENCLOSURE=m
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=m
+CONFIG_SCSI_ISCSI_ATTRS=m
+CONFIG_SCSI_SAS_ATTRS=m
+CONFIG_SCSI_SAS_LIBSAS=m
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_SAS_HOST_SMP=y
+CONFIG_SCSI_SRP_ATTRS=m
+CONFIG_SCSI_LOWLEVEL=y
+CONFIG_ISCSI_TCP=m
+CONFIG_ISCSI_BOOT_SYSFS=m
+# CONFIG_SCSI_CXGB3_ISCSI is not set
+# CONFIG_SCSI_CXGB4_ISCSI is not set
+CONFIG_SCSI_BNX2_ISCSI=m
+CONFIG_SCSI_BNX2X_FCOE=m
+CONFIG_BE2ISCSI=m
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+CONFIG_SCSI_HPSA=m
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+CONFIG_SCSI_MVSAS=m
+# CONFIG_SCSI_MVSAS_DEBUG is not set
+CONFIG_SCSI_MVSAS_TASKLET=y
+CONFIG_SCSI_MVUMI=m
+CONFIG_SCSI_ARCMSR=m
+CONFIG_SCSI_ESAS2R=m
+CONFIG_MEGARAID_NEWGEN=y
+CONFIG_MEGARAID_MM=m
+CONFIG_MEGARAID_MAILBOX=m
+CONFIG_MEGARAID_LEGACY=m
+CONFIG_MEGARAID_SAS=m
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_MPT3SAS is not set
+CONFIG_SCSI_UFSHCD=m
+CONFIG_SCSI_UFSHCD_PCI=m
+# CONFIG_SCSI_UFSHCD_PLATFORM is not set
+CONFIG_SCSI_HPTIOP=m
+CONFIG_LIBFC=m
+CONFIG_LIBFCOE=m
+CONFIG_FCOE=m
+CONFIG_SCSI_DMX3191D=m
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+CONFIG_SCSI_INITIO=m
+CONFIG_SCSI_INIA100=m
+CONFIG_SCSI_STEX=m
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+CONFIG_SCSI_SYM53C8XX_MMIO=y
+CONFIG_SCSI_IPR=m
+CONFIG_SCSI_IPR_TRACE=y
+CONFIG_SCSI_IPR_DUMP=y
+CONFIG_SCSI_QLOGIC_1280=m
+CONFIG_SCSI_QLA_FC=m
+CONFIG_TCM_QLA2XXX=m
+CONFIG_SCSI_QLA_ISCSI=m
+CONFIG_SCSI_LPFC=m
+# CONFIG_SCSI_LPFC_DEBUG_FS is not set
+CONFIG_SCSI_DC395x=m
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_WD719X is not set
+CONFIG_SCSI_DEBUG=m
+CONFIG_SCSI_PMCRAID=m
+# CONFIG_SCSI_PM8001 is not set
+# CONFIG_SCSI_BFA_FC is not set
+CONFIG_SCSI_VIRTIO=m
+CONFIG_SCSI_CHELSIO_FCOE=m
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+CONFIG_SCSI_DH=y
+CONFIG_SCSI_DH_RDAC=m
+CONFIG_SCSI_DH_HP_SW=m
+CONFIG_SCSI_DH_EMC=m
+CONFIG_SCSI_DH_ALUA=m
+CONFIG_SCSI_OSD_INITIATOR=m
+CONFIG_SCSI_OSD_ULD=m
+CONFIG_SCSI_OSD_DPRINT_SENSE=1
+# CONFIG_SCSI_OSD_DEBUG is not set
+CONFIG_HAVE_PATA_PLATFORM=y
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+
+#
+# Controllers with non-SFF native interface
+#
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_XGENE=y
+CONFIG_SATA_INIC162X=m
+CONFIG_SATA_ACARD_AHCI=m
+CONFIG_SATA_SIL24=m
+CONFIG_ATA_SFF=y
+
+#
+# SFF controllers with custom DMA interface
+#
+CONFIG_PDC_ADMA=m
+CONFIG_SATA_QSTOR=m
+CONFIG_SATA_SX4=m
+CONFIG_ATA_BMDMA=y
+
+#
+# SATA SFF controllers with BMDMA
+#
+CONFIG_ATA_PIIX=y
+CONFIG_SATA_MV=m
+CONFIG_SATA_NV=m
+CONFIG_SATA_PROMISE=m
+CONFIG_SATA_SIL=m
+CONFIG_SATA_SIS=m
+CONFIG_SATA_SVW=m
+CONFIG_SATA_ULI=m
+CONFIG_SATA_VIA=m
+CONFIG_SATA_VITESSE=m
+
+#
+# PATA SFF controllers with BMDMA
+#
+CONFIG_PATA_ALI=m
+CONFIG_PATA_AMD=m
+CONFIG_PATA_ARTOP=m
+CONFIG_PATA_ATIIXP=m
+CONFIG_PATA_ATP867X=m
+CONFIG_PATA_CMD64X=m
+CONFIG_PATA_CYPRESS=m
+CONFIG_PATA_EFAR=m
+CONFIG_PATA_HPT366=m
+CONFIG_PATA_HPT37X=m
+CONFIG_PATA_HPT3X2N=m
+CONFIG_PATA_HPT3X3=m
+# CONFIG_PATA_HPT3X3_DMA is not set
+CONFIG_PATA_IT8213=m
+CONFIG_PATA_IT821X=m
+CONFIG_PATA_JMICRON=m
+CONFIG_PATA_MARVELL=m
+CONFIG_PATA_NETCELL=m
+CONFIG_PATA_NINJA32=m
+CONFIG_PATA_NS87415=m
+CONFIG_PATA_OLDPIIX=m
+CONFIG_PATA_OPTIDMA=m
+CONFIG_PATA_PDC2027X=m
+CONFIG_PATA_PDC_OLD=m
+# CONFIG_PATA_RADISYS is not set
+CONFIG_PATA_RDC=m
+CONFIG_PATA_SCH=m
+CONFIG_PATA_SERVERWORKS=m
+CONFIG_PATA_SIL680=m
+CONFIG_PATA_SIS=m
+CONFIG_PATA_TOSHIBA=m
+CONFIG_PATA_TRIFLEX=m
+CONFIG_PATA_VIA=m
+CONFIG_PATA_WINBOND=m
+
+#
+# PIO-only SFF controllers
+#
+CONFIG_PATA_CMD640_PCI=m
+CONFIG_PATA_MPIIX=m
+CONFIG_PATA_NS87410=m
+CONFIG_PATA_OPTI=m
+CONFIG_PATA_PLATFORM=y
+# CONFIG_PATA_OF_PLATFORM is not set
+# CONFIG_PATA_RZ1000 is not set
+
+#
+# Generic fallback / legacy drivers
+#
+CONFIG_ATA_GENERIC=y
+# CONFIG_PATA_LEGACY is not set
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID456=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+# CONFIG_MD_CLUSTER is not set
+CONFIG_BCACHE=m
+# CONFIG_BCACHE_DEBUG is not set
+# CONFIG_BCACHE_CLOSURES_DEBUG is not set
+CONFIG_BLK_DEV_DM_BUILTIN=y
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_MQ_DEFAULT is not set
+CONFIG_DM_DEBUG=y
+CONFIG_DM_BUFIO=y
+CONFIG_DM_BIO_PRISON=m
+CONFIG_DM_PERSISTENT_DATA=m
+# CONFIG_DM_DEBUG_BLOCK_STACK_TRACING is not set
+CONFIG_DM_CRYPT=m
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_THIN_PROVISIONING=m
+CONFIG_DM_CACHE=m
+CONFIG_DM_CACHE_MQ=m
+CONFIG_DM_CACHE_CLEANER=m
+# CONFIG_DM_ERA is not set
+CONFIG_DM_MIRROR=y
+CONFIG_DM_LOG_USERSPACE=m
+CONFIG_DM_RAID=m
+CONFIG_DM_ZERO=y
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_QL=m
+CONFIG_DM_MULTIPATH_ST=m
+CONFIG_DM_DELAY=m
+CONFIG_DM_UEVENT=y
+CONFIG_DM_FLAKEY=m
+CONFIG_DM_VERITY=m
+CONFIG_DM_SWITCH=m
+# CONFIG_DM_LOG_WRITES is not set
+CONFIG_TARGET_CORE=m
+CONFIG_TCM_IBLOCK=m
+CONFIG_TCM_FILEIO=m
+CONFIG_TCM_PSCSI=m
+# CONFIG_TCM_USER2 is not set
+CONFIG_LOOPBACK_TARGET=m
+CONFIG_TCM_FC=m
+CONFIG_ISCSI_TARGET=m
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+CONFIG_FIREWIRE_NOSY=m
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_NET_CORE=y
+CONFIG_BONDING=m
+CONFIG_DUMMY=m
+CONFIG_EQUALIZER=m
+CONFIG_NET_FC=y
+CONFIG_IFB=m
+CONFIG_NET_TEAM=m
+CONFIG_NET_TEAM_MODE_BROADCAST=m
+CONFIG_NET_TEAM_MODE_ROUNDROBIN=m
+CONFIG_NET_TEAM_MODE_RANDOM=m
+CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m
+CONFIG_NET_TEAM_MODE_LOADBALANCE=m
+CONFIG_MACVLAN=m
+CONFIG_MACVTAP=m
+# CONFIG_IPVLAN is not set
+CONFIG_VXLAN=m
+CONFIG_NETCONSOLE=m
+CONFIG_NETCONSOLE_DYNAMIC=y
+CONFIG_NETPOLL=y
+CONFIG_NET_POLL_CONTROLLER=y
+CONFIG_TUN=m
+CONFIG_VETH=m
+CONFIG_VIRTIO_NET=m
+CONFIG_NLMON=m
+# CONFIG_ARCNET is not set
+# CONFIG_ATM_DRIVERS is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+CONFIG_ETHERNET=y
+CONFIG_MDIO=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+CONFIG_NET_VENDOR_AGERE=y
+# CONFIG_ET131X is not set
+CONFIG_NET_VENDOR_ALTEON=y
+CONFIG_ACENIC=m
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+CONFIG_ALTERA_TSE=m
+CONFIG_NET_VENDOR_AMD=y
+CONFIG_AMD8111_ETH=m
+CONFIG_PCNET32=m
+CONFIG_AMD_XGBE=y
+CONFIG_AMD_XGBE_DCB=y
+CONFIG_NET_VENDOR_ARC=y
+CONFIG_ARC_EMAC_CORE=m
+CONFIG_ARC_EMAC=m
+CONFIG_NET_VENDOR_ATHEROS=y
+CONFIG_ATL2=m
+CONFIG_ATL1=m
+CONFIG_ATL1E=m
+CONFIG_ATL1C=m
+CONFIG_ALX=m
+CONFIG_NET_CADENCE=y
+# CONFIG_MACB is not set
+CONFIG_NET_VENDOR_BROADCOM=y
+CONFIG_B44=m
+CONFIG_B44_PCI_AUTOSELECT=y
+CONFIG_B44_PCICORE_AUTOSELECT=y
+CONFIG_B44_PCI=y
+CONFIG_BCMGENET=m
+CONFIG_BNX2=m
+CONFIG_CNIC=m
+CONFIG_TIGON3=m
+CONFIG_BNX2X=m
+CONFIG_BNX2X_SRIOV=y
+# CONFIG_SYSTEMPORT is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+CONFIG_DNET=m
+# CONFIG_NET_VENDOR_DEC is not set
+CONFIG_NET_VENDOR_DLINK=y
+CONFIG_DL2K=m
+CONFIG_SUNDANCE=m
+# CONFIG_SUNDANCE_MMIO is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EXAR is not set
+# CONFIG_NET_VENDOR_HP is not set
+CONFIG_NET_VENDOR_INTEL=y
+CONFIG_E100=y
+CONFIG_E1000=y
+CONFIG_E1000E=y
+CONFIG_IGB=y
+CONFIG_IGB_HWMON=y
+CONFIG_IGBVF=y
+CONFIG_IXGB=y
+CONFIG_IXGBE=y
+CONFIG_IXGBE_HWMON=y
+CONFIG_IXGBE_DCB=y
+CONFIG_IXGBEVF=y
+CONFIG_I40E=y
+CONFIG_I40E_DCB=y
+CONFIG_I40E_FCOE=y
+CONFIG_I40EVF=y
+CONFIG_FM10K=y
+CONFIG_NET_VENDOR_I825XX=y
+# CONFIG_IP1000 is not set
+CONFIG_JME=m
+CONFIG_NET_VENDOR_MARVELL=y
+CONFIG_MVMDIO=m
+CONFIG_SKGE=m
+# CONFIG_SKGE_DEBUG is not set
+CONFIG_SKGE_GENESIS=y
+CONFIG_SKY2=m
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_NET_VENDOR_MELLANOX is not set
+CONFIG_NET_VENDOR_MICREL=y
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_KSZ884X_PCI=m
+CONFIG_NET_VENDOR_MYRI=y
+CONFIG_MYRI10GE=m
+CONFIG_FEALNX=m
+CONFIG_NET_VENDOR_NATSEMI=y
+CONFIG_NATSEMI=m
+CONFIG_NS83820=m
+CONFIG_NET_VENDOR_8390=y
+CONFIG_NE2K_PCI=m
+CONFIG_NET_VENDOR_NVIDIA=y
+CONFIG_FORCEDETH=m
+CONFIG_NET_VENDOR_OKI=y
+CONFIG_ETHOC=m
+CONFIG_NET_PACKET_ENGINE=y
+CONFIG_HAMACHI=m
+CONFIG_YELLOWFIN=m
+# CONFIG_NET_VENDOR_QLOGIC is not set
+CONFIG_NET_VENDOR_QUALCOMM=y
+CONFIG_NET_VENDOR_REALTEK=y
+CONFIG_8139CP=m
+CONFIG_8139TOO=m
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+CONFIG_8139TOO_8129=y
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_R8169=m
+CONFIG_NET_VENDOR_RDC=y
+CONFIG_R6040=m
+CONFIG_NET_VENDOR_ROCKER=y
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+CONFIG_NET_VENDOR_SILAN=y
+CONFIG_SC92031=m
+CONFIG_NET_VENDOR_SIS=y
+CONFIG_SIS900=m
+CONFIG_SIS190=m
+# CONFIG_SFC is not set
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_SMC91X=m
+CONFIG_EPIC100=m
+CONFIG_SMSC911X=m
+# CONFIG_SMSC911X_ARCH_HOOKS is not set
+CONFIG_SMSC9420=m
+CONFIG_NET_VENDOR_STMICRO=y
+CONFIG_STMMAC_ETH=m
+# CONFIG_STMMAC_PLATFORM is not set
+# CONFIG_STMMAC_PCI is not set
+# CONFIG_NET_VENDOR_SUN is not set
+CONFIG_NET_VENDOR_TEHUTI=y
+CONFIG_TEHUTI=m
+CONFIG_NET_VENDOR_TI=y
+# CONFIG_TI_CPSW_ALE is not set
+CONFIG_TLAN=m
+CONFIG_NET_VENDOR_VIA=y
+CONFIG_VIA_RHINE=m
+CONFIG_VIA_RHINE_MMIO=y
+CONFIG_VIA_VELOCITY=m
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_AT803X_PHY=m
+CONFIG_AMD_PHY=m
+CONFIG_AMD_XGBE_PHY=y
+CONFIG_MARVELL_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_BROADCOM_PHY=m
+CONFIG_BCM7XXX_PHY=m
+CONFIG_BCM87XX_PHY=m
+CONFIG_ICPLUS_PHY=m
+CONFIG_REALTEK_PHY=m
+CONFIG_NATIONAL_PHY=m
+CONFIG_STE10XP=m
+CONFIG_LSI_ET1011C_PHY=m
+CONFIG_MICREL_PHY=m
+CONFIG_FIXED_PHY=y
+CONFIG_MDIO_BITBANG=m
+CONFIG_MDIO_GPIO=m
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MDIO_BCM_UNIMAC is not set
+CONFIG_PPP=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOATM=m
+CONFIG_PPPOE=m
+CONFIG_PPTP=m
+CONFIG_PPPOL2TP=m
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_SLIP=m
+CONFIG_SLHC=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+CONFIG_USB_NET_DRIVERS=y
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_AX88179_178A=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_USB_NET_CDC_NCM=m
+CONFIG_USB_NET_HUAWEI_CDC_NCM=m
+CONFIG_USB_NET_CDC_MBIM=m
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_SR9700=m
+# CONFIG_USB_NET_SR9800 is not set
+CONFIG_USB_NET_SMSC75XX=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_ZAURUS=m
+CONFIG_USB_NET_CX82310_ETH=m
+CONFIG_USB_NET_KALMIA=m
+CONFIG_USB_NET_QMI_WWAN=m
+CONFIG_USB_HSO=m
+CONFIG_USB_NET_INT51X1=m
+CONFIG_USB_IPHETH=m
+CONFIG_USB_SIERRA_NET=m
+CONFIG_USB_VL600=m
+CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_ATMEL is not set
+CONFIG_AT76C50X_USB=m
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_RTL8180=m
+CONFIG_RTL8187=m
+CONFIG_RTL8187_LEDS=y
+# CONFIG_ADM8211 is not set
+CONFIG_MAC80211_HWSIM=m
+CONFIG_MWL8K=m
+CONFIG_ATH_COMMON=m
+CONFIG_ATH_CARDS=m
+# CONFIG_ATH_DEBUG is not set
+CONFIG_ATH5K=m
+CONFIG_ATH5K_DEBUG=y
+# CONFIG_ATH5K_TRACER is not set
+CONFIG_ATH5K_PCI=y
+CONFIG_ATH9K_HW=m
+CONFIG_ATH9K_COMMON=m
+CONFIG_ATH9K_BTCOEX_SUPPORT=y
+CONFIG_ATH9K=m
+CONFIG_ATH9K_PCI=y
+CONFIG_ATH9K_AHB=y
+CONFIG_ATH9K_DEBUGFS=y
+# CONFIG_ATH9K_STATION_STATISTICS is not set
+# CONFIG_ATH9K_DYNACK is not set
+# CONFIG_ATH9K_WOW is not set
+CONFIG_ATH9K_RFKILL=y
+# CONFIG_ATH9K_CHANNEL_CONTEXT is not set
+CONFIG_ATH9K_PCOEM=y
+CONFIG_ATH9K_HTC=m
+# CONFIG_ATH9K_HTC_DEBUGFS is not set
+CONFIG_CARL9170=m
+CONFIG_CARL9170_LEDS=y
+# CONFIG_CARL9170_DEBUGFS is not set
+CONFIG_CARL9170_WPC=y
+# CONFIG_CARL9170_HWRNG is not set
+CONFIG_ATH6KL=m
+CONFIG_ATH6KL_SDIO=m
+CONFIG_ATH6KL_USB=m
+CONFIG_ATH6KL_DEBUG=y
+# CONFIG_ATH6KL_TRACING is not set
+CONFIG_AR5523=m
+CONFIG_WIL6210=m
+CONFIG_WIL6210_ISR_COR=y
+# CONFIG_WIL6210_TRACING is not set
+CONFIG_ATH10K=m
+CONFIG_ATH10K_PCI=m
+# CONFIG_ATH10K_DEBUG is not set
+CONFIG_ATH10K_DEBUGFS=y
+# CONFIG_ATH10K_TRACING is not set
+CONFIG_WCN36XX=m
+# CONFIG_WCN36XX_DEBUGFS is not set
+CONFIG_B43=m
+CONFIG_B43_BCMA=y
+CONFIG_B43_SSB=y
+CONFIG_B43_BUSES_BCMA_AND_SSB=y
+# CONFIG_B43_BUSES_BCMA is not set
+# CONFIG_B43_BUSES_SSB is not set
+CONFIG_B43_PCI_AUTOSELECT=y
+CONFIG_B43_PCICORE_AUTOSELECT=y
+CONFIG_B43_SDIO=y
+CONFIG_B43_BCMA_PIO=y
+CONFIG_B43_PIO=y
+# CONFIG_B43_PHY_G is not set
+CONFIG_B43_PHY_N=y
+CONFIG_B43_PHY_LP=y
+CONFIG_B43_PHY_HT=y
+CONFIG_B43_LEDS=y
+CONFIG_B43_HWRNG=y
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43LEGACY=m
+CONFIG_B43LEGACY_PCI_AUTOSELECT=y
+CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
+CONFIG_B43LEGACY_LEDS=y
+CONFIG_B43LEGACY_HWRNG=y
+# CONFIG_B43LEGACY_DEBUG is not set
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_PIO=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+# CONFIG_B43LEGACY_PIO_MODE is not set
+CONFIG_BRCMUTIL=m
+CONFIG_BRCMSMAC=m
+CONFIG_BRCMFMAC=m
+CONFIG_BRCMFMAC_PROTO_BCDC=y
+CONFIG_BRCMFMAC_PROTO_MSGBUF=y
+CONFIG_BRCMFMAC_SDIO=y
+CONFIG_BRCMFMAC_USB=y
+CONFIG_BRCMFMAC_PCIE=y
+# CONFIG_BRCM_TRACING is not set
+# CONFIG_BRCMDBG is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+CONFIG_IWLWIFI=m
+CONFIG_IWLWIFI_LEDS=y
+CONFIG_IWLDVM=m
+CONFIG_IWLMVM=m
+CONFIG_IWLWIFI_OPMODE_MODULAR=y
+# CONFIG_IWLWIFI_BCAST_FILTERING is not set
+# CONFIG_IWLWIFI_UAPSD is not set
+
+#
+# Debugging Options
+#
+CONFIG_IWLWIFI_DEBUG=y
+CONFIG_IWLWIFI_DEBUGFS=y
+# CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE is not set
+# CONFIG_IWLWIFI_DEVICE_TRACING is not set
+CONFIG_IWLEGACY=m
+CONFIG_IWL4965=m
+CONFIG_IWL3945=m
+
+#
+# iwl3945 / iwl4965 Debugging Options
+#
+CONFIG_IWLEGACY_DEBUG=y
+CONFIG_IWLEGACY_DEBUGFS=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_LIBERTAS_MESH=y
+# CONFIG_HERMES is not set
+CONFIG_P54_COMMON=m
+CONFIG_P54_USB=m
+CONFIG_P54_PCI=m
+CONFIG_P54_LEDS=y
+CONFIG_RT2X00=m
+CONFIG_RT2400PCI=m
+CONFIG_RT2500PCI=m
+CONFIG_RT61PCI=m
+CONFIG_RT2800PCI=m
+CONFIG_RT2800PCI_RT33XX=y
+CONFIG_RT2800PCI_RT35XX=y
+CONFIG_RT2800PCI_RT53XX=y
+CONFIG_RT2800PCI_RT3290=y
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT33XX=y
+CONFIG_RT2800USB_RT35XX=y
+CONFIG_RT2800USB_RT3573=y
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_RT55XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RT2800_LIB=m
+CONFIG_RT2800_LIB_MMIO=m
+CONFIG_RT2X00_LIB_MMIO=m
+CONFIG_RT2X00_LIB_PCI=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_LEDS=y
+CONFIG_RT2X00_LIB_DEBUGFS=y
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_RTL_CARDS=m
+CONFIG_RTL8192CE=m
+CONFIG_RTL8192SE=m
+CONFIG_RTL8192DE=m
+CONFIG_RTL8723AE=m
+CONFIG_RTL8723BE=m
+CONFIG_RTL8188EE=m
+# CONFIG_RTL8192EE is not set
+# CONFIG_RTL8821AE is not set
+CONFIG_RTL8192CU=m
+CONFIG_RTLWIFI=m
+CONFIG_RTLWIFI_PCI=m
+CONFIG_RTLWIFI_USB=m
+# CONFIG_RTLWIFI_DEBUG is not set
+CONFIG_RTL8192C_COMMON=m
+CONFIG_RTL8723_COMMON=m
+CONFIG_RTLBTCOEXIST=m
+# CONFIG_WL_TI is not set
+CONFIG_ZD1211RW=m
+# CONFIG_ZD1211RW_DEBUG is not set
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_PCIE=m
+CONFIG_MWIFIEX_USB=m
+CONFIG_CW1200=m
+CONFIG_CW1200_WLAN_SDIO=m
+CONFIG_RSI_91X=m
+CONFIG_RSI_DEBUGFS=y
+CONFIG_RSI_SDIO=m
+CONFIG_RSI_USB=m
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+CONFIG_IEEE802154_DRIVERS=m
+CONFIG_IEEE802154_FAKELB=m
+# CONFIG_VMXNET3 is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=y
+CONFIG_INPUT_POLLDEV=m
+CONFIG_INPUT_SPARSEKMAP=m
+# CONFIG_INPUT_MATRIXKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_BCM is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_CYPRESS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_MOUSE_PS2_SENTELIC=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_PS2_FOCALTECH=y
+CONFIG_MOUSE_SERIAL=m
+CONFIG_MOUSE_APPLETOUCH=m
+CONFIG_MOUSE_BCM5974=m
+CONFIG_MOUSE_CYAPA=m
+# CONFIG_MOUSE_ELAN_I2C is not set
+CONFIG_MOUSE_VSXXXAA=m
+# CONFIG_MOUSE_GPIO is not set
+CONFIG_MOUSE_SYNAPTICS_I2C=m
+CONFIG_MOUSE_SYNAPTICS_USB=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_ANALOG=m
+CONFIG_JOYSTICK_A3D=m
+CONFIG_JOYSTICK_ADI=m
+CONFIG_JOYSTICK_COBRA=m
+CONFIG_JOYSTICK_GF2K=m
+CONFIG_JOYSTICK_GRIP=m
+CONFIG_JOYSTICK_GRIP_MP=m
+CONFIG_JOYSTICK_GUILLEMOT=m
+CONFIG_JOYSTICK_INTERACT=m
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_USB=y
+CONFIG_JOYSTICK_IFORCE_232=y
+CONFIG_JOYSTICK_WARRIOR=m
+CONFIG_JOYSTICK_MAGELLAN=m
+CONFIG_JOYSTICK_SPACEORB=m
+CONFIG_JOYSTICK_SPACEBALL=m
+CONFIG_JOYSTICK_STINGER=m
+CONFIG_JOYSTICK_TWIDJOY=m
+CONFIG_JOYSTICK_ZHENHUA=m
+# CONFIG_JOYSTICK_AS5011 is not set
+CONFIG_JOYSTICK_JOYDUMP=m
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=m
+CONFIG_TABLET_USB_AIPTEK=m
+CONFIG_TABLET_USB_GTCO=m
+CONFIG_TABLET_USB_HANWANG=m
+CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TABLET_SERIAL_WACOM4=m
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_OF_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_TOUCHSCREEN_AUO_PIXCIR=m
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+CONFIG_TOUCHSCREEN_DYNAPRO=m
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+CONFIG_TOUCHSCREEN_EETI=m
+CONFIG_TOUCHSCREEN_EGALAX=m
+CONFIG_TOUCHSCREEN_FUJITSU=m
+# CONFIG_TOUCHSCREEN_GOODIX is not set
+CONFIG_TOUCHSCREEN_ILI210X=m
+CONFIG_TOUCHSCREEN_GUNZE=m
+# CONFIG_TOUCHSCREEN_ELAN is not set
+CONFIG_TOUCHSCREEN_ELO=m
+CONFIG_TOUCHSCREEN_WACOM_W8001=m
+CONFIG_TOUCHSCREEN_WACOM_I2C=m
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+CONFIG_TOUCHSCREEN_MCS5000=m
+CONFIG_TOUCHSCREEN_MMS114=m
+CONFIG_TOUCHSCREEN_MTOUCH=m
+CONFIG_TOUCHSCREEN_INEXIO=m
+CONFIG_TOUCHSCREEN_MK712=m
+CONFIG_TOUCHSCREEN_PENMOUNT=m
+CONFIG_TOUCHSCREEN_EDT_FT5X06=m
+CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
+CONFIG_TOUCHSCREEN_TOUCHWIN=m
+CONFIG_TOUCHSCREEN_PIXCIR=m
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
+CONFIG_TOUCHSCREEN_USB_EGALAX=y
+CONFIG_TOUCHSCREEN_USB_PANJIT=y
+CONFIG_TOUCHSCREEN_USB_3M=y
+CONFIG_TOUCHSCREEN_USB_ITM=y
+CONFIG_TOUCHSCREEN_USB_ETURBO=y
+CONFIG_TOUCHSCREEN_USB_GUNZE=y
+CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
+CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
+CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
+CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
+CONFIG_TOUCHSCREEN_USB_GOTOP=y
+CONFIG_TOUCHSCREEN_USB_JASTEC=y
+CONFIG_TOUCHSCREEN_USB_ELO=y
+CONFIG_TOUCHSCREEN_USB_E2I=y
+CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y
+CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y
+CONFIG_TOUCHSCREEN_USB_NEXIO=y
+CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y
+CONFIG_TOUCHSCREEN_TOUCHIT213=m
+CONFIG_TOUCHSCREEN_TSC_SERIO=m
+CONFIG_TOUCHSCREEN_TSC2007=m
+CONFIG_TOUCHSCREEN_ST1232=m
+# CONFIG_TOUCHSCREEN_SX8654 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+CONFIG_TOUCHSCREEN_ZFORCE=m
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_E3X0_BUTTON is not set
+CONFIG_INPUT_MMA8450=m
+CONFIG_INPUT_MPU3050=m
+CONFIG_INPUT_GP2A=m
+# CONFIG_INPUT_GPIO_BEEPER is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+CONFIG_INPUT_ATI_REMOTE2=m
+CONFIG_INPUT_KEYSPAN_REMOTE=m
+CONFIG_INPUT_KXTJ9=m
+# CONFIG_INPUT_KXTJ9_POLLED_MODE is not set
+CONFIG_INPUT_POWERMATE=m
+CONFIG_INPUT_YEALINK=m
+CONFIG_INPUT_CM109=m
+CONFIG_INPUT_UINPUT=m
+# CONFIG_INPUT_PCF8574 is not set
+CONFIG_INPUT_PWM_BEEPER=m
+CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_IMS_PCU is not set
+CONFIG_INPUT_CMA3000=m
+CONFIG_INPUT_CMA3000_I2C=m
+# CONFIG_INPUT_DRV260X_HAPTICS is not set
+# CONFIG_INPUT_DRV2667_HAPTICS is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_AMBAKMI=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+CONFIG_SERIO_ALTERA_PS2=m
+# CONFIG_SERIO_PS2MULT is not set
+CONFIG_SERIO_ARC_PS2=m
+# CONFIG_SERIO_APBPS2 is not set
+CONFIG_GAMEPORT=m
+CONFIG_GAMEPORT_NS558=m
+CONFIG_GAMEPORT_L4=m
+CONFIG_GAMEPORT_EMU10K1=m
+CONFIG_GAMEPORT_FM801=m
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_CONSOLE_SLEEP=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_SERIAL_NONSTANDARD=y
+CONFIG_ROCKETPORT=m
+CONFIG_CYCLADES=m
+# CONFIG_CYZ_INTR is not set
+# CONFIG_MOXA_INTELLIO is not set
+# CONFIG_MOXA_SMARTIO is not set
+CONFIG_SYNCLINKMP=m
+CONFIG_SYNCLINK_GT=m
+CONFIG_NOZOMI=m
+# CONFIG_ISI is not set
+CONFIG_N_HDLC=m
+CONFIG_N_GSM=m
+# CONFIG_TRACE_SINK is not set
+CONFIG_DEVMEM=y
+# CONFIG_DEVKMEM is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_EARLYCON=y
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_DMA=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=32
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_RSA=y
+# CONFIG_SERIAL_8250_DW is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AMBA_PL010 is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
+# CONFIG_SERIAL_KGDB_NMI is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_CONSOLE_POLL=y
+CONFIG_SERIAL_JSM=m
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_SC16IS7XX is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+CONFIG_SERIAL_ARC=m
+CONFIG_SERIAL_ARC_NR_PORTS=1
+# CONFIG_SERIAL_RP2 is not set
+# CONFIG_SERIAL_FSL_LPUART is not set
+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
+# CONFIG_TTY_PRINTK is not set
+CONFIG_HVC_DRIVER=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_IPMI_HANDLER=m
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_DEVICE_INTERFACE=m
+CONFIG_IPMI_SI=m
+# CONFIG_IPMI_SI_PROBE_DEFAULTS is not set
+# CONFIG_IPMI_SSIF is not set
+CONFIG_IPMI_WATCHDOG=m
+CONFIG_IPMI_POWEROFF=m
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_TIMERIOMEM=m
+CONFIG_HW_RANDOM_VIRTIO=m
+CONFIG_HW_RANDOM_TPM=m
+CONFIG_R3964=m
+# CONFIG_APPLICOM is not set
+
+#
+# PCMCIA character devices
+#
+CONFIG_RAW_DRIVER=y
+CONFIG_MAX_RAW_DEVS=8192
+CONFIG_TCG_TPM=m
+# CONFIG_TCG_TIS_I2C_ATMEL is not set
+# CONFIG_TCG_TIS_I2C_INFINEON is not set
+# CONFIG_TCG_TIS_I2C_NUVOTON is not set
+CONFIG_TCG_ATMEL=m
+# CONFIG_TCG_TIS_ST33ZP24 is not set
+CONFIG_DEVPORT=y
+# CONFIG_XILLYBUS is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_MUX=m
+
+#
+# Multiplexer I2C Chip support
+#
+CONFIG_I2C_ARB_GPIO_CHALLENGE=m
+CONFIG_I2C_MUX_GPIO=m
+CONFIG_I2C_MUX_PCA9541=m
+CONFIG_I2C_MUX_PCA954x=m
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_SMBUS=m
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_NFORCE2=m
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CBUS_GPIO is not set
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_DESIGNWARE_PCI is not set
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_NOMADIK is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PCA_PLATFORM=m
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_RK3X is not set
+CONFIG_I2C_SIMTEC=m
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+CONFIG_I2C_DIOLAN_U2C=m
+CONFIG_I2C_PARPORT_LIGHT=m
+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_TAOS_EVM is not set
+CONFIG_I2C_TINY_USB=m
+CONFIG_I2C_VIPERBOARD=m
+
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_STUB=m
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_SPI is not set
+# CONFIG_SPMI is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+CONFIG_PPS=y
+# CONFIG_PPS_DEBUG is not set
+
+#
+# PPS clients support
+#
+# CONFIG_PPS_CLIENT_KTIMER is not set
+CONFIG_PPS_CLIENT_LDISC=m
+CONFIG_PPS_CLIENT_GPIO=m
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_DP83640_PHY=m
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_OF_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC=y
+
+#
+# Memory mapped GPIO drivers
+#
+# CONFIG_GPIO_74XX_MMIO is not set
+# CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_DWAPB is not set
+CONFIG_GPIO_GENERIC_PLATFORM=y
+# CONFIG_GPIO_GRGPIO is not set
+# CONFIG_GPIO_PL061 is not set
+# CONFIG_GPIO_SCH311X is not set
+# CONFIG_GPIO_SYSCON is not set
+# CONFIG_GPIO_VX855 is not set
+# CONFIG_GPIO_XGENE is not set
+
+#
+# I2C GPIO expanders
+#
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+
+#
+# MFD GPIO expanders
+#
+
+#
+# PCI GPIO expanders
+#
+# CONFIG_GPIO_AMD8111 is not set
+# CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_ML_IOH is not set
+# CONFIG_GPIO_RDC321X is not set
+
+#
+# USB GPIO expanders
+#
+CONFIG_GPIO_VIPERBOARD=m
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_BQ24190 is not set
+# CONFIG_CHARGER_BQ24735 is not set
+CONFIG_CHARGER_SMB347=m
+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO=y
+# CONFIG_POWER_RESET_GPIO_RESTART is not set
+# CONFIG_POWER_RESET_LTC2952 is not set
+# CONFIG_POWER_RESET_RESTART is not set
+CONFIG_POWER_RESET_VEXPRESS=y
+CONFIG_POWER_RESET_XGENE=y
+# CONFIG_POWER_RESET_SYSCON is not set
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+# CONFIG_POWER_AVS is not set
+CONFIG_HWMON=y
+CONFIG_HWMON_VID=m
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+CONFIG_SENSORS_AD7414=m
+CONFIG_SENSORS_AD7418=m
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1029=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_ADM9240=m
+CONFIG_SENSORS_ADT7X10=m
+CONFIG_SENSORS_ADT7410=m
+CONFIG_SENSORS_ADT7411=m
+CONFIG_SENSORS_ADT7462=m
+CONFIG_SENSORS_ADT7470=m
+CONFIG_SENSORS_ADT7475=m
+CONFIG_SENSORS_ASC7621=m
+CONFIG_SENSORS_ATXP1=m
+CONFIG_SENSORS_DS620=m
+CONFIG_SENSORS_DS1621=m
+# CONFIG_SENSORS_I5K_AMB is not set
+CONFIG_SENSORS_F71805F=m
+CONFIG_SENSORS_F71882FG=m
+CONFIG_SENSORS_F75375S=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_GL520SM=m
+CONFIG_SENSORS_G760A=m
+CONFIG_SENSORS_G762=m
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_HIH6130 is not set
+CONFIG_SENSORS_IBMAEM=m
+CONFIG_SENSORS_IBMPEX=m
+CONFIG_SENSORS_IIO_HWMON=m
+CONFIG_SENSORS_IT87=m
+# CONFIG_SENSORS_JC42 is not set
+CONFIG_SENSORS_POWR1220=m
+CONFIG_SENSORS_LINEAGE=m
+CONFIG_SENSORS_LTC2945=m
+CONFIG_SENSORS_LTC4151=m
+CONFIG_SENSORS_LTC4215=m
+CONFIG_SENSORS_LTC4222=m
+CONFIG_SENSORS_LTC4245=m
+CONFIG_SENSORS_LTC4260=m
+CONFIG_SENSORS_LTC4261=m
+CONFIG_SENSORS_MAX16065=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_MAX1668=m
+CONFIG_SENSORS_MAX197=m
+CONFIG_SENSORS_MAX6639=m
+CONFIG_SENSORS_MAX6642=m
+CONFIG_SENSORS_MAX6650=m
+CONFIG_SENSORS_MAX6697=m
+# CONFIG_SENSORS_HTU21 is not set
+CONFIG_SENSORS_MCP3021=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM73=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_LM92=m
+CONFIG_SENSORS_LM93=m
+CONFIG_SENSORS_LM95234=m
+CONFIG_SENSORS_LM95241=m
+CONFIG_SENSORS_LM95245=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_PC87427=m
+CONFIG_SENSORS_NTC_THERMISTOR=m
+CONFIG_SENSORS_NCT6683=m
+CONFIG_SENSORS_NCT6775=m
+# CONFIG_SENSORS_NCT7802 is not set
+# CONFIG_SENSORS_NCT7904 is not set
+CONFIG_SENSORS_PCF8591=m
+CONFIG_PMBUS=m
+CONFIG_SENSORS_PMBUS=m
+CONFIG_SENSORS_ADM1275=m
+CONFIG_SENSORS_LM25066=m
+CONFIG_SENSORS_LTC2978=m
+CONFIG_SENSORS_MAX16064=m
+CONFIG_SENSORS_MAX34440=m
+CONFIG_SENSORS_MAX8688=m
+CONFIG_SENSORS_TPS40422=m
+CONFIG_SENSORS_UCD9000=m
+CONFIG_SENSORS_UCD9200=m
+CONFIG_SENSORS_ZL6100=m
+CONFIG_SENSORS_PWM_FAN=m
+CONFIG_SENSORS_SHT15=m
+CONFIG_SENSORS_SHT21=m
+CONFIG_SENSORS_SHTC1=m
+CONFIG_SENSORS_SIS5595=m
+CONFIG_SENSORS_DME1737=m
+CONFIG_SENSORS_EMC1403=m
+# CONFIG_SENSORS_EMC2103 is not set
+CONFIG_SENSORS_EMC6W201=m
+CONFIG_SENSORS_SMSC47M1=m
+CONFIG_SENSORS_SMSC47M192=m
+CONFIG_SENSORS_SMSC47B397=m
+CONFIG_SENSORS_SCH56XX_COMMON=m
+CONFIG_SENSORS_SCH5627=m
+CONFIG_SENSORS_SCH5636=m
+# CONFIG_SENSORS_SMM665 is not set
+CONFIG_SENSORS_ADC128D818=m
+CONFIG_SENSORS_ADS1015=m
+CONFIG_SENSORS_ADS7828=m
+CONFIG_SENSORS_AMC6821=m
+CONFIG_SENSORS_INA209=m
+CONFIG_SENSORS_INA2XX=m
+CONFIG_SENSORS_THMC50=m
+CONFIG_SENSORS_TMP102=m
+CONFIG_SENSORS_TMP103=m
+CONFIG_SENSORS_TMP401=m
+CONFIG_SENSORS_TMP421=m
+CONFIG_SENSORS_VEXPRESS=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_VT1211=m
+CONFIG_SENSORS_VT8231=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83791D=m
+CONFIG_SENSORS_W83792D=m
+CONFIG_SENSORS_W83793=m
+CONFIG_SENSORS_W83795=m
+# CONFIG_SENSORS_W83795_FANCTRL is not set
+CONFIG_SENSORS_W83L785TS=m
+CONFIG_SENSORS_W83L786NG=m
+CONFIG_SENSORS_W83627HF=m
+CONFIG_SENSORS_W83627EHF=m
+CONFIG_THERMAL=m
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_OF=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_STEP_WISE=y
+# CONFIG_THERMAL_GOV_BANG_BANG is not set
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
+# CONFIG_THERMAL_EMULATION is not set
+CONFIG_IMX_THERMAL=m
+
+#
+# Texas Instruments thermal drivers
+#
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+CONFIG_SOFT_WATCHDOG=m
+CONFIG_GPIO_WATCHDOG=m
+# CONFIG_XILINX_WATCHDOG is not set
+CONFIG_ARM_SP805_WATCHDOG=m
+# CONFIG_CADENCE_WATCHDOG is not set
+# CONFIG_DW_WATCHDOG is not set
+CONFIG_ALIM7101_WDT=m
+CONFIG_I6300ESB_WDT=m
+# CONFIG_MEN_A21_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_WDTPCI=m
+
+#
+# USB-based Watchdog Cards
+#
+CONFIG_USBPCWATCHDOG=m
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=m
+CONFIG_SSB_SPROM=y
+CONFIG_SSB_BLOCKIO=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+CONFIG_SSB_SDIOHOST=y
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_GPIO=y
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+CONFIG_BCMA=m
+CONFIG_BCMA_BLOCKIO=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+CONFIG_BCMA_HOST_PCI=y
+# CONFIG_BCMA_HOST_SOC is not set
+CONFIG_BCMA_DRIVER_PCI=y
+CONFIG_BCMA_DRIVER_GMAC_CMN=y
+CONFIG_BCMA_DRIVER_GPIO=y
+# CONFIG_BCMA_DEBUG is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_MFD_AS3722 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_ATMEL_HLCDC is not set
+# CONFIG_MFD_BCM590XX is not set
+# CONFIG_MFD_AXP20X is not set
+# CONFIG_MFD_CROS_EC is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_DA9150 is not set
+# CONFIG_MFD_DLN2 is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_MFD_HI6421_PMIC is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_LPC_ICH is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_INTEL_SOC_PMIC is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77843 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_MT6397 is not set
+# CONFIG_MFD_MENF21BMC is not set
+CONFIG_MFD_VIPERBOARD=m
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_RDC321X is not set
+CONFIG_MFD_RTSX_PCI=m
+# CONFIG_MFD_RT5033 is not set
+CONFIG_MFD_RTSX_USB=m
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_RK808 is not set
+# CONFIG_MFD_RN5T618 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_SI476X_CORE is not set
+CONFIG_MFD_SM501=m
+CONFIG_MFD_SM501_GPIO=y
+# CONFIG_MFD_SKY81452 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS65218 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+CONFIG_MFD_WL1273_CORE=m
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+CONFIG_MFD_VX855=m
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+CONFIG_MFD_VEXPRESS_SYSREG=y
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
+
+#
+# Direct Rendering Manager
+#
+CONFIG_DRM=m
+CONFIG_DRM_KMS_HELPER=m
+CONFIG_DRM_KMS_FB_HELPER=y
+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+CONFIG_DRM_TTM=m
+
+#
+# I2C encoder or helper chips
+#
+# CONFIG_DRM_I2C_ADV7511 is not set
+CONFIG_DRM_I2C_CH7006=m
+CONFIG_DRM_I2C_SIL164=m
+CONFIG_DRM_I2C_NXP_TDA998X=m
+CONFIG_DRM_PTN3460=m
+# CONFIG_DRM_PS8622 is not set
+# CONFIG_DRM_TDFX is not set
+# CONFIG_DRM_R128 is not set
+CONFIG_DRM_RADEON=m
+# CONFIG_DRM_RADEON_USERPTR is not set
+# CONFIG_DRM_RADEON_UMS is not set
+CONFIG_DRM_NOUVEAU=m
+CONFIG_NOUVEAU_DEBUG=5
+CONFIG_NOUVEAU_DEBUG_DEFAULT=3
+CONFIG_DRM_NOUVEAU_BACKLIGHT=y
+# CONFIG_DRM_MGA is not set
+CONFIG_DRM_VIA=m
+# CONFIG_DRM_SAVAGE is not set
+# CONFIG_DRM_VGEM is not set
+# CONFIG_DRM_VMWGFX is not set
+CONFIG_DRM_UDL=m
+CONFIG_DRM_AST=m
+CONFIG_DRM_MGAG200=m
+CONFIG_DRM_CIRRUS_QEMU=m
+CONFIG_DRM_QXL=m
+CONFIG_DRM_BOCHS=m
+CONFIG_DRM_PANEL=y
+
+#
+# Display Panels
+#
+# CONFIG_DRM_PANEL_SIMPLE is not set
+# CONFIG_DRM_PANEL_S6E8AA0 is not set
+
+#
+# Frame buffer Devices
+#
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_CMDLINE=y
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_BACKLIGHT=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+CONFIG_FB_ARMCLCD=y
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_OPENCORES is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_I740 is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_SM501 is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+CONFIG_FB_VIRTUAL=m
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_AUO_K190X is not set
+CONFIG_FB_SIMPLE=y
+CONFIG_FB_SSD1307=m
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=m
+CONFIG_LCD_PLATFORM=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=m
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_LM3630A is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+CONFIG_BACKLIGHT_LP855X=m
+CONFIG_BACKLIGHT_GPIO=m
+# CONFIG_BACKLIGHT_LV5207LP is not set
+# CONFIG_BACKLIGHT_BD6107 is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEOMODE_HELPERS=y
+CONFIG_HDMI=y
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DUMMY_CONSOLE_COLUMNS=80
+CONFIG_DUMMY_CONSOLE_ROWS=25
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=m
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+CONFIG_HID_ACRUX=m
+CONFIG_HID_ACRUX_FF=y
+# CONFIG_HID_APPLE is not set
+CONFIG_HID_APPLEIR=m
+CONFIG_HID_AUREAL=m
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_BETOP_FF is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CP2112 is not set
+# CONFIG_HID_CYPRESS is not set
+CONFIG_HID_DRAGONRISE=m
+CONFIG_DRAGONRISE_FF=y
+CONFIG_HID_EMS_FF=m
+CONFIG_HID_ELECOM=m
+CONFIG_HID_ELO=m
+# CONFIG_HID_EZKEY is not set
+CONFIG_HID_HOLTEK=m
+CONFIG_HOLTEK_FF=y
+CONFIG_HID_GT683R=m
+CONFIG_HID_KEYTOUCH=m
+CONFIG_HID_KYE=m
+CONFIG_HID_UCLOGIC=m
+CONFIG_HID_WALTOP=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_ICADE=m
+CONFIG_HID_TWINHAN=m
+# CONFIG_HID_KENSINGTON is not set
+CONFIG_HID_LCPOWER=m
+CONFIG_HID_LENOVO=m
+# CONFIG_HID_LOGITECH is not set
+CONFIG_HID_MAGICMOUSE=y
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+CONFIG_HID_MULTITOUCH=m
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=m
+CONFIG_HID_PANTHERLORD=m
+CONFIG_PANTHERLORD_FF=y
+# CONFIG_HID_PENMOUNT is not set
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_PICOLCD=m
+# CONFIG_HID_PICOLCD_FB is not set
+# CONFIG_HID_PICOLCD_BACKLIGHT is not set
+# CONFIG_HID_PICOLCD_LCD is not set
+# CONFIG_HID_PICOLCD_LEDS is not set
+CONFIG_HID_PLANTRONICS=y
+CONFIG_HID_PRIMAX=m
+CONFIG_HID_ROCCAT=m
+CONFIG_HID_SAITEK=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SONY=m
+CONFIG_SONY_FF=y
+CONFIG_HID_SPEEDLINK=m
+CONFIG_HID_STEELSERIES=m
+CONFIG_HID_SUNPLUS=m
+CONFIG_HID_RMI=m
+CONFIG_HID_GREENASIA=m
+CONFIG_GREENASIA_FF=y
+CONFIG_HID_SMARTJOYPLUS=m
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_HID_TIVO=m
+CONFIG_HID_TOPSEED=m
+CONFIG_HID_THINGM=m
+CONFIG_HID_THRUSTMASTER=m
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_HID_WACOM=m
+CONFIG_HID_WIIMOTE=m
+CONFIG_HID_XINMO=m
+CONFIG_HID_ZEROPLUS=m
+CONFIG_ZEROPLUS_FF=y
+CONFIG_HID_ZYDACRON=m
+CONFIG_HID_SENSOR_HUB=m
+# CONFIG_HID_SENSOR_CUSTOM_SENSOR is not set
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+
+#
+# I2C HID support
+#
+CONFIG_I2C_HID=m
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_OTG_FSM is not set
+CONFIG_USB_MON=y
+CONFIG_USB_WUSB=m
+CONFIG_USB_WUSB_CBAF=m
+# CONFIG_USB_WUSB_CBAF_DEBUG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PCI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_ISP1362_HCD=m
+CONFIG_USB_FUSBH200_HCD=m
+# CONFIG_USB_FOTG210_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PCI=y
+# CONFIG_USB_OHCI_HCD_PLATFORM is not set
+CONFIG_USB_UHCI_HCD=y
+CONFIG_USB_U132_HCD=m
+CONFIG_USB_SL811_HCD=m
+CONFIG_USB_SL811_HCD_ISO=y
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+CONFIG_USB_HWA_HCD=m
+# CONFIG_USB_HCD_BCMA is not set
+# CONFIG_USB_HCD_SSB is not set
+# CONFIG_USB_HCD_TEST_MODE is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+CONFIG_USB_WDM=m
+CONFIG_USB_TMC=m
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=m
+CONFIG_REALTEK_AUTOPM=y
+CONFIG_USB_STORAGE_DATAFAB=m
+CONFIG_USB_STORAGE_FREECOM=m
+CONFIG_USB_STORAGE_ISD200=m
+CONFIG_USB_STORAGE_USBAT=m
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
+CONFIG_USB_STORAGE_JUMPSHOT=m
+CONFIG_USB_STORAGE_ALAUDA=m
+CONFIG_USB_STORAGE_ONETOUCH=m
+CONFIG_USB_STORAGE_KARMA=m
+CONFIG_USB_STORAGE_CYPRESS_ATACB=m
+CONFIG_USB_STORAGE_ENE_UB6250=m
+CONFIG_USB_UAS=m
+
+#
+# USB Imaging devices
+#
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+# CONFIG_USBIP_CORE is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_ISP1760 is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CONSOLE=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_SIMPLE=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+# CONFIG_USB_SERIAL_F81232 is not set
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+# CONFIG_USB_SERIAL_METRO is not set
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+# CONFIG_USB_SERIAL_MXUPORT is not set
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_QCAUX=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_WWAN=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_XSENS_MT=m
+# CONFIG_USB_SERIAL_WISHBONE is not set
+CONFIG_USB_SERIAL_SSU100=m
+CONFIG_USB_SERIAL_QT2=m
+CONFIG_USB_SERIAL_DEBUG=m
+
+#
+# USB Miscellaneous drivers
+#
+CONFIG_USB_EMI62=m
+CONFIG_USB_EMI26=m
+CONFIG_USB_ADUTUX=m
+CONFIG_USB_SEVSEG=m
+# CONFIG_USB_RIO500 is not set
+CONFIG_USB_LEGOTOWER=m
+CONFIG_USB_LCD=m
+CONFIG_USB_LED=m
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+CONFIG_USB_IDMOUSE=m
+CONFIG_USB_FTDI_ELAN=m
+CONFIG_USB_APPLEDISPLAY=m
+CONFIG_USB_SISUSBVGA=m
+CONFIG_USB_SISUSBVGA_CON=y
+CONFIG_USB_LD=m
+CONFIG_USB_TRANCEVIBRATOR=m
+CONFIG_USB_IOWARRIOR=m
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_EHSET_TEST_FIXTURE is not set
+CONFIG_USB_ISIGHTFW=m
+CONFIG_USB_YUREX=m
+CONFIG_USB_EZUSB_FX2=m
+CONFIG_USB_HSIC_USB3503=m
+# CONFIG_USB_LINK_LAYER_TEST is not set
+# CONFIG_USB_CHAOSKEY is not set
+CONFIG_USB_ATM=m
+# CONFIG_USB_SPEEDTOUCH is not set
+CONFIG_USB_CXACRU=m
+CONFIG_USB_UEAGLEATM=m
+CONFIG_USB_XUSBATM=m
+
+#
+# USB Physical Layer drivers
+#
+CONFIG_USB_PHY=y
+CONFIG_NOP_USB_XCEIV=m
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ISP1301 is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_USB_LED_TRIG is not set
+CONFIG_UWB=m
+CONFIG_UWB_HWA=m
+CONFIG_UWB_WHCI=m
+CONFIG_UWB_I1480U=m
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=m
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_ARMMMCI=m
+CONFIG_MMC_SDHCI=m
+CONFIG_MMC_SDHCI_PCI=m
+CONFIG_MMC_RICOH_MMC=y
+CONFIG_MMC_SDHCI_PLTFM=m
+# CONFIG_MMC_SDHCI_OF_ARASAN is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+CONFIG_MMC_TIFM_SD=m
+CONFIG_MMC_CB710=m
+CONFIG_MMC_VIA_SDMMC=m
+# CONFIG_MMC_DW is not set
+CONFIG_MMC_VUB300=m
+CONFIG_MMC_USHC=m
+# CONFIG_MMC_USDHI6ROL0 is not set
+CONFIG_MMC_REALTEK_PCI=m
+CONFIG_MMC_REALTEK_USB=m
+# CONFIG_MMC_TOSHIBA_PCI is not set
+CONFIG_MEMSTICK=m
+# CONFIG_MEMSTICK_DEBUG is not set
+
+#
+# MemoryStick drivers
+#
+# CONFIG_MEMSTICK_UNSAFE_RESUME is not set
+CONFIG_MSPRO_BLOCK=m
+# CONFIG_MS_BLOCK is not set
+
+#
+# MemoryStick Host Controller Drivers
+#
+CONFIG_MEMSTICK_TIFM_MS=m
+CONFIG_MEMSTICK_JMICRON_38X=m
+CONFIG_MEMSTICK_R592=m
+CONFIG_MEMSTICK_REALTEK_PCI=m
+CONFIG_MEMSTICK_REALTEK_USB=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_CLASS_FLASH is not set
+
+#
+# LED drivers
+#
+CONFIG_LEDS_LM3530=m
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_LP55XX_COMMON=m
+CONFIG_LEDS_LP5521=m
+CONFIG_LEDS_LP5523=m
+CONFIG_LEDS_LP5562=m
+# CONFIG_LEDS_LP8501 is not set
+# CONFIG_LEDS_LP8860 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA963X is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_INTEL_SS4200 is not set
+CONFIG_LEDS_LT3593=m
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_LM355x is not set
+
+#
+# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
+#
+CONFIG_LEDS_BLINKM=m
+# CONFIG_LEDS_SYSCON is not set
+# CONFIG_LEDS_PM8941_WLED is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LEDS_TRIGGER_ONESHOT=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_BACKLIGHT=m
+# CONFIG_LEDS_TRIGGER_CPU is not set
+CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+CONFIG_LEDS_TRIGGER_TRANSIENT=m
+CONFIG_LEDS_TRIGGER_CAMERA=m
+CONFIG_ACCESSIBILITY=y
+CONFIG_A11Y_BRAILLE_CONSOLE=y
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+# CONFIG_RTC_SYSTOHC is not set
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_ABB5ZES3 is not set
+# CONFIG_RTC_DRV_ABX80X is not set
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1374=m
+# CONFIG_RTC_DRV_DS1374_WDT is not set
+CONFIG_RTC_DRV_DS1672=m
+CONFIG_RTC_DRV_DS3232=m
+# CONFIG_RTC_DRV_HYM8563 is not set
+CONFIG_RTC_DRV_MAX6900=m
+CONFIG_RTC_DRV_RS5C372=m
+CONFIG_RTC_DRV_ISL1208=m
+CONFIG_RTC_DRV_ISL12022=m
+# CONFIG_RTC_DRV_ISL12057 is not set
+CONFIG_RTC_DRV_X1205=m
+CONFIG_RTC_DRV_PCF2127=m
+CONFIG_RTC_DRV_PCF8523=m
+CONFIG_RTC_DRV_PCF8563=m
+CONFIG_RTC_DRV_PCF85063=m
+CONFIG_RTC_DRV_PCF8583=m
+CONFIG_RTC_DRV_M41T80=m
+CONFIG_RTC_DRV_M41T80_WDT=y
+CONFIG_RTC_DRV_BQ32K=m
+# CONFIG_RTC_DRV_S35390A is not set
+CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_RX8581=m
+CONFIG_RTC_DRV_RX8025=m
+CONFIG_RTC_DRV_EM3027=m
+CONFIG_RTC_DRV_RV3029C2=m
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+CONFIG_RTC_DRV_DS1286=m
+CONFIG_RTC_DRV_DS1511=m
+CONFIG_RTC_DRV_DS1553=m
+# CONFIG_RTC_DRV_DS1685_FAMILY is not set
+CONFIG_RTC_DRV_DS1742=m
+CONFIG_RTC_DRV_DS2404=m
+# CONFIG_RTC_DRV_EFI is not set
+CONFIG_RTC_DRV_STK17TA8=m
+# CONFIG_RTC_DRV_M48T86 is not set
+CONFIG_RTC_DRV_M48T35=m
+CONFIG_RTC_DRV_M48T59=m
+CONFIG_RTC_DRV_MSM6242=m
+CONFIG_RTC_DRV_BQ4802=m
+CONFIG_RTC_DRV_RP5C01=m
+CONFIG_RTC_DRV_V3020=m
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PL030 is not set
+# CONFIG_RTC_DRV_PL031 is not set
+# CONFIG_RTC_DRV_SNVS is not set
+CONFIG_RTC_DRV_XGENE=m
+
+#
+# HID Sensor RTC drivers
+#
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+# CONFIG_AMBA_PL08X is not set
+CONFIG_DW_DMAC_CORE=m
+CONFIG_DW_DMAC=m
+CONFIG_DW_DMAC_PCI=m
+# CONFIG_HSU_DMA_PCI is not set
+# CONFIG_PL330_DMA is not set
+# CONFIG_FSL_EDMA is not set
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_OF=y
+
+#
+# DMA Clients
+#
+CONFIG_ASYNC_TX_DMA=y
+# CONFIG_DMATEST is not set
+CONFIG_AUXDISPLAY=y
+CONFIG_UIO=m
+CONFIG_UIO_CIF=m
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_DMEM_GENIRQ is not set
+CONFIG_UIO_AEC=m
+CONFIG_UIO_SERCOS3=m
+CONFIG_UIO_PCI_GENERIC=m
+# CONFIG_UIO_NETX is not set
+# CONFIG_UIO_MF624 is not set
+CONFIG_VFIO_IOMMU_TYPE1=m
+CONFIG_VFIO_VIRQFD=m
+CONFIG_VFIO=m
+CONFIG_VFIO_PCI=m
+CONFIG_VFIO_PCI_MMAP=y
+CONFIG_VFIO_PCI_INTX=y
+CONFIG_VIRT_DRIVERS=y
+CONFIG_VIRTIO=y
+
+#
+# Virtio drivers
+#
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_PCI_LEGACY=y
+CONFIG_VIRTIO_BALLOON=y
+# CONFIG_VIRTIO_INPUT is not set
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
+
+#
+# Microsoft Hyper-V guest support
+#
+CONFIG_STAGING=y
+# CONFIG_PRISM2_USB is not set
+# CONFIG_COMEDI is not set
+# CONFIG_RTL8192U is not set
+CONFIG_RTLLIB=m
+CONFIG_RTLLIB_CRYPTO_CCMP=m
+CONFIG_RTLLIB_CRYPTO_TKIP=m
+CONFIG_RTLLIB_CRYPTO_WEP=m
+CONFIG_RTL8192E=m
+CONFIG_R8712U=m
+# CONFIG_R8188EU is not set
+CONFIG_R8723AU=m
+# CONFIG_8723AU_AP_MODE is not set
+# CONFIG_8723AU_BT_COEXIST is not set
+# CONFIG_RTS5208 is not set
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7606 is not set
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7152 is not set
+# CONFIG_AD7746 is not set
+
+#
+# Direct Digital Synthesis
+#
+
+#
+# Digital gyroscope sensors
+#
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+
+#
+# Light sensors
+#
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2x7x is not set
+
+#
+# Magnetometer sensors
+#
+# CONFIG_SENSORS_HMC5843_I2C is not set
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7854 is not set
+
+#
+# Resolver to digital converters
+#
+
+#
+# Triggers - standalone
+#
+# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
+# CONFIG_IIO_SIMPLE_DUMMY is not set
+# CONFIG_FB_SM7XX is not set
+# CONFIG_FB_SM750 is not set
+# CONFIG_FB_XGI is not set
+# CONFIG_FT1000 is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+CONFIG_STAGING_MEDIA=y
+
+#
+# Android
+#
+# CONFIG_USB_WPAN_HCD is not set
+# CONFIG_WIMAX_GDM72XX is not set
+# CONFIG_LTE_GDM724X is not set
+# CONFIG_LUSTRE_FS is not set
+# CONFIG_DGNC is not set
+# CONFIG_DGAP is not set
+# CONFIG_GS_FPGABOOT is not set
+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
+# CONFIG_I2O is not set
+# CONFIG_FSL_MC_BUS is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+
+#
+# Common Clock Framework
+#
+CONFIG_COMMON_CLK_VERSATILE=y
+CONFIG_CLK_SP810=y
+CONFIG_CLK_VEXPRESS_OSC=y
+# CONFIG_COMMON_CLK_SI5351 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+CONFIG_COMMON_CLK_XGENE=y
+# CONFIG_COMMON_CLK_PWM is not set
+# CONFIG_COMMON_CLK_PXA is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
+
+#
+# Hardware Spinlock drivers
+#
+
+#
+# Clock Source drivers
+#
+CONFIG_CLKSRC_OF=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+# CONFIG_ATMEL_PIT is not set
+# CONFIG_SH_TIMER_CMT is not set
+# CONFIG_SH_TIMER_MTU2 is not set
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_EM_TIMER_STI is not set
+# CONFIG_MAILBOX is not set
+CONFIG_IOMMU_API=y
+CONFIG_IOMMU_SUPPORT=y
+
+#
+# Generic IOMMU Pagetable Support
+#
+CONFIG_IOMMU_IO_PGTABLE=y
+CONFIG_IOMMU_IO_PGTABLE_LPAE=y
+# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
+CONFIG_OF_IOMMU=y
+CONFIG_ARM_SMMU=y
+
+#
+# Remoteproc drivers
+#
+# CONFIG_STE_MODEM_RPROC is not set
+
+#
+# Rpmsg drivers
+#
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_TI is not set
+CONFIG_PM_DEVFREQ=y
+
+#
+# DEVFREQ Governors
+#
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m
+# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
+# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
+# CONFIG_DEVFREQ_GOV_USERSPACE is not set
+
+#
+# DEVFREQ Drivers
+#
+# CONFIG_PM_DEVFREQ_EVENT is not set
+CONFIG_EXTCON=m
+
+#
+# Extcon Device Drivers
+#
+CONFIG_EXTCON_ADC_JACK=m
+CONFIG_EXTCON_GPIO=m
+# CONFIG_EXTCON_RT8973A is not set
+# CONFIG_EXTCON_SM5502 is not set
+# CONFIG_EXTCON_USB_GPIO is not set
+CONFIG_MEMORY=y
+CONFIG_IIO=m
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_BUFFER_CB=y
+CONFIG_IIO_KFIFO_BUF=m
+CONFIG_IIO_TRIGGERED_BUFFER=m
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+
+#
+# Accelerometers
+#
+# CONFIG_BMA180 is not set
+# CONFIG_BMC150_ACCEL is not set
+CONFIG_HID_SENSOR_ACCEL_3D=m
+CONFIG_IIO_ST_ACCEL_3AXIS=m
+CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m
+# CONFIG_MMA8452 is not set
+# CONFIG_KXCJK1013 is not set
+# CONFIG_MMA9551 is not set
+# CONFIG_MMA9553 is not set
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7291 is not set
+# CONFIG_AD799X is not set
+# CONFIG_CC10001_ADC is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_MCP3422 is not set
+# CONFIG_NAU7802 is not set
+# CONFIG_TI_ADC081C is not set
+# CONFIG_VF610_ADC is not set
+# CONFIG_VIPERBOARD_ADC is not set
+
+#
+# Amplifiers
+#
+
+#
+# Hid Sensor IIO Common
+#
+CONFIG_HID_SENSOR_IIO_COMMON=m
+CONFIG_HID_SENSOR_IIO_TRIGGER=m
+
+#
+# SSP Sensor Common
+#
+CONFIG_IIO_ST_SENSORS_I2C=m
+CONFIG_IIO_ST_SENSORS_CORE=m
+
+#
+# Digital to analog converters
+#
+# CONFIG_AD5064 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5446 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MAX5821 is not set
+# CONFIG_MCP4725 is not set
+
+#
+# Frequency Synthesizers DDS/PLL
+#
+
+#
+# Clock Generator/Distribution
+#
+
+#
+# Phase-Locked Loop (PLL) frequency synthesizers
+#
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_BMG160 is not set
+CONFIG_HID_SENSOR_GYRO_3D=m
+CONFIG_IIO_ST_GYRO_3AXIS=m
+CONFIG_IIO_ST_GYRO_I2C_3AXIS=m
+# CONFIG_ITG3200 is not set
+
+#
+# Humidity sensors
+#
+# CONFIG_DHT11 is not set
+# CONFIG_SI7005 is not set
+# CONFIG_SI7020 is not set
+
+#
+# Inertial measurement units
+#
+# CONFIG_KMX61 is not set
+# CONFIG_INV_MPU6050_IIO is not set
+
+#
+# Light sensors
+#
+# CONFIG_ADJD_S311 is not set
+# CONFIG_AL3320A is not set
+# CONFIG_APDS9300 is not set
+# CONFIG_CM32181 is not set
+# CONFIG_CM3232 is not set
+# CONFIG_CM3323 is not set
+# CONFIG_CM36651 is not set
+# CONFIG_GP2AP020A00F is not set
+# CONFIG_ISL29125 is not set
+CONFIG_HID_SENSOR_ALS=m
+# CONFIG_HID_SENSOR_PROX is not set
+# CONFIG_JSA1212 is not set
+# CONFIG_LTR501 is not set
+# CONFIG_TCS3414 is not set
+# CONFIG_TCS3472 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_TSL4531 is not set
+# CONFIG_VCNL4000 is not set
+
+#
+# Magnetometer sensors
+#
+# CONFIG_AK8975 is not set
+# CONFIG_AK09911 is not set
+# CONFIG_MAG3110 is not set
+CONFIG_HID_SENSOR_MAGNETOMETER_3D=m
+CONFIG_IIO_ST_MAGN_3AXIS=m
+CONFIG_IIO_ST_MAGN_I2C_3AXIS=m
+
+#
+# Inclinometer sensors
+#
+CONFIG_HID_SENSOR_INCLINOMETER_3D=m
+CONFIG_HID_SENSOR_DEVICE_ROTATION=m
+
+#
+# Triggers - standalone
+#
+CONFIG_IIO_INTERRUPT_TRIGGER=m
+CONFIG_IIO_SYSFS_TRIGGER=m
+
+#
+# Pressure sensors
+#
+# CONFIG_BMP280 is not set
+# CONFIG_HID_SENSOR_PRESS is not set
+# CONFIG_MPL115 is not set
+# CONFIG_MPL3115 is not set
+# CONFIG_MS5611 is not set
+# CONFIG_IIO_ST_PRESS is not set
+# CONFIG_T5403 is not set
+
+#
+# Lightning sensors
+#
+
+#
+# Proximity sensors
+#
+# CONFIG_SX9500 is not set
+
+#
+# Temperature sensors
+#
+# CONFIG_MLX90614 is not set
+# CONFIG_TMP006 is not set
+# CONFIG_VME_BUS is not set
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+# CONFIG_PWM_FSL_FTM is not set
+# CONFIG_PWM_PCA9685 is not set
+CONFIG_IRQCHIP=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_V2M=y
+CONFIG_ARM_GIC_V3=y
+CONFIG_ARM_GIC_V3_ITS=y
+# CONFIG_IPACK_BUS is not set
+CONFIG_RESET_CONTROLLER=y
+CONFIG_FMC=m
+CONFIG_FMC_FAKEDEV=m
+CONFIG_FMC_TRIVIAL=m
+CONFIG_FMC_WRITE_EEPROM=m
+CONFIG_FMC_CHARDEV=m
+
+#
+# PHY Subsystem
+#
+CONFIG_GENERIC_PHY=y
+# CONFIG_BCM_KONA_USB2_PHY is not set
+CONFIG_PHY_XGENE=y
+# CONFIG_POWERCAP is not set
+# CONFIG_MCB is not set
+CONFIG_RAS=y
+# CONFIG_THUNDERBOLT is not set
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+
+#
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+CONFIG_DMIID=y
+# CONFIG_DMI_SYSFS is not set
+
+#
+# EFI (Extensible Firmware Interface) Support
+#
+# CONFIG_EFI_VARS is not set
+CONFIG_EFI_PARAMS_FROM_FDT=y
+CONFIG_EFI_RUNTIME_WRAPPERS=y
+CONFIG_EFI_ARMSTUB=y
+# CONFIG_ACPI is not set
+
+#
+# File systems
+#
+CONFIG_DCACHE_WORD_ACCESS=y
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_USE_FOR_EXT23=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_ENCRYPTION is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+CONFIG_JFS_FS=y
+CONFIG_JFS_POSIX_ACL=y
+CONFIG_JFS_SECURITY=y
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
+# CONFIG_XFS_FS is not set
+CONFIG_GFS2_FS=m
+CONFIG_GFS2_FS_LOCKING_DLM=y
+# CONFIG_OCFS2_FS is not set
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
+# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
+# CONFIG_BTRFS_DEBUG is not set
+# CONFIG_BTRFS_ASSERT is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_F2FS_FS is not set
+# CONFIG_FS_DAX is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QUOTA_DEBUG is not set
+CONFIG_QUOTA_TREE=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+# CONFIG_CUSE is not set
+# CONFIG_OVERLAY_FS is not set
+
+#
+# Caches
+#
+CONFIG_FSCACHE=m
+CONFIG_FSCACHE_STATS=y
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_DEBUG is not set
+CONFIG_FSCACHE_OBJECT_LIST=y
+CONFIG_CACHEFILES=m
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+# CONFIG_VFAT_FS_NO_DUALNAMES is not set
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
+# CONFIG_VFAT_NO_CREATE_WITH_LONGNAMES is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_KERNFS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+CONFIG_ECRYPT_FS=m
+# CONFIG_ECRYPT_FS_MESSAGING is not set
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+# CONFIG_HFSPLUS_FS_POSIX_ACL is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_YAFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_UBIFS_FS=m
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS_FILE_CACHE=y
+# CONFIG_SQUASHFS_FILE_DIRECT is not set
+CONFIG_SQUASHFS_DECOMP_SINGLE=y
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_ZLIB=y
+# CONFIG_SQUASHFS_LZ4 is not set
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=m
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+CONFIG_ROMFS_FS=m
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+CONFIG_PSTORE=y
+# CONFIG_PSTORE_CONSOLE is not set
+# CONFIG_PSTORE_PMSG is not set
+# CONFIG_PSTORE_FTRACE is not set
+CONFIG_PSTORE_RAM=m
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_EXOFS_FS is not set
+# CONFIG_AUFS_FS is not set
+CONFIG_ORE=m
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V2 is not set
+CONFIG_NFS_DEF_FILE_IO_SIZE=4096
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_SWAP=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_PNFS_BLOCK=y
+CONFIG_PNFS_OBJLAYOUT=m
+CONFIG_PNFS_FLEXFILE_LAYOUT=m
+CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
+# CONFIG_NFS_V4_1_MIGRATION is not set
+CONFIG_NFS_V4_SECURITY_LABEL=y
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+CONFIG_NFS_DEBUG=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+# CONFIG_NFSD_PNFS is not set
+CONFIG_NFSD_V4_SECURITY_LABEL=y
+# CONFIG_NFSD_FAULT_INJECTION is not set
+CONFIG_GRACE_PERIOD=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_SUNRPC_BACKCHANNEL=y
+CONFIG_SUNRPC_SWAP=y
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_SUNRPC_DEBUG=y
+CONFIG_CEPH_FS=m
+CONFIG_CEPH_FSCACHE=y
+CONFIG_CEPH_FS_POSIX_ACL=y
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_UPCALL=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+CONFIG_CIFS_ACL=y
+CONFIG_CIFS_DEBUG=y
+# CONFIG_CIFS_DEBUG2 is not set
+CONFIG_CIFS_DFS_UPCALL=y
+CONFIG_CIFS_SMB2=y
+CONFIG_CIFS_FSCACHE=y
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_9P_FS=y
+CONFIG_9P_FS_POSIX_ACL=y
+CONFIG_9P_FS_SECURITY=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_MAC_ROMAN=m
+CONFIG_NLS_MAC_CELTIC=m
+CONFIG_NLS_MAC_CENTEURO=m
+CONFIG_NLS_MAC_CROATIAN=m
+CONFIG_NLS_MAC_CYRILLIC=m
+CONFIG_NLS_MAC_GAELIC=m
+CONFIG_NLS_MAC_GREEK=m
+CONFIG_NLS_MAC_ICELAND=m
+CONFIG_NLS_MAC_INUIT=m
+CONFIG_NLS_MAC_ROMANIAN=m
+CONFIG_NLS_MAC_TURKISH=m
+CONFIG_NLS_UTF8=m
+CONFIG_DLM=m
+CONFIG_DLM_DEBUG=y
+CONFIG_HAVE_KVM_IRQFD=y
+CONFIG_HAVE_KVM_EVENTFD=y
+CONFIG_KVM_MMIO=y
+CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y
+CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
+CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
+CONFIG_KVM_COMPAT=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_KVM_ARM_HOST=y
+CONFIG_KVM_ARM_MAX_VCPUS=8
+
+#
+# Kernel hacking
+#
+
+#
+# printk and dmesg options
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_DYNAMIC_DEBUG=y
+
+#
+# Compile-time checks and compiler options
+#
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_INFO_SPLIT is not set
+# CONFIG_DEBUG_INFO_DWARF4 is not set
+# CONFIG_GDB_SCRIPTS is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_READABLE_ASM is not set
+CONFIG_UNUSED_SYMBOLS=y
+# CONFIG_PAGE_OWNER is not set
+CONFIG_DEBUG_FS=y
+CONFIG_HEADERS_CHECK=y
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x0
+CONFIG_DEBUG_KERNEL=y
+
+#
+# Memory Debugging
+#
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_VM=y
+# CONFIG_DEBUG_VM_VMACACHE is not set
+# CONFIG_DEBUG_VM_RB is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_DEBUG_SHIRQ=y
+
+#
+# Debug Lockups and Hangs
+#
+CONFIG_LOCKUP_DETECTOR=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_SCHED_STACK_END_CHECK is not set
+# CONFIG_DEBUG_TIMEKEEPING is not set
+CONFIG_TIMER_STATS=y
+
+#
+# Lock Debugging (spinlocks, mutexes, etc...)
+#
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_LOCK_TORTURE_TEST is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_HAVE_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_LIST=y
+# CONFIG_DEBUG_PI_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_PROVE_RCU is not set
+CONFIG_SPARSE_RCU_POINTER=y
+# CONFIG_TORTURE_TEST is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_RCU_CPU_STALL_INFO is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACER_MAX_TRACE=y
+CONFIG_TRACE_CLOCK=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_TRACING=y
+CONFIG_GENERIC_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+CONFIG_FUNCTION_TRACER=y
+# CONFIG_FUNCTION_GRAPH_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+CONFIG_SCHED_TRACER=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_TRACER_SNAPSHOT=y
+# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+CONFIG_STACK_TRACER=y
+CONFIG_BLK_DEV_IO_TRACE=y
+# CONFIG_PROBE_EVENTS is not set
+CONFIG_DYNAMIC_FTRACE=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_FTRACE_MCOUNT_RECORD=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_TRACEPOINT_BENCHMARK is not set
+CONFIG_RING_BUFFER_BENCHMARK=m
+# CONFIG_RING_BUFFER_STARTUP_TEST is not set
+# CONFIG_TRACE_ENUM_MAP_FILE is not set
+
+#
+# Runtime Testing
+#
+# CONFIG_LKDTM is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_PERCPU_TEST is not set
+CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_ASYNC_RAID6_TEST=m
+# CONFIG_TEST_HEXDUMP is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+CONFIG_TEST_KSTRTOX=y
+# CONFIG_TEST_RHASHTABLE is not set
+CONFIG_BUILD_DOCSRC=y
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_TEST_LKM is not set
+# CONFIG_TEST_USER_COPY is not set
+# CONFIG_TEST_BPF is not set
+# CONFIG_TEST_FIRMWARE is not set
+# CONFIG_TEST_UDELAY is not set
+# CONFIG_MEMTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_KGDB=y
+CONFIG_KGDB_SERIAL_CONSOLE=y
+CONFIG_KGDB_TESTS=y
+# CONFIG_KGDB_TESTS_ON_BOOT is not set
+CONFIG_KGDB_KDB=y
+CONFIG_KDB_DEFAULT_ENABLE=0x1
+CONFIG_KDB_KEYBOARD=y
+CONFIG_KDB_CONTINUE_CATASTROPHIC=0
+# CONFIG_ARM64_PTDUMP is not set
+CONFIG_STRICT_DEVMEM=y
+# CONFIG_PID_IN_CONTEXTIDR is not set
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+# CONFIG_DEBUG_SET_MODULE_RONX is not set
+# CONFIG_DEBUG_RODATA is not set
+# CONFIG_CORESIGHT is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+CONFIG_PERSISTENT_KEYRINGS=y
+CONFIG_BIG_KEYS=y
+CONFIG_TRUSTED_KEYS=m
+CONFIG_ENCRYPTED_KEYS=m
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_NETWORK_XFRM=y
+# CONFIG_SECURITY_PATH is not set
+CONFIG_LSM_MMAP_MIN_ADDR=65536
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
+CONFIG_SECURITY_SELINUX_DISABLE=y
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_SECURITY_APPARMOR is not set
+# CONFIG_SECURITY_YAMA is not set
+CONFIG_INTEGRITY=y
+# CONFIG_INTEGRITY_SIGNATURE is not set
+CONFIG_INTEGRITY_AUDIT=y
+# CONFIG_IMA is not set
+# CONFIG_EVM is not set
+CONFIG_DEFAULT_SECURITY_SELINUX=y
+# CONFIG_DEFAULT_SECURITY_DAC is not set
+CONFIG_DEFAULT_SECURITY="selinux"
+CONFIG_XOR_BLOCKS=m
+CONFIG_ASYNC_CORE=m
+CONFIG_ASYNC_MEMCPY=m
+CONFIG_ASYNC_XOR=m
+CONFIG_ASYNC_PQ=m
+CONFIG_ASYNC_RAID6_RECOV=m
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=m
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_USER=m
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_PCRYPT=m
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_CRYPTD=m
+# CONFIG_CRYPTO_MCRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_ABLK_HELPER=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_CMAC=m
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_CRC32=m
+CONFIG_CRYPTO_CRCT10DIF=y
+CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_BLOWFISH_COMMON=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST_COMMON=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_ZLIB=m
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_LZ4=m
+CONFIG_CRYPTO_LZ4HC=m
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=m
+# CONFIG_CRYPTO_DRBG_MENU is not set
+CONFIG_CRYPTO_USER_API=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+# CONFIG_CRYPTO_USER_API_RNG is not set
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_CCP=y
+CONFIG_CRYPTO_DEV_CCP_DD=m
+CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=m
+CONFIG_CRYPTO_SHA2_ARM64_CE=m
+CONFIG_CRYPTO_GHASH_ARM64_CE=m
+CONFIG_CRYPTO_AES_ARM64_CE=m
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=m
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=m
+CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m
+# CONFIG_CRYPTO_CRC32_ARM64 is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_RAID6_PQ=m
+CONFIG_BITREVERSE=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_NET_UTILS=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_CRC8=m
+CONFIG_AUDIT_GENERIC=y
+CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+CONFIG_AUDIT_COMPAT_GENERIC=y
+# CONFIG_RANDOM32_SELFTEST is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_LZ4_COMPRESS=m
+CONFIG_LZ4HC_COMPRESS=m
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_DECOMPRESS_LZ4=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_ENC8=y
+CONFIG_REED_SOLOMON_DEC8=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_BTREE=y
+CONFIG_INTERVAL_TREE=y
+CONFIG_ASSOCIATIVE_ARRAY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAS_DMA=y
+CONFIG_CHECK_SIGNATURE=y
+CONFIG_CPU_RMAP=y
+CONFIG_DQL=y
+CONFIG_GLOB=y
+# CONFIG_GLOB_SELFTEST is not set
+CONFIG_NLATTR=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_LRU_CACHE=m
+CONFIG_AVERAGE=y
+CONFIG_CORDIC=m
+# CONFIG_DDR is not set
+CONFIG_LIBFDT=y
+CONFIG_OID_REGISTRY=y
+CONFIG_UCS2_STRING=y
+CONFIG_FONT_SUPPORT=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_ARCH_HAS_SG_CHAIN=y
diff --git a/meta-seattle/recipes-kernel/linux/linux-seattle.inc b/meta-seattle/recipes-kernel/linux/linux-seattle.inc
new file mode 100644
index 00000000..399c7ffd
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/linux-seattle.inc
@@ -0,0 +1,21 @@
+DESCRIPTION = "Linux Kernel"
+SECTION = "kernel"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7"
+
+require recipes-kernel/linux/linux-yocto.inc
+KERNEL_EXTRA_ARGS += "dtbs"
+
+S = "${WORKDIR}/git"
+
+DEPENDS += "libgcc"
+
+MACHINE_KERNEL_PR_append = "b+gitr${SRCPV}"
+PR = "${MACHINE_KERNEL_PR}"
+
+COMPATIBLE_MACHINE = "seattle*"
+
+do_deploy_append() {
+ install -m 0644 ${B}/arch/arm64/boot/dts/amd/amd-overdrive.dtb ${DEPLOYDIR}/${KERNEL_IMAGE_BASE_NAME}.dtb
+}
+
diff --git a/meta-seattle/recipes-kernel/linux/linux-seattle_3.19.bb b/meta-seattle/recipes-kernel/linux/linux-seattle_3.19.bb
new file mode 100644
index 00000000..3cb9fed1
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/linux-seattle_3.19.bb
@@ -0,0 +1,18 @@
+DESCRIPTION = "Linux kernel with BigEndian support for Seattle SoC, AMD 64bit ARMv8 Cortex-A57"
+
+require linux-seattle.inc
+
+SRCREV = "e152349de59b43b2a75f2c332b44171df461d5a0"
+SRC_URI = "git://git.yoctoproject.org/linux-yocto-3.19;branch="standard/qemuarm64" \
+ file://01-arm64-boot-BE-kernels-from-UEFI.patch \
+ file://02-319-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch \
+ file://03-arm64-don-t-set-READ_IMPLIES_EXEC-for-EM_AARCH64-ELF.patch \
+ file://319-Update-xgbe-drivers-for-B0-board.patch \
+ file://defconfig \
+ "
+SRC_URI_append_seattle-be = "file://bigendian.cfg \
+ "
+
+INSANE_SKIP_${PN} += "installed-vs-shipped"
+INSANE_SKIP_kernel-dev += "debug-files"
+INSANE_SKIP_kernel-dev += "arch"
diff --git a/meta-seattle/recipes-kernel/linux/linux-seattle_4.1.bb b/meta-seattle/recipes-kernel/linux/linux-seattle_4.1.bb
new file mode 100644
index 00000000..5fd09201
--- /dev/null
+++ b/meta-seattle/recipes-kernel/linux/linux-seattle_4.1.bb
@@ -0,0 +1,19 @@
+DESCRIPTION = "Linux kernel for AMD Seattle ARMv8 Cortex-A57"
+
+require linux-seattle.inc
+
+SRCREV = "4e30e64c44df9e59bd13239951bb8d2b5b276e6f"
+SRC_URI = "git://git.yoctoproject.org/linux-yocto-4.1;branch="standard/qemuarm64" \
+ file://02-412-Enable-32-bit-EL0-with-64K-and-4K-page-s.patch \
+ file://03-arm64-don-t-set-READ_IMPLIES_EXEC-for-EM_AARCH64-ELF.patch \
+ file://412-1-styx-linux-tracking.git-2a3f98071e81b66033f6272f6c632023d1dcb1d2.patch \
+ file://412-2-styx-linux-tracking.git-390adff766de2d7117ec666674d114dfd5b5a911.patch \
+ file://412-3-styx-linux-tracking.git-427c918b150e5f9c25ea36b3d640e511a08abb5f.patch \
+ file://412-4-styx-linux-tracking.git-d1072e3d950aa6e348313a31395091003611f794.patch \
+ file://412-5-styx-linux-tracking.git-2a80b31ff435cd274a61d685a4861bf0da461c90.patch \
+ file://412-6-styx-linux-tracking.git-1c9b07fb461d87b41854fef3a07fff65e0d95113.patch \
+ file://412-7-styx-linux-tracking.git-f9a9d954f23b967cd26338afda9a0a96afe62c25.patch \
+ file://412-styx-Fix-build-issues-after-porting-PCI-patches-to-4.1.2-.patch \
+ file://defconfig \
+ "
+