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authorArsalan H. Awan <Arsalan_Awan@mentor.com>2019-08-28 14:52:21 +0500
committerArsalan H. Awan <Arsalan_Awan@mentor.com>2019-08-28 15:24:40 +0500
commitcc5953c3a2f348543ed44492244627ee0de76239 (patch)
tree23430cd57f73086e7176e8be4375e5ad3b4079c0 /meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0814-drm-amd-amdgpu-DGMA-remove-get_node-for-DGMA-import-.patch
parent4149413febf799293758015e230e0ce865ed9cb5 (diff)
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common: rename to meta-amd-bsp
This renames common layers to meta-amd-bsp as it is going to hold all the bsps in it in the following commits. This also changes the layer title in layer.conf from "amd" to "amd-bsp" Signed-off-by: Arsalan H. Awan <Arsalan_Awan@mentor.com>
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0814-drm-amd-amdgpu-DGMA-remove-get_node-for-DGMA-import-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0814-drm-amd-amdgpu-DGMA-remove-get_node-for-DGMA-import-.patch142
1 files changed, 142 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0814-drm-amd-amdgpu-DGMA-remove-get_node-for-DGMA-import-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0814-drm-amd-amdgpu-DGMA-remove-get_node-for-DGMA-import-.patch
new file mode 100644
index 00000000..34c38808
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0814-drm-amd-amdgpu-DGMA-remove-get_node-for-DGMA-import-.patch
@@ -0,0 +1,142 @@
+From 435ea4dac38f4ff3adaaa91862c3efeecfa84006 Mon Sep 17 00:00:00 2001
+From: Roger He <Hongbo.He@amd.com>
+Date: Tue, 1 Aug 2017 10:59:24 +0800
+Subject: [PATCH 0814/4131] drm/amd/amdgpu: [DGMA] remove get_node for DGMA
+ import domain
+
+Change-Id: Ib5ec7713ce06bbed6b9957b0d1ecf5f1e4d14dc2
+Reviewed-by: Flora Cui <Flora.Cui@amd.com>
+Signed-off-by: Roger He <Hongbo.He@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 1 +
+ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 26 +++++---------------------
+ 4 files changed, 8 insertions(+), 22 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+index 729f7da..e7ffabe 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+@@ -1414,7 +1414,6 @@ struct amdgpu_direct_gma {
+ struct amdgpu_bo *dgma_bo;
+ atomic64_t vram_usage;
+ /* reserved in gart */
+- struct ttm_mem_reg gart_mem;
+ atomic64_t gart_usage;
+ };
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+index 9048ae4..4709fdc 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -1118,6 +1118,8 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
+ amdgpu_vram_page_split);
+ amdgpu_vram_page_split = 1024;
+ }
++ /* Max DGMA size is 96M Bytes */
++ amdgpu_direct_gma_size = min(amdgpu_direct_gma_size, 96);
+ }
+
+ /**
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+index 67f1e3e..d514840 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -1072,6 +1072,7 @@ u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
+ WARN_ON_ONCE(bo->tbo.mem.start == AMDGPU_BO_INVALID_OFFSET);
+ WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_VRAM &&
+ !(bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS));
++ WARN_ON_ONCE(bo->tbo.mem.mem_type == AMDGPU_PL_DGMA_IMPORT);
+
+ return bo->tbo.offset;
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+index f017951..1c76f9e 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+@@ -195,8 +195,8 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
+ case AMDGPU_PL_DGMA_IMPORT:
+ /* reserved GTT space for direct GMA */
+ man->func = &ttm_bo_manager_func;
+- man->gpu_offset = bdev->man[TTM_PL_TT].gpu_offset +
+- (adev->direct_gma.gart_mem.start << PAGE_SHIFT);
++ /* meaningless for this domain */
++ man->gpu_offset = AMDGPU_BO_INVALID_OFFSET;
+ man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE;
+ man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
+ man->default_caching = TTM_PL_FLAG_WC;
+@@ -1231,18 +1231,12 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
+ .access_memory = &amdgpu_ttm_access_memory
+ };
+
+-#define AMDGPU_DIRECT_GMA_SIZE_MAX 96
+ static int amdgpu_direct_gma_init(struct amdgpu_device *adev)
+ {
+- struct ttm_mem_type_manager *man = &adev->mman.bdev.man[TTM_PL_TT];
+- struct ttm_mem_reg *mem = &adev->direct_gma.gart_mem;
+ struct amdgpu_bo *abo;
+- struct ttm_buffer_object gtt_bo;
+- struct ttm_place place = {0};
+ unsigned long size;
+ int r;
+
+- amdgpu_direct_gma_size = min(amdgpu_direct_gma_size, AMDGPU_DIRECT_GMA_SIZE_MAX);
+ if (amdgpu_direct_gma_size == 0)
+ return 0;
+
+@@ -1267,16 +1261,7 @@ static int amdgpu_direct_gma_init(struct amdgpu_device *adev)
+ adev->direct_gma.dgma_bo = abo;
+
+ /* reserve in gtt */
+- mem->size = size;
+- mem->mem_type = TTM_PL_TT;
+- mem->num_pages = size >> PAGE_SHIFT;
+- mem->page_alignment = PAGE_SIZE;
+- r = (*man->func->get_node)(man, &gtt_bo, &place, mem);
+- if (unlikely(r))
+- goto error_free;
+-
+ adev->gart_pin_size += size;
+-
+ r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_DGMA, size >> PAGE_SHIFT);
+ if (unlikely(r))
+ goto error_put_node;
+@@ -1292,7 +1277,6 @@ static int amdgpu_direct_gma_init(struct amdgpu_device *adev)
+ ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_DGMA);
+
+ error_put_node:
+- (*man->func->put_node)(man, &adev->direct_gma.gart_mem);
+ adev->gart_pin_size -= size;
+
+ error_free:
+@@ -1307,7 +1291,6 @@ static int amdgpu_direct_gma_init(struct amdgpu_device *adev)
+
+ static void amdgpu_direct_gma_fini(struct amdgpu_device *adev)
+ {
+- struct ttm_mem_type_manager *man = &adev->mman.bdev.man[TTM_PL_TT];
+ int r;
+
+ if (amdgpu_direct_gma_size == 0)
+@@ -1322,8 +1305,6 @@ static void amdgpu_direct_gma_fini(struct amdgpu_device *adev)
+ amdgpu_bo_unreserve(adev->direct_gma.dgma_bo);
+ }
+ amdgpu_bo_unref(&adev->direct_gma.dgma_bo);
+-
+- (*man->func->put_node)(man, &adev->direct_gma.gart_mem);
+ adev->gart_pin_size -= (u64)amdgpu_direct_gma_size << 20;
+ }
+
+@@ -1456,6 +1437,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
+ adev->mc.mc_vram_size);
+ else
+ gtt_size = (uint64_t)amdgpu_gtt_size << 20;
++
++ /* reserve for DGMA import domain */
++ gtt_size -= (uint64_t)amdgpu_direct_gma_size << 20;
+ r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_TT, gtt_size >> PAGE_SHIFT);
+ if (r) {
+ DRM_ERROR("Failed initializing GTT heap.\n");
+--
+2.7.4
+