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authorAwais Belal <awais_belal@mentor.com>2019-01-02 17:25:35 +0500
committerAwais Belal <awais_belal@mentor.com>2019-01-02 17:25:37 +0500
commit58457e4de560e77da8e7f06acdc84c5a160c15f9 (patch)
tree1bfb503aa183a4c612bcf75ea5e35e6d2a5aef30 /common/recipes-kernel
parent6fd087be4692bdab2821716745c4f8dd9e589a1f (diff)
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linux-yocto: update eMMC patches for the common layer
The earlier patchset is not as stable and we've seen issues with it on different revisions of the v1000 target hardware. Signed-off-by: Awais Belal <awais_belal@mentor.com>
Diffstat (limited to 'common/recipes-kernel')
-rwxr-xr-x[-rw-r--r--]common/recipes-kernel/linux/linux-yocto-4.14.71/0093-check-pci-dev-before-getting-pci-alias.patch (renamed from common/recipes-kernel/linux/linux-yocto-4.14.71/4096-check-pci-dev-before-getting-pci-alias.patch)4
-rwxr-xr-xcommon/recipes-kernel/linux/linux-yocto-4.14.71/0094-mmc-sdhci-acpi-Add-support-for-ACPI-HID-of-AMD-Contr.patch125
-rwxr-xr-xcommon/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch219
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/0853-AMD-eMMC-5.0-support.patch270
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/amd-emmc-patches.scc5
5 files changed, 349 insertions, 274 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4096-check-pci-dev-before-getting-pci-alias.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0093-check-pci-dev-before-getting-pci-alias.patch
index e65721b2..9890a61c 100644..100755
--- a/common/recipes-kernel/linux/linux-yocto-4.14.71/4096-check-pci-dev-before-getting-pci-alias.patch
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0093-check-pci-dev-before-getting-pci-alias.patch
@@ -1,7 +1,7 @@
-From a78cf1d41c3a7078af39e96c9033c5900dd77513 Mon Sep 17 00:00:00 2001
+From 1bca08eb860a16e2679655918bd36f21fa213422 Mon Sep 17 00:00:00 2001
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Date: Thu, 26 Apr 2018 23:31:29 -0500
-Subject: [PATCH 4096/4131] check pci dev before getting pci alias
+Subject: [PATCH 93/95] check pci dev before getting pci alias
Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
---
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0094-mmc-sdhci-acpi-Add-support-for-ACPI-HID-of-AMD-Contr.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0094-mmc-sdhci-acpi-Add-support-for-ACPI-HID-of-AMD-Contr.patch
new file mode 100755
index 00000000..3cd99eaf
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0094-mmc-sdhci-acpi-Add-support-for-ACPI-HID-of-AMD-Contr.patch
@@ -0,0 +1,125 @@
+From 047b0e5412203f56a29d0c450e8e5523f566233e Mon Sep 17 00:00:00 2001
+From: Shah Nehal-Bakulchandra <Nehal-bakulchandra.Shah@amd.com>
+Date: Fri, 1 Dec 2017 15:38:52 +0530
+Subject: [PATCH 94/95] mmc: sdhci-acpi: Add support for ACPI HID of AMD
+ Controller with HS400
+
+This patch supports HS400 for AMD upcoming emmc 5.0 controller.The
+HS400 and HS200 mode requires hardware work around also. This patch
+adds the quirks for the same.
+
+Signed-off-by: Nehal-bakulchandra Shah <Nehal-bakulchandra.Shah@amd.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
+---
+ drivers/mmc/host/sdhci-acpi.c | 79 +++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 79 insertions(+)
+
+diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
+index 08ae0ff..c2e7048 100644
+--- a/drivers/mmc/host/sdhci-acpi.c
++++ b/drivers/mmc/host/sdhci-acpi.c
+@@ -367,6 +367,83 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
+ .caps = MMC_CAP_NONREMOVABLE,
+ };
+
++/* AMD sdhci reset dll register. */
++#define SDHCI_AMD_RESET_DLL_REGISTER 0x908
++
++static int amd_select_drive_strength(struct mmc_card *card,
++ unsigned int max_dtr, int host_drv,
++ int card_drv, int *drv_type)
++{
++ return MMC_SET_DRIVER_TYPE_A;
++}
++
++static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
++{
++ /* AMD Platform requires dll setting */
++ sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
++ usleep_range(10, 20);
++ sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
++}
++
++/*
++ * For AMD Platform it is required to disable the tuning
++ * bit first controller to bring to HS Mode from HS200
++ * mode, later enable to tune to HS400 mode.
++ */
++static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++ struct sdhci_host *host = mmc_priv(mmc);
++ unsigned int old_timing = host->timing;
++
++ sdhci_set_ios(mmc, ios);
++ if (old_timing == MMC_TIMING_MMC_HS200 &&
++ ios->timing == MMC_TIMING_MMC_HS)
++ sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
++ if (old_timing != MMC_TIMING_MMC_HS400 &&
++ ios->timing == MMC_TIMING_MMC_HS400) {
++ sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
++ sdhci_acpi_amd_hs400_dll(host);
++ }
++}
++
++static const struct sdhci_ops sdhci_acpi_ops_amd = {
++ .set_clock = sdhci_set_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
++};
++
++static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
++ .ops = &sdhci_acpi_ops_amd,
++};
++
++static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
++ const char *hid, const char *uid)
++{
++ struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
++ struct sdhci_host *host = c->host;
++
++ sdhci_read_caps(host);
++ if (host->caps1 & SDHCI_SUPPORT_DDR50)
++ host->mmc->caps = MMC_CAP_1_8V_DDR;
++
++ if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
++ (host->mmc->caps & MMC_CAP_1_8V_DDR))
++ host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
++
++ host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
++ host->mmc_host_ops.set_ios = amd_set_ios;
++ return 0;
++}
++
++static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
++ .chip = &sdhci_acpi_chip_amd,
++ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
++ .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
++ SDHCI_QUIRK_32BIT_ADMA_SIZE,
++ .probe_slot = sdhci_acpi_emmc_amd_probe_slot,
++};
++
+ struct sdhci_acpi_uid_slot {
+ const char *hid;
+ const char *uid;
+@@ -390,6 +467,7 @@ static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
+ { "PNP0D40" },
+ { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
+ { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
++ { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
+ { },
+ };
+
+@@ -406,6 +484,7 @@ static const struct acpi_device_id sdhci_acpi_ids[] = {
+ { "PNP0D40" },
+ { "QCOM8051" },
+ { "QCOM8052" },
++ { "AMDI0040" },
+ { },
+ };
+ MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
+--
+2.7.4
+
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch
new file mode 100755
index 00000000..9278cd7e
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/0095-eMMC-patch-4.14.48.patch
@@ -0,0 +1,219 @@
+From 83800ff77e4b8d8946ed9d33229e57cb3fc58cbc Mon Sep 17 00:00:00 2001
+From: Sudheesh Mavila <sudheesh.mavila@amd.com>
+Date: Thu, 16 Aug 2018 22:52:11 +0530
+Subject: [PATCH 95/95] eMMC patch 4.14.48
+
+Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
+---
+ drivers/acpi/resource.c | 5 +++++
+ drivers/mmc/core/mmc.c | 25 +++++++++++++++----------
+ drivers/mmc/host/sdhci-acpi.c | 2 ++
+ drivers/mmc/host/sdhci.c | 21 +++++++++++++++++++++
+ drivers/mmc/host/sdhci.h | 2 ++
+ include/linux/mmc/host.h | 1 +
+ 6 files changed, 46 insertions(+), 10 deletions(-)
+ mode change 100644 => 100755 drivers/acpi/resource.c
+ mode change 100644 => 100755 drivers/mmc/core/mmc.c
+ mode change 100644 => 100755 drivers/mmc/host/sdhci-acpi.c
+ mode change 100644 => 100755 drivers/mmc/host/sdhci.c
+ mode change 100644 => 100755 drivers/mmc/host/sdhci.h
+ mode change 100644 => 100755 include/linux/mmc/host.h
+
+diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c
+old mode 100644
+new mode 100755
+index d85e010..e82b5a7
+--- a/drivers/acpi/resource.c
++++ b/drivers/acpi/resource.c
+@@ -425,6 +425,11 @@ static void acpi_dev_get_irqresource(struct resource *res, u32 gsi,
+ triggering = trig;
+ polarity = pol;
+ }
++ if (gsi == 5) {
++ polarity = ACPI_ACTIVE_LOW;
++ pr_warning("ACPI: IRQ %d do not override to %s, %s\n", gsi,
++ t ? "level" : "edge", p ? "low" : "high");
++ }
+ }
+
+ res->flags = acpi_dev_irq_flags(triggering, polarity, shareable);
+diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
+old mode 100644
+new mode 100755
+index bad5c1b..29bba1e
+--- a/drivers/mmc/core/mmc.c
++++ b/drivers/mmc/core/mmc.c
+@@ -1161,14 +1161,14 @@ static int mmc_select_hs400(struct mmc_card *card)
+ mmc_hostname(host), err);
+ return err;
+ }
+-
+- /* Set host controller to HS timing */
+- mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
+-
+- /* Reduce frequency to HS frequency */
+- max_dtr = card->ext_csd.hs_max_dtr;
+- mmc_set_clock(host, max_dtr);
+-
++ /*In AMD Platform due to hardware ip issue this fails*/
++ if (!host->ops->set_hs400_dll) {
++ /* Set host controller to HS timing */
++ mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
++ /* Reduce frequency to HS frequency */
++ max_dtr = card->ext_csd.hs_max_dtr;
++ mmc_set_clock(host, max_dtr);
++ }
+ err = mmc_switch_status(card);
+ if (err)
+ goto out_err;
+@@ -1204,7 +1204,8 @@ static int mmc_select_hs400(struct mmc_card *card)
+ err = mmc_switch_status(card);
+ if (err)
+ goto out_err;
+-
++ if (host->ops->set_hs400_dll)
++ host->ops->set_hs400_dll(host);
+ return 0;
+
+ out_err:
+@@ -1227,6 +1228,7 @@ int mmc_hs400_to_hs200(struct mmc_card *card)
+
+ /* Reduce frequency to HS */
+ max_dtr = card->ext_csd.hs_max_dtr;
++ if (!host->ops->set_hs400_dll)
+ mmc_set_clock(host, max_dtr);
+
+ /* Switch HS400 to HS DDR */
+@@ -1236,12 +1238,15 @@ int mmc_hs400_to_hs200(struct mmc_card *card)
+ true, false, true);
+ if (err)
+ goto out_err;
+-
++ /*In AMD Platform due to hardware ip issue this fails*/
++ if (!host->ops->set_hs400_dll)
++ {
+ mmc_set_timing(host, MMC_TIMING_MMC_DDR52);
+
+ err = mmc_switch_status(card);
+ if (err)
+ goto out_err;
++ }
+
+ /* Switch HS DDR to HS */
+ err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
+diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
+old mode 100644
+new mode 100755
+index c2e7048..33592a6
+--- a/drivers/mmc/host/sdhci-acpi.c
++++ b/drivers/mmc/host/sdhci-acpi.c
+@@ -411,6 +411,7 @@ static const struct sdhci_ops sdhci_acpi_ops_amd = {
+ .set_bus_width = sdhci_set_bus_width,
+ .reset = sdhci_reset,
+ .set_uhs_signaling = sdhci_set_uhs_signaling,
++ .set_hs400_dll = sdhci_acpi_amd_hs400_dll,
+ };
+
+ static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
+@@ -441,6 +442,7 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
+ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
+ .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
+ SDHCI_QUIRK_32BIT_ADMA_SIZE,
++ .quirks2 = SDHCI_QUIRK2_BROKEN_TUNING_WA,
+ .probe_slot = sdhci_acpi_emmc_amd_probe_slot,
+ };
+
+diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
+old mode 100644
+new mode 100755
+index d35deb7..8837d45
+--- a/drivers/mmc/host/sdhci.c
++++ b/drivers/mmc/host/sdhci.c
+@@ -1207,6 +1207,12 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
+ flags |= SDHCI_CMD_DATA;
+
+ sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
++
++ if (cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200 && (host->quirks2 & SDHCI_QUIRK2_BROKEN_TUNING_WA)) {
++ mdelay(10);
++ sdhci_writel(host, 0x8803040a, 0x8b8);
++ mdelay(10);
++ }
+ }
+ EXPORT_SYMBOL_GPL(sdhci_send_command);
+
+@@ -1873,6 +1879,14 @@ static void sdhci_hw_reset(struct mmc_host *mmc)
+ host->ops->hw_reset(host);
+ }
+
++static void sdhci_set_hs400_dll(struct mmc_host *mmc)
++{
++ struct sdhci_host *host = mmc_priv(mmc);
++
++ if (host->ops && host->ops->set_hs400_dll)
++ host->ops->set_hs400_dll(host);
++}
++
+ static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable)
+ {
+ if (!(host->flags & SDHCI_DEVICE_DEAD)) {
+@@ -2356,6 +2370,7 @@ static const struct mmc_host_ops sdhci_ops = {
+ .get_cd = sdhci_get_cd,
+ .get_ro = sdhci_get_ro,
+ .hw_reset = sdhci_hw_reset,
++ .set_hs400_dll = sdhci_set_hs400_dll,
+ .enable_sdio_irq = sdhci_enable_sdio_irq,
+ .start_signal_voltage_switch = sdhci_start_signal_voltage_switch,
+ .prepare_hs400_tuning = sdhci_prepare_hs400_tuning,
+@@ -3300,6 +3315,12 @@ void __sdhci_read_caps(struct sdhci_host *host, u16 *ver, u32 *caps, u32 *caps1)
+ host->caps1 &= ~upper_32_bits(dt_caps_mask);
+ host->caps1 |= upper_32_bits(dt_caps);
+ }
++
++ if ((host->caps1 & SDHCI_SUPPORT_SDR104) && (host->caps1 & SDHCI_SUPPORT_DDR50) &&
++ (host->quirks2 & SDHCI_QUIRK2_BROKEN_TUNING_WA))
++ {
++ host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
++ }
+ }
+ EXPORT_SYMBOL_GPL(__sdhci_read_caps);
+
+diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
+old mode 100644
+new mode 100755
+index 1d7d61e..b5fd294
+--- a/drivers/mmc/host/sdhci.h
++++ b/drivers/mmc/host/sdhci.h
+@@ -438,6 +438,7 @@ struct sdhci_host {
+ /* Controller has CRC in 136 bit Command Response */
+ #define SDHCI_QUIRK2_RSP_136_HAS_CRC (1<<16)
+
++#define SDHCI_QUIRK2_BROKEN_TUNING_WA (1<<17)
+ int irq; /* Device IRQ */
+ void __iomem *ioaddr; /* Mapped address */
+ char *bounce_buffer; /* For packing SDMA reads/writes */
+@@ -584,6 +585,7 @@ struct sdhci_ops {
+ int (*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
+ void (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
+ void (*hw_reset)(struct sdhci_host *host);
++ void (*set_hs400_dll)(struct sdhci_host *host);
+ void (*adma_workaround)(struct sdhci_host *host, u32 intmask);
+ void (*card_event)(struct sdhci_host *host);
+ void (*voltage_switch)(struct sdhci_host *host);
+diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
+old mode 100644
+new mode 100755
+index 9a43763..b7d5611
+--- a/include/linux/mmc/host.h
++++ b/include/linux/mmc/host.h
+@@ -152,6 +152,7 @@ struct mmc_host_ops {
+ unsigned int max_dtr, int host_drv,
+ int card_drv, int *drv_type);
+ void (*hw_reset)(struct mmc_host *host);
++ void (*set_hs400_dll)(struct mmc_host *host);
+ void (*card_event)(struct mmc_host *host);
+
+ /*
+--
+2.7.4
+
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/0853-AMD-eMMC-5.0-support.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/0853-AMD-eMMC-5.0-support.patch
deleted file mode 100644
index a11eeb1a..00000000
--- a/common/recipes-kernel/linux/linux-yocto-4.14.71/0853-AMD-eMMC-5.0-support.patch
+++ /dev/null
@@ -1,270 +0,0 @@
-From 78fc88276c47e54dd7378827f404b2abcd4e009d Mon Sep 17 00:00:00 2001
-From: Sudheesh Mavila <sudheesh.mavila@amd.com>
-Date: Wed, 31 Jan 2018 16:01:25 +0530
-Subject: [PATCH 0853/4131] AMD eMMC 5.0 support
-
-Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
----
- drivers/acpi/resource.c | 5 +++
- drivers/mmc/core/mmc.c | 6 +--
- drivers/mmc/host/sdhci-acpi.c | 87 +++++++++++++++++++++++++++++++++++++++++++
- drivers/mmc/host/sdhci.c | 3 +-
- drivers/mmc/host/sdhci.h | 5 +++
- include/linux/mmc/host.h | 6 +++
- 6 files changed, 108 insertions(+), 4 deletions(-)
- mode change 100644 => 100755 drivers/acpi/resource.c
- mode change 100644 => 100755 drivers/mmc/core/mmc.c
- mode change 100644 => 100755 drivers/mmc/host/sdhci-acpi.c
- mode change 100644 => 100755 drivers/mmc/host/sdhci.c
- mode change 100644 => 100755 drivers/mmc/host/sdhci.h
- mode change 100644 => 100755 include/linux/mmc/host.h
-
-diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c
-old mode 100644
-new mode 100755
-index d85e010..e82b5a7
---- a/drivers/acpi/resource.c
-+++ b/drivers/acpi/resource.c
-@@ -425,6 +425,11 @@ static void acpi_dev_get_irqresource(struct resource *res, u32 gsi,
- triggering = trig;
- polarity = pol;
- }
-+ if (gsi == 5) {
-+ polarity = ACPI_ACTIVE_LOW;
-+ pr_warning("ACPI: IRQ %d do not override to %s, %s\n", gsi,
-+ t ? "level" : "edge", p ? "low" : "high");
-+ }
- }
-
- res->flags = acpi_dev_irq_flags(triggering, polarity, shareable);
-diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
-old mode 100644
-new mode 100755
-index bad5c1b..7ba25a2
---- a/drivers/mmc/core/mmc.c
-+++ b/drivers/mmc/core/mmc.c
-@@ -1164,7 +1164,7 @@ static int mmc_select_hs400(struct mmc_card *card)
-
- /* Set host controller to HS timing */
- mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
--
-+ host->ios.transition = HS200_TO_HS_TO_HS400;
- /* Reduce frequency to HS frequency */
- max_dtr = card->ext_csd.hs_max_dtr;
- mmc_set_clock(host, max_dtr);
-@@ -1196,7 +1196,7 @@ static int mmc_select_hs400(struct mmc_card *card)
- mmc_hostname(host), err);
- return err;
- }
--
-+ host->ios.transition = SWITCHING_TO_HS400;
- /* Set host controller to HS400 timing and frequency */
- mmc_set_timing(host, MMC_TIMING_MMC_HS400);
- mmc_set_bus_speed(card);
-@@ -1204,7 +1204,7 @@ static int mmc_select_hs400(struct mmc_card *card)
- err = mmc_switch_status(card);
- if (err)
- goto out_err;
--
-+ host->ios.transition = SWITCHED_TO_HS400;
- return 0;
-
- out_err:
-diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
-old mode 100644
-new mode 100755
-index 08ae0ff..aac8f1f
---- a/drivers/mmc/host/sdhci-acpi.c
-+++ b/drivers/mmc/host/sdhci-acpi.c
-@@ -89,6 +89,47 @@ static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
- return c->slot && (c->slot->flags & flag);
- }
-
-+ /*AMD Driver Strength function*/
-+
-+static int amd_select_drive_strength(struct mmc_card *card,
-+ unsigned int max_dtr, int host_drv,
-+ int card_drv, int *drv_type)
-+{
-+ return MMC_SET_DRIVER_TYPE_A;
-+}
-+
-+static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
-+{
-+ /*AMD Platform requires dll setting*/
-+ sdhci_writel(host, 0x40003210, SDHCI_AMD_REST_DLL_REGISTER);
-+ udelay(10);
-+ sdhci_writel(host, 0x40033210, SDHCI_AMD_REST_DLL_REGISTER);
-+}
-+
-+/*
-+ * For AMD Platform it is required to disable the tuning
-+ * bit first controller to bring to HS Mode from HS200
-+ * mode, later enable to tune to HS400 mode.
-+ */
-+
-+static void sdhci_amd_set_hs400_transition(struct sdhci_host *host)
-+{
-+ switch (host->mmc->ios.transition) {
-+ case HS200_TO_HS_TO_HS400:
-+ sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
-+ break;
-+
-+ case SWITCHING_TO_HS400:
-+ sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
-+ sdhci_acpi_amd_hs400_dll(host);
-+ break;
-+
-+ case SWITCHED_TO_HS400:
-+ default:
-+ break;
-+ }
-+}
-+
- static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
- {
- u8 reg;
-@@ -123,6 +164,18 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
- .ops = &sdhci_acpi_ops_int,
- };
-
-+static const struct sdhci_ops sdhci_acpi_ops_amd = {
-+ .set_clock = sdhci_set_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
-+ .set_platform_hs400_transition = sdhci_amd_set_hs400_transition,
-+};
-+
-+static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
-+ .ops = &sdhci_acpi_ops_amd,
-+};
-+
- #ifdef CONFIG_X86
-
- static bool sdhci_acpi_byt(void)
-@@ -269,6 +322,31 @@ static int bxt_get_cd(struct mmc_host *mmc)
- return ret;
- }
-
-+static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
-+ const char *hid, const char *uid)
-+{
-+ struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
-+ struct sdhci_host *host;
-+ unsigned int caps1, caps;
-+ if (!c || !c->host)
-+ return 0;
-+
-+ host = c->host;
-+
-+ caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
-+ caps = sdhci_readl(host, SDHCI_CAPABILITIES);
-+
-+ if (caps1 & SDHCI_SUPPORT_DDR50)
-+ host->mmc->caps = MMC_CAP_1_8V_DDR;
-+
-+ if ((caps1 & SDHCI_SUPPORT_SDR104) &&
-+ (host->mmc->caps & MMC_CAP_1_8V_DDR))
-+ host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
-+
-+ host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
-+ return 0;
-+}
-+
- static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
- const char *hid, const char *uid)
- {
-@@ -367,6 +445,13 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
- .caps = MMC_CAP_NONREMOVABLE,
- };
-
-+static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
-+ .chip = &sdhci_acpi_chip_amd,
-+ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | MMC_CAP_HW_RESET,
-+ .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
-+ SDHCI_QUIRK_32BIT_ADMA_SIZE,
-+ .probe_slot = sdhci_acpi_emmc_amd_probe_slot,
-+};
- struct sdhci_acpi_uid_slot {
- const char *hid;
- const char *uid;
-@@ -390,6 +475,7 @@ static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
- { "PNP0D40" },
- { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
- { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
-+ { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc},
- { },
- };
-
-@@ -406,6 +492,7 @@ static const struct acpi_device_id sdhci_acpi_ids[] = {
- { "PNP0D40" },
- { "QCOM8051" },
- { "QCOM8052" },
-+ { "AMDI0040" },
- { },
- };
- MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
-diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
-old mode 100644
-new mode 100755
-index d35deb7..da341b0
---- a/drivers/mmc/host/sdhci.c
-+++ b/drivers/mmc/host/sdhci.c
-@@ -1687,7 +1687,8 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
- host->ops->set_power(host, ios->power_mode, ios->vdd);
- else
- sdhci_set_power(host, ios->power_mode, ios->vdd);
--
-+ if (host->ops->set_platform_hs400_transition)
-+ host->ops->set_platform_hs400_transition(host);
- if (host->ops->platform_send_init_74_clocks)
- host->ops->platform_send_init_74_clocks(host, ios->power_mode);
-
-diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
-old mode 100644
-new mode 100755
-index 1d7d61e..c6569ba
---- a/drivers/mmc/host/sdhci.h
-+++ b/drivers/mmc/host/sdhci.h
-@@ -271,6 +271,9 @@
- #define SDHCI_SPEC_200 1
- #define SDHCI_SPEC_300 2
-
-+/* AMD sdhci reset dll register.*/
-+#define SDHCI_AMD_REST_DLL_REGISTER 0x908
-+
- /*
- * End of controller registers.
- */
-@@ -579,6 +582,8 @@ struct sdhci_ops {
- void (*set_bus_width)(struct sdhci_host *host, int width);
- void (*platform_send_init_74_clocks)(struct sdhci_host *host,
- u8 power_mode);
-+ /* ios for transiton phase for going to hs400 */
-+ void (*set_platform_hs400_transition)(struct sdhci_host *host);
- unsigned int (*get_ro)(struct sdhci_host *host);
- void (*reset)(struct sdhci_host *host, u8 mask);
- int (*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
-diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
-old mode 100644
-new mode 100755
-index 9a43763..ae16bc5
---- a/include/linux/mmc/host.h
-+++ b/include/linux/mmc/host.h
-@@ -77,6 +77,12 @@ struct mmc_ios {
- #define MMC_SET_DRIVER_TYPE_D 3
-
- bool enhanced_strobe; /* hs400es selection */
-+
-+ unsigned int transition; /* track transition modes (hs200 hs400) */
-+
-+#define HS200_TO_HS_TO_HS400 1
-+#define SWITCHING_TO_HS400 2
-+#define SWITCHED_TO_HS400 3
- };
-
- struct mmc_host;
---
-2.7.4
-
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/amd-emmc-patches.scc b/common/recipes-kernel/linux/linux-yocto-4.14.71/amd-emmc-patches.scc
index 8823f575..4ade5dc9 100644
--- a/common/recipes-kernel/linux/linux-yocto-4.14.71/amd-emmc-patches.scc
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/amd-emmc-patches.scc
@@ -1,3 +1,4 @@
-patch 0853-AMD-eMMC-5.0-support.patch
+patch 0093-check-pci-dev-before-getting-pci-alias.patch
+patch 0094-mmc-sdhci-acpi-Add-support-for-ACPI-HID-of-AMD-Contr.patch
+patch 0095-eMMC-patch-4.14.48.patch
patch 1116-pinctrl-eMMC-and-PinCtrl-is-sharing-the-interrupt-no.patch
-patch 4096-check-pci-dev-before-getting-pci-alias.patch