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path: root/drivers/gpu/drm/i915/intel_sprite.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 2913e89280d7..eb4b0b31f6f0 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -38,6 +38,7 @@
#include <drm/drm_plane_helper.h>
#include <drm/drm_rect.h>
#include <drm/i915_drm.h>
+#include <linux/locallock.h>
#include "i915_drv.h"
#include "intel_atomic_plane.h"
@@ -79,6 +80,8 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
#define VBLANK_EVASION_TIME_US 100
#endif
+static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock);
+
/**
* intel_pipe_update_start() - start update of a set of display registers
* @new_crtc_state: the new crtc state
@@ -128,7 +131,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
DRM_ERROR("PSR idle timed out 0x%x, atomic update may fail\n",
psr_status);
- local_irq_disable();
+ local_lock_irq(pipe_update_lock);
crtc->debug.min_vbl = min;
crtc->debug.max_vbl = max;
@@ -152,11 +155,11 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
break;
}
- local_irq_enable();
+ local_unlock_irq(pipe_update_lock);
timeout = schedule_timeout(timeout);
- local_irq_disable();
+ local_lock_irq(pipe_update_lock);
}
finish_wait(wq, &wait);
@@ -189,7 +192,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
return;
irq_disable:
- local_irq_disable();
+ local_lock_irq(pipe_update_lock);
}
/**
@@ -225,7 +228,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
new_crtc_state->base.event = NULL;
}
- local_irq_enable();
+ local_unlock_irq(pipe_update_lock);
if (intel_vgpu_active(dev_priv))
return;