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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm630.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm630.dtsi34
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index eaead2f7beb4..759b3a5964cc 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -550,7 +550,7 @@
};
};
- soc {
+ soc@0 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
@@ -1196,11 +1196,11 @@
spmi_bus: spmi@800f000 {
compatible = "qcom,spmi-pmic-arb";
- reg = <0x0800f000 0x1000>,
- <0x08400000 0x1000000>,
- <0x09400000 0x1000000>,
- <0x0a400000 0x220000>,
- <0x0800a000 0x3000>;
+ reg = <0x0800f000 0x1000>,
+ <0x08400000 0x1000000>,
+ <0x09400000 0x1000000>,
+ <0x0a400000 0x220000>,
+ <0x0800a000 0x3000>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
@@ -1463,8 +1463,8 @@
<&sleep_clk>,
<&gcc GCC_MMSS_GPLL0_CLK>,
<&gcc GCC_MMSS_GPLL0_DIV_CLK>,
- <&dsi0_phy 1>,
- <&dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>,
+ <&mdss_dsi0_phy 0>,
<0>,
<0>,
<0>,
@@ -1536,7 +1536,7 @@
port@0 {
reg = <0>;
mdp5_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
+ remote-endpoint = <&mdss_dsi0_in>;
};
};
};
@@ -1572,7 +1572,7 @@
};
};
- dsi0: dsi@c994000 {
+ mdss_dsi0: dsi@c994000 {
compatible = "qcom,sdm660-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0x0c994000 0x400>;
@@ -1586,8 +1586,8 @@
assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
<&mmcc PCLK0_CLK_SRC>;
- assigned-clock-parents = <&dsi0_phy 0>,
- <&dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>;
clocks = <&mmcc MDSS_MDP_CLK>,
<&mmcc MDSS_BYTE0_CLK>,
@@ -1608,7 +1608,7 @@
"pixel",
"core";
- phys = <&dsi0_phy>;
+ phys = <&mdss_dsi0_phy>;
status = "disabled";
@@ -1618,20 +1618,20 @@
port@0 {
reg = <0>;
- dsi0_in: endpoint {
+ mdss_dsi0_in: endpoint {
remote-endpoint = <&mdp5_intf1_out>;
};
};
port@1 {
reg = <1>;
- dsi0_out: endpoint {
+ mdss_dsi0_out: endpoint {
};
};
};
};
- dsi0_phy: phy@c994400 {
+ mdss_dsi0_phy: phy@c994400 {
compatible = "qcom,dsi-phy-14nm-660";
reg = <0x0c994400 0x100>,
<0x0c994500 0x300>,
@@ -1894,7 +1894,7 @@
};
};
- camss: camss@ca00000 {
+ camss: camss@ca00020 {
compatible = "qcom,sdm660-camss";
reg = <0x0ca00020 0x10>,
<0x0ca30000 0x100>,