diff options
Diffstat (limited to 'arch/arm/boot/dts/mt6592.dtsi')
-rw-r--r-- | arch/arm/boot/dts/mt6592.dtsi | 137 |
1 files changed, 0 insertions, 137 deletions
diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi deleted file mode 100644 index 3716f8db951c..000000000000 --- a/arch/arm/boot/dts/mt6592.dtsi +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2014 MediaTek Inc. - * Author: Howard Chen <ibanezchen@gmail.com> - * - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mediatek,mt6592"; - interrupt-parent = <&sysirq>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x0>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x1>; - }; - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x2>; - }; - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x3>; - }; - cpu@4 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x4>; - }; - cpu@5 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x5>; - }; - cpu@6 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x6>; - }; - cpu@7 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x7>; - }; - }; - - system_clk: dummy13m { - compatible = "fixed-clock"; - clock-frequency = <13000000>; - #clock-cells = <0>; - }; - - rtc_clk: dummy32k { - compatible = "fixed-clock"; - clock-frequency = <32000>; - #clock-cells = <0>; - }; - - uart_clk: dummy26m { - compatible = "fixed-clock"; - clock-frequency = <26000000>; - #clock-cells = <0>; - }; - - timer: timer@10008000 { - compatible = "mediatek,mt6577-timer"; - reg = <0x10008000 0x80>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>; - clocks = <&system_clk>, <&rtc_clk>; - clock-names = "system-clk", "rtc-clk"; - }; - - sysirq: interrupt-controller@10200220 { - compatible = "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0x10200220 0x1c>; - }; - - gic: interrupt-controller@10211000 { - compatible = "arm,cortex-a7-gic"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0x10211000 0x1000>, - <0x10212000 0x1000>; - }; - - uart0: serial@11002000 { - compatible = "mediatek,mt6577-uart"; - reg = <0x11002000 0x400>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; - status = "disabled"; - }; - - uart1: serial@11003000 { - compatible = "mediatek,mt6577-uart"; - reg = <0x11003000 0x400>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; - status = "disabled"; - }; - - uart2: serial@11004000 { - compatible = "mediatek,mt6577-uart"; - reg = <0x11004000 0x400>; - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; - status = "disabled"; - }; - - uart3: serial@11005000 { - compatible = "mediatek,mt6577-uart"; - reg = <0x11005000 0x400>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>; - status = "disabled"; - }; -}; |