diff options
Diffstat (limited to 'arch/arm/boot/dts/ls1021a-qds.dts')
| -rw-r--r-- | arch/arm/boot/dts/ls1021a-qds.dts | 326 |
1 files changed, 0 insertions, 326 deletions
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts deleted file mode 100644 index f1acb97aee69..000000000000 --- a/arch/arm/boot/dts/ls1021a-qds.dts +++ /dev/null @@ -1,326 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2013-2014 Freescale Semiconductor, Inc. - * Copyright 2018 NXP - */ - -/dts-v1/; -#include "ls1021a.dtsi" - -/ { - model = "LS1021A QDS Board"; - compatible = "fsl,ls1021a-qds", "fsl,ls1021a"; - - aliases { - enet0_rgmii_phy = &rgmii_phy1; - enet1_rgmii_phy = &rgmii_phy2; - enet2_rgmii_phy = &rgmii_phy3; - enet0_sgmii_phy = &sgmii_phy1c; - enet1_sgmii_phy = &sgmii_phy1d; - }; - - sys_mclk: clock-mclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - }; - - reg_3p3v: regulator { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,widgets = - "Microphone", "Microphone Jack", - "Headphone", "Headphone Jack", - "Speaker", "Speaker Ext", - "Line", "Line In Jack"; - simple-audio-card,routing = - "MIC_IN", "Microphone Jack", - "Microphone Jack", "Mic Bias", - "LINE_IN", "Line In Jack", - "Headphone Jack", "HP_OUT", - "Speaker Ext", "LINE_OUT"; - - simple-audio-card,cpu { - sound-dai = <&sai2>; - frame-master; - bitclock-master; - }; - - simple-audio-card,codec { - sound-dai = <&codec>; - frame-master; - bitclock-master; - }; - }; -}; - -&dspi0 { - bus-num = <0>; - status = "okay"; - - dspiflash: at45db021d@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at45db021d", "atmel,at45", "atmel,dataflash"; - spi-max-frequency = <16000000>; - spi-cpol; - spi-cpha; - reg = <0>; - }; -}; - -&enet0 { - tbi-handle = <&tbi0>; - phy-handle = <&sgmii_phy1c>; - phy-connection-type = "sgmii"; - status = "okay"; -}; - -&enet1 { - tbi-handle = <&tbi0>; - phy-handle = <&sgmii_phy1d>; - phy-connection-type = "sgmii"; - status = "okay"; -}; - -&enet2 { - phy-handle = <&rgmii_phy3>; - phy-connection-type = "rgmii-id"; - status = "okay"; -}; - -&esdhc { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - pca9547: mux@77 { - compatible = "nxp,pca9547"; - reg = <0x77>; - #address-cells = <1>; - #size-cells = <0>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0>; - - ds3232: rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2>; - - ina220@40 { - compatible = "ti,ina220"; - reg = <0x40>; - shunt-resistor = <1000>; - }; - - ina220@41 { - compatible = "ti,ina220"; - reg = <0x41>; - shunt-resistor = <1000>; - }; - }; - - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3>; - - eeprom@56 { - compatible = "atmel,24c512"; - reg = <0x56>; - }; - - eeprom@57 { - compatible = "atmel,24c512"; - reg = <0x57>; - }; - - adt7461a@4c { - compatible = "adi,adt7461a"; - reg = <0x4c>; - }; - }; - - i2c@4 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x4>; - - codec: sgtl5000@2a { - #sound-dai-cells = <0>; - compatible = "fsl,sgtl5000"; - reg = <0x2a>; - VDDA-supply = <®_3p3v>; - VDDIO-supply = <®_3p3v>; - clocks = <&sys_mclk>; - }; - }; - }; -}; - -&ifc { - #address-cells = <2>; - #size-cells = <1>; - /* NOR, NAND Flashes and FPGA on board */ - ranges = <0x0 0x0 0x0 0x60000000 0x08000000>, - <0x2 0x0 0x0 0x7e800000 0x00010000>, - <0x3 0x0 0x0 0x7fb00000 0x00000100>; - status = "okay"; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - big-endian; - bank-width = <2>; - device-width = <1>; - }; - - nand@2,0 { - compatible = "fsl,ifc-nand"; - reg = <0x2 0x0 0x10000>; - }; - - fpga: board-control@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-mfd"; - reg = <0x3 0x0 0x0000100>; - bank-width = <1>; - device-width = <1>; - ranges = <0 3 0 0x100>; - - mdio-mux-emi1 { - compatible = "mdio-mux-mmioreg"; - mdio-parent-bus = <&mdio0>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x54 1>; /* BRDCFG4 */ - mux-mask = <0xe0>; /* EMI1[2:0] */ - - /* Onboard PHYs */ - ls1021amdio0: mdio@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - rgmii_phy1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - ls1021amdio1: mdio@20 { - reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; - rgmii_phy2: ethernet-phy@2 { - reg = <0x2>; - }; - }; - - ls1021amdio2: mdio@40 { - reg = <0x40>; - #address-cells = <1>; - #size-cells = <0>; - rgmii_phy3: ethernet-phy@3 { - reg = <0x3>; - }; - }; - - ls1021amdio3: mdio@60 { - reg = <0x60>; - #address-cells = <1>; - #size-cells = <0>; - sgmii_phy1c: ethernet-phy@1c { - reg = <0x1c>; - }; - }; - - ls1021amdio4: mdio@80 { - reg = <0x80>; - #address-cells = <1>; - #size-cells = <0>; - sgmii_phy1d: ethernet-phy@1d { - reg = <0x1d>; - }; - }; - }; - }; -}; - -&lpuart0 { - status = "okay"; -}; - -&mdio0 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; -}; - -&qspi { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <20000000>; - reg = <0>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <4>; - }; -}; - -&sai2 { - status = "okay"; -}; - -&sata { - status = "okay"; -}; - -&uart0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&can0 { - status = "okay"; -}; - -&can1 { - status = "okay"; -}; - -&can2 { - status = "disabled"; -}; - -&can3 { - status = "disabled"; -}; |