diff options
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-gw51xx.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 638 |
1 files changed, 0 insertions, 638 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi deleted file mode 100644 index e75e1a5364b8..000000000000 --- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +++ /dev/null @@ -1,638 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright 2013 Gateworks Corporation - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/linux-event-codes.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - /* these are used by bootloader for disabling nodes */ - aliases { - led0 = &led0; - led1 = &led1; - nand = &gpmi; - usb0 = &usbh1; - usb1 = &usbotg; - }; - - chosen { - bootargs = "console=ttymxc1,115200"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - user-pb { - label = "user_pb"; - gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; - linux,code = <BTN_0>; - }; - - user-pb1x { - label = "user_pb1x"; - linux,code = <BTN_1>; - interrupt-parent = <&gsc>; - interrupts = <0>; - }; - - key-erased { - label = "key-erased"; - linux,code = <BTN_2>; - interrupt-parent = <&gsc>; - interrupts = <1>; - }; - - eeprom-wp { - label = "eeprom_wp"; - linux,code = <BTN_3>; - interrupt-parent = <&gsc>; - interrupts = <2>; - }; - - tamper { - label = "tamper"; - linux,code = <BTN_4>; - interrupt-parent = <&gsc>; - interrupts = <5>; - }; - - switch-hold { - label = "switch_hold"; - linux,code = <BTN_5>; - interrupt-parent = <&gsc>; - interrupts = <7>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_leds>; - - led0: led-user1 { - label = "user1"; - gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: led-user2 { - label = "user2"; - gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ - default-state = "off"; - }; - }; - - memory@10000000 { - device_type = "memory"; - reg = <0x10000000 0x20000000>; - }; - - pps { - compatible = "pps-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pps>; - gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_5p0v: regulator-5p0v { - compatible = "regulator-fixed"; - regulator-name = "5P0V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: regulator-usb-otg-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii-id"; - phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c3>; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - gsc: gsc@20 { - compatible = "gw,gsc"; - reg = <0x20>; - interrupt-parent = <&gpio1>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - #size-cells = <0>; - - adc { - compatible = "gw,gsc-adc"; - #address-cells = <1>; - #size-cells = <0>; - - channel@0 { - gw,mode = <0>; - reg = <0x00>; - label = "temp"; - }; - - channel@2 { - gw,mode = <1>; - reg = <0x02>; - label = "vdd_vin"; - }; - - channel@5 { - gw,mode = <1>; - reg = <0x05>; - label = "vdd_3p3"; - }; - - channel@8 { - gw,mode = <1>; - reg = <0x08>; - label = "vdd_bat"; - }; - - channel@b { - gw,mode = <1>; - reg = <0x0b>; - label = "vdd_5p0"; - }; - - channel@e { - gw,mode = <1>; - reg = <0xe>; - label = "vdd_arm"; - }; - - channel@11 { - gw,mode = <1>; - reg = <0x11>; - label = "vdd_soc"; - }; - - channel@14 { - gw,mode = <1>; - reg = <0x14>; - label = "vdd_3p0"; - }; - - channel@17 { - gw,mode = <1>; - reg = <0x17>; - label = "vdd_1p5"; - }; - - channel@1d { - gw,mode = <1>; - reg = <0x1d>; - label = "vdd_1p8"; - }; - - channel@20 { - gw,mode = <1>; - reg = <0x20>; - label = "vdd_an1"; - }; - - channel@23 { - gw,mode = <1>; - reg = <0x23>; - label = "vdd_2p5"; - }; - }; - }; - - gsc_gpio: gpio@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - interrupt-parent = <&gsc>; - interrupts = <4>; - }; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - - ltc3676: pmic@3c { - compatible = "lltc,ltc3676"; - reg = <0x3c>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio1>; - interrupts = <8 IRQ_TYPE_EDGE_FALLING>; - - regulators { - /* VDD_SOC (1+R1/R2 = 1.635) */ - reg_vdd_soc: sw1 { - regulator-name = "vddsoc"; - regulator-min-microvolt = <674400>; - regulator-max-microvolt = <1308000>; - lltc,fb-voltage-divider = <127000 200000>; - regulator-ramp-delay = <7000>; - regulator-boot-on; - regulator-always-on; - }; - - /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ - reg_1p8v: sw2 { - regulator-name = "vdd1p8"; - regulator-min-microvolt = <1033310>; - regulator-max-microvolt = <2004000>; - lltc,fb-voltage-divider = <301000 200000>; - regulator-ramp-delay = <7000>; - regulator-boot-on; - regulator-always-on; - }; - - /* VDD_ARM (1+R1/R2 = 1.635) */ - reg_vdd_arm: sw3 { - regulator-name = "vddarm"; - regulator-min-microvolt = <674400>; - regulator-max-microvolt = <1308000>; - lltc,fb-voltage-divider = <127000 200000>; - regulator-ramp-delay = <7000>; - regulator-boot-on; - regulator-always-on; - }; - - /* VDD_DDR (1+R1/R2 = 2.105) */ - reg_vdd_ddr: sw4 { - regulator-name = "vddddr"; - regulator-min-microvolt = <868310>; - regulator-max-microvolt = <1684000>; - lltc,fb-voltage-divider = <221000 200000>; - regulator-ramp-delay = <7000>; - regulator-boot-on; - regulator-always-on; - }; - - /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ - reg_2p5v: ldo2 { - regulator-name = "vdd2p5"; - regulator-min-microvolt = <2490375>; - regulator-max-microvolt = <2490375>; - lltc,fb-voltage-divider = <487000 200000>; - regulator-boot-on; - regulator-always-on; - }; - - /* VDD_HIGH (1+R1/R2 = 4.17) */ - reg_3p0v: ldo4 { - regulator-name = "vdd3p0"; - regulator-min-microvolt = <3023250>; - regulator-max-microvolt = <3023250>; - lltc,fb-voltage-divider = <634000 200000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - status = "okay"; - - adv7180: camera@20 { - compatible = "adi,adv7180"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_adv7180>; - reg = <0x20>; - powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; - interrupt-parent = <&gpio5>; - interrupts = <23 IRQ_TYPE_LEVEL_LOW>; - - port { - adv7180_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <8>; - }; - }; - }; -}; - -&ipu1_csi0_from_ipu1_csi0_mux { - bus-width = <8>; -}; - -&ipu1_csi0_mux_from_parallel_sensor { - remote-endpoint = <&adv7180_to_ipu1_csi0_mux>; - bus-width = <8>; -}; - -&ipu1_csi0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu1_csi0>; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ - status = "disabled"; -}; - -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ - status = "disabled"; -}; - -&pwm4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ - status = "disabled"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; -}; - -&iomuxc { - pinctrl_adv7180: adv7180grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0 - MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0 - >; - }; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 - MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */ - >; - }; - - pinctrl_gpio_leds: gpioledsgrp { - fsl,pins = < - MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 - MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpminandgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */ - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 - MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 - >; - }; - - pinctrl_ipu1_csi0: ipu1csi0grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 - MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 - MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 - MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 - MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 - MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 - MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 - MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 - MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 - MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 - MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 - >; - }; - - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 - >; - }; - - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ - >; - }; - - pinctrl_pps: ppsgrp { - fsl,pins = < - MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 - >; - }; - - pinctrl_pwm2: pwm2grp { - fsl,pins = < - MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 - >; - }; - - pinctrl_pwm3: pwm3grp { - fsl,pins = < - MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 - >; - }; - - pinctrl_pwm4: pwm4grp { - fsl,pins = < - MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart5: uart5grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 - MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usbotg: usbotggrp { - fsl,pins = < - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */ - MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059 - >; - }; - - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 - >; - }; -}; |