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-rw-r--r--Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
index 72324274f20c..1840224faa41 100644
--- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
+++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
@@ -137,6 +137,13 @@ All components are stored with the same number of bits per component.
- Cb, Cr
- No
- Linear
+ * - V4L2_PIX_FMT_NV15_4L4
+ - 'VT15'
+ - 15
+ - 4:2:0
+ - Cb, Cr
+ - Yes
+ - 4x4 tiles
* - V4L2_PIX_FMT_NV16
- 'NV16'
- 8
@@ -378,6 +385,15 @@ two non-contiguous planes.
Example V4L2_PIX_FMT_NV12MT memory layout of tiles
+.. _V4L2-PIX-FMT-NV15-4L4:
+
+Tiled NV15
+----------
+
+Semi-planar 10-bit YUV 4:2:0 formats, using 4x4 tiling.
+All components are packed without any padding between each other.
+As a side-effect, each group of 4 components are stored over 5 bytes
+(YYYY or UVUV = 4 * 10 bits = 40 bits = 5 bytes).
.. _V4L2-PIX-FMT-NV16:
.. _V4L2-PIX-FMT-NV61: