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-rw-r--r--Documentation/openrisc/openrisc_port.rst2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/openrisc/openrisc_port.rst b/Documentation/openrisc/openrisc_port.rst
index 4b2c437942a0..657ac4af7be6 100644
--- a/Documentation/openrisc/openrisc_port.rst
+++ b/Documentation/openrisc/openrisc_port.rst
@@ -8,7 +8,7 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
For information about OpenRISC processors and ongoing development:
======= =============================
- website http://openrisc.io
+ website https://openrisc.io
email openrisc@lists.librecores.org
======= =============================