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-rw-r--r--Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml83
1 files changed, 55 insertions, 28 deletions
diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml
index b6c1dd2a9c5e..00acbbb0f65d 100644
--- a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml
+++ b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml
@@ -21,6 +21,7 @@ properties:
# device
- items:
- enum:
+ - renesas,msiof-r8a7742 # RZ/G1H
- renesas,msiof-r8a7743 # RZ/G1M
- renesas,msiof-r8a7744 # RZ/G1N
- renesas,msiof-r8a7745 # RZ/G1E
@@ -37,8 +38,10 @@ properties:
- renesas,msiof-r8a774a1 # RZ/G2M
- renesas,msiof-r8a774b1 # RZ/G2N
- renesas,msiof-r8a774c0 # RZ/G2E
+ - renesas,msiof-r8a774e1 # RZ/G2H
- renesas,msiof-r8a7795 # R-Car H3
- renesas,msiof-r8a7796 # R-Car M3-W
+ - renesas,msiof-r8a77961 # R-Car M3-W+
- renesas,msiof-r8a77965 # R-Car M3-N
- renesas,msiof-r8a77970 # R-Car V3M
- renesas,msiof-r8a77980 # R-Car V3H
@@ -47,6 +50,13 @@ properties:
- const: renesas,rcar-gen3-msiof # generic R-Car Gen3 and RZ/G2
# compatible device
- items:
+ - enum:
+ - renesas,msiof-r8a779a0 # R-Car V3U
+ - renesas,msiof-r8a779f0 # R-Car S4-8
+ - renesas,msiof-r8a779g0 # R-Car V4H
+ - const: renesas,rcar-gen4-msiof # generic R-Car Gen4
+ # compatible device
+ - items:
- const: renesas,sh-msiof # deprecated
reg:
@@ -65,6 +75,12 @@ properties:
clocks:
maxItems: 1
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
num-cs:
description: |
Total number of chip selects (default is 1).
@@ -96,64 +112,75 @@ properties:
renesas,dtdl:
description: delay sync signal (setup) in transmit mode.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - enum:
- - 0 # no bit delay
- - 50 # 0.5-clock-cycle delay
- - 100 # 1-clock-cycle delay
- - 150 # 1.5-clock-cycle delay
- - 200 # 2-clock-cycle delay
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum:
+ - 0 # no bit delay
+ - 50 # 0.5-clock-cycle delay
+ - 100 # 1-clock-cycle delay
+ - 150 # 1.5-clock-cycle delay
+ - 200 # 2-clock-cycle delay
renesas,syncdl:
description: delay sync signal (hold) in transmit mode
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - enum:
- - 0 # no bit delay
- - 50 # 0.5-clock-cycle delay
- - 100 # 1-clock-cycle delay
- - 150 # 1.5-clock-cycle delay
- - 200 # 2-clock-cycle delay
- - 300 # 3-clock-cycle delay
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum:
+ - 0 # no bit delay
+ - 50 # 0.5-clock-cycle delay
+ - 100 # 1-clock-cycle delay
+ - 150 # 1.5-clock-cycle delay
+ - 200 # 2-clock-cycle delay
+ - 300 # 3-clock-cycle delay
renesas,tx-fifo-size:
# deprecated for soctype-specific bindings
description: |
Override the default TX fifo size. Unit is words. Ignored if 0.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - maxItems: 1
+ $ref: /schemas/types.yaml#/definitions/uint32
default: 64
renesas,rx-fifo-size:
# deprecated for soctype-specific bindings
description: |
Override the default RX fifo size. Unit is words. Ignored if 0.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - maxItems: 1
+ $ref: /schemas/types.yaml#/definitions/uint32
default: 64
required:
- compatible
- reg
- interrupts
+ - clocks
+ - power-domains
- '#address-cells'
- '#size-cells'
+if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: renesas,sh-mobile-msiof
+then:
+ required:
+ - resets
+
+unevaluatedProperties: false
+
examples:
- |
- #include <dt-bindings/clock/r8a7791-clock.h>
- #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/r8a7791-sysc.h>
msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";
- reg = <0 0xe6e20000 0 0x0064>;
- interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+ reg = <0xe6e20000 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 000>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>;
dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
};