diff options
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml | 65 |
1 files changed, 46 insertions, 19 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index 26f1fcf0857a..00b570c82903 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Loongson Local I/O Interrupt Controller @@ -10,21 +10,29 @@ maintainers: - Jiaxun Yang <jiaxun.yang@flygoat.com> description: | - This interrupt controller is found in the Loongson-3 family of chips as the primary - package interrupt controller which can route local I/O interrupt to interrupt lines - of cores. + This interrupt controller is found in the Loongson-3 family of chips and + Loongson-2K1000 chip, as the primary package interrupt controller which + can route local I/O interrupt to interrupt lines of cores. allOf: - $ref: /schemas/interrupt-controller.yaml# properties: compatible: - oneOf: - - const: loongson,liointc-1.0 - - const: loongson,liointc-1.0a + enum: + - loongson,liointc-1.0 + - loongson,liointc-1.0a + - loongson,liointc-2.0 reg: - maxItems: 1 + minItems: 1 + maxItems: 3 + + reg-names: + items: + - const: main + - const: isr0 + - const: isr1 interrupt-controller: true @@ -42,23 +50,20 @@ properties: - const: int2 - const: int3 minItems: 1 - maxItems: 4 '#interrupt-cells': const: 2 - 'loongson,parent_int_map': + loongson,parent_int_map: description: | This property points how the children interrupts will be mapped into CPU interrupt lines. Each cell refers to a parent interrupt line from 0 to 3 - and each bit in the cell refers to a children interrupt fron 0 to 31. - If a CPU interrupt line didn't connected with liointc, then keep it's + and each bit in the cell refers to a child interrupt from 0 to 31. + If a CPU interrupt line didn't connect with liointc, then keep its cell with zero. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32-array - - minItems: 4 - maxItems: 4 - + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 4 + maxItems: 4 required: - compatible @@ -66,8 +71,30 @@ required: - interrupts - interrupt-controller - '#interrupt-cells' - - 'loongson,parent_int_map' + - loongson,parent_int_map + + +unevaluatedProperties: false + +if: + properties: + compatible: + contains: + enum: + - loongson,liointc-2.0 + +then: + properties: + reg: + minItems: 3 + + required: + - reg-names +else: + properties: + reg: + maxItems: 1 examples: - | |