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-rw-r--r--meta/recipes-devtools/gcc/gcc-4.8/0001-fix-ICE-when-building-opus.patch121
1 files changed, 121 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-4.8/0001-fix-ICE-when-building-opus.patch b/meta/recipes-devtools/gcc/gcc-4.8/0001-fix-ICE-when-building-opus.patch
new file mode 100644
index 0000000000..9d3aeaa4e0
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc-4.8/0001-fix-ICE-when-building-opus.patch
@@ -0,0 +1,121 @@
+From 22228d8ba86c70381f7c34c22ac6994234d0f3e7 Mon Sep 17 00:00:00 2001
+From: xguo <xguo@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Fri, 9 Aug 2013 06:59:01 +0000
+Subject: [PATCH] gcc/ChangeLog:
+
+ Backport from mainline:
+ 2013-08-09 Zhenqiang Chen <zhenqiang.chen@linaro.org>
+
+ * config/arm/neon.md (vcond): Fix floating-point vector
+ comparisons against 0.
+
+gcc/testsuite/ChangeLog:
+
+ Backport from mainline:
+ 2013-08-09 Zhenqiang Chen <zhenqiang.chen@linaro.org>
+
+ * gcc.target/arm/lp1189445.c: New testcase.
+
+Upstream-Status: Backport from 4.8.2
+Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
+
+More details in:
+http://gcc.1065356.n5.nabble.com/PATCH-ARM-Fix-unrecognizable-vector-comparisons-td947064.html
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201620 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+ gcc/ChangeLog | 8 ++++++++
+ gcc/config/arm/neon.md | 34 +++++++++++++++++++++++++++-----
+ gcc/testsuite/ChangeLog | 7 +++++++
+ gcc/testsuite/gcc.target/arm/lp1189445.c | 18 +++++++++++++++++
+ 4 files changed, 62 insertions(+), 5 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/arm/lp1189445.c
+
+diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
+index d8d4202..86a5932 100644
+--- a/gcc/config/arm/neon.md
++++ b/gcc/config/arm/neon.md
+@@ -1732,6 +1732,7 @@
+ ? 3 : 1;
+ rtx magic_rtx = GEN_INT (magic_word);
+ int inverse = 0;
++ int use_zero_form = 0;
+ int swap_bsl_operands = 0;
+ rtx mask = gen_reg_rtx (<V_cmp_result>mode);
+ rtx tmp = gen_reg_rtx (<V_cmp_result>mode);
+@@ -1742,12 +1743,16 @@
+ switch (GET_CODE (operands[3]))
+ {
+ case GE:
++ case GT:
+ case LE:
++ case LT:
+ case EQ:
+- if (!REG_P (operands[5])
+- && (operands[5] != CONST0_RTX (<MODE>mode)))
+- operands[5] = force_reg (<MODE>mode, operands[5]);
+- break;
++ if (operands[5] == CONST0_RTX (<MODE>mode))
++ {
++ use_zero_form = 1;
++ break;
++ }
++ /* Fall through. */
+ default:
+ if (!REG_P (operands[5]))
+ operands[5] = force_reg (<MODE>mode, operands[5]);
+@@ -1798,7 +1803,26 @@
+ a GT b -> a GT b
+ a LE b -> b GE a
+ a LT b -> b GT a
+- a EQ b -> a EQ b */
++ a EQ b -> a EQ b
++ Note that there also exist direct comparison against 0 forms,
++ so catch those as a special case. */
++ if (use_zero_form)
++ {
++ inverse = 0;
++ switch (GET_CODE (operands[3]))
++ {
++ case LT:
++ base_comparison = gen_neon_vclt<mode>;
++ break;
++ case LE:
++ base_comparison = gen_neon_vcle<mode>;
++ break;
++ default:
++ /* Do nothing, other zero form cases already have the correct
++ base_comparison. */
++ break;
++ }
++ }
+
+ if (!inverse)
+ emit_insn (base_comparison (mask, operands[4], operands[5], magic_rtx));
+diff --git a/gcc/testsuite/gcc.target/arm/lp1189445.c b/gcc/testsuite/gcc.target/arm/lp1189445.c
+new file mode 100644
+index 0000000..766748e
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/arm/lp1189445.c
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon } */
++/* { dg-add-options arm_neon } */
++/* { dg-options "-O3" } */
++
++int id;
++int
++test (const long int *data)
++{
++ int i, retval;
++ retval = id;
++ for (i = 0; i < id; i++)
++ {
++ retval &= (data[i] <= 0);
++ }
++
++ return (retval);
++}
+--
+2.0.0
+