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2013-12-31mmc: sdhci: block runtime PM of BYT SDHCrebecca/base-baytrailChew, Chiau Ee
No requirement to support runtime PM on BYT-I for now.Thus, this is to block the runtime PM for BYT SDHC if the runtime PM config is enabled. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci: Introduce quirks to workaround issue of UHS-I cards running with ↵Chew, Chiau Ee
DDR50@50MHz. These quirks disable the PRESET_VALUE_ENABLE in Host control 2 register and reduce clock frequency to 25MHz for DDR50 mode. Signed-off-by: Kean Ho, Chew <kean.ho.chew@intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci: add ability to stay runtime-resumed if the card is powered upChew, Chiau Ee
If card power is dependent on SD bus power then the host controller must not be runtime suspended while the card is powered up. Add the ability to stay runtime-resumed in that case and enable it with a new quirk SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit f0710a557cb17746b09234f01073a2cdafe4f4a5) Conflicts: include/linux/mmc/sdhci.h Resolve SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON patch conflict by introducing SDHCI_QUIRK2_PRESET_VALUE_BROKEN Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31PENDING: mmc: sdhci-pci: Fix BYT sd card getting stuck in runtime suspendAdrian Hunter
A host controller for a SD card may need a GPIO for card detect in order to wake up from runtime suspend when a card is inserted. If that GPIO is not configured, then the host controller will not wake up. Fix that for the affected devices by not enabling runtime PM unless the GPIO is successfully set up. This affects BYT sd card host controller which had runtime PM enabled from v3.11. For completeness, the MFD sd card host controller is flagged also. Tested on v3.11.10 and v3.12.4 although the patch applies with some offsets and fuzz. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> From http://marc.info/?l=linux-mmc&m=138676702327057 Do not apply the following without this patch: 7396e318b497cd46eb156effa5278126582ddde7 "mmc: sdhci-pci: support runtime PM for BYT SD cards" Signed-off-by: Darren Hart <dvhart@linux.intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31ALSA: hda - hdmi: Enabling HDMI Audio with HDARamachandran Durairaj
Signed-off-by: Ramachandran Durairaj <ramachandranx.durairaj@intel.com>
2013-12-31usb: dwc3: pci: refclk signal to the ulpi phy will be enabled during the ↵Maurice Petallo
dwc3 usb device driver initialization and will be disabled once the driver is removed. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
2013-12-31usb: dwc3: pci: add support for BayTrailHeikki Krogerus
Add PCI id for Intel BayTrail. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com> (cherry picked from commit b62cd96de3161dfb125a769030eec35a4cab3d3a) Signed-off-by: Chan, Wei Sern <wei.sern.chan@intel.com>
2013-12-31usb: dwc3: set 'mode' based on selected Kconfig choicesVivek Gautam
Now that machines may select dwc3's working mode (HOST only, GADGET only or DUAL_ROLE) via Kconfig, let's set dwc3's mode based on that, rather than fixing it to whatever hardware says. This way we can skip initializing Gadget/Host in case we are using Host-only/Gadget-only mode respectively. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com> (cherry picked from commit cd051da2c81c8a86f331b4caa0c135c33d3ea3f6) Signed-off-by: Chan, Wei Sern <wei.sern.chan@intel.com>
2013-12-31usb: dwc3: core: explicitly setup and cleanup event buffersFelipe Balbi
Make the call to dwc3_event_buffers_setup() and dwc3_event_buffers_cleanup() explicit, so it's easier to implement PM. Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com> (cherry picked from commit f122d33e4b0045a42238b9a4c3943adf7e8313c1) Signed-off-by: Chan, Wei Sern <wei.sern.chan@intel.com>
2013-12-31usb: dwc3: remove dwc3 dependency on host AND gadget.Vivek Gautam
DWC3 controller curretly depends on USB && USB_GADGET. Some hardware may like to use only host feature on dwc3, or only gadget feature. So, removing this dependency of USB_DWC3 on USB and USB_GADGET. Adding the mode of operaiton of DWC3 also here HOST/GADGET/DUAL_ROLE based on which features are enabled. [ balbi@ti.com : . make sure we have default modes for all possible Kernel configurations. . Remove the config -> menuconfig change as it's unnecessary . switch over to IS_ENABLED() ] CC: Doug Anderson <dianders@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com> (cherry picked from commit 388e5c51135f817f01177c42261f1116a6d7f2ad) Signed-off-by: Chan, Wei Sern <wei.sern.chan@intel.com>
2013-12-31i2c: i801: Enable BYT SMBUS supportChew, Kean Ho
Add PCI ID of BYT SMBUS. Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
2013-12-31x86/byt-board: setup clock tree for BYT PCI mode PWM hostChang, Rebecca Swee Fun
BYT PCI mode PWM host controller driver (pwm-lpss.c) requires clock information during device/driver probe. Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
2013-12-31x86/byt: Change DMA SRC_MSIZE and DEST_MSIZE of SPI FIFO sideChew, Chiau Ee
This is to fix issue on PCI mode SPI not read/writing correctly using DMA mode at low speeds.The DMA SRC_MSIZE and DEST_MSIZE of SPI FIFO side is chaged from 16 to 32. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31x86/byt: Add kernel module param to disable the BYT PCI board fileChew, Chiau Ee
If user would like to use the ACPI mode LPSS, the BYT PCI board file has to be disabled. Thus, user can disable the board file by insert byt-board.disable=1 in kernel boot command line Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31x86/PCI: Map PCI setup data with ioremap() so it can be in highmemMatt Fleming
f9a37be0f0 ("x86: Use PCI setup data") added support for using PCI ROM images from setup_data. This used phys_to_virt(), which is not valid for highmem addresses, and can cause a crash when booting a 32-bit kernel via the EFI boot stub. pcibios_add_device() assumes that the physical addresses stored in setup_data are accessible via the direct kernel mapping, and that calling phys_to_virt() is valid. This isn't guaranteed to be true on x86 where the direct mapping range is much smaller than on x86-64. Calling phys_to_virt() on a highmem address results in the following: BUG: unable to handle kernel paging request at 39a3c198 IP: [<c262be0f>] pcibios_add_device+0x2f/0x90 ... Call Trace: [<c2370c73>] pci_device_add+0xe3/0x130 [<c274640b>] pci_scan_single_device+0x8b/0xb0 [<c2370d08>] pci_scan_slot+0x48/0x100 [<c2371904>] pci_scan_child_bus+0x24/0xc0 [<c262a7b0>] pci_acpi_scan_root+0x2c0/0x490 [<c23b7203>] acpi_pci_root_add+0x312/0x42f ... The solution is to use ioremap() instead of phys_to_virt() to map the setup data into the kernel address space. [bhelgaas: changelog] Tested-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Matt Fleming <matt.fleming@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Matthew Garrett <mjg59@srcf.ucam.org> Cc: Seth Forshee <seth.forshee@canonical.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@vger.kernel.org # v3.8+(cherry picked from commit 65694c5aaddfedd9da082e4e150cafc6b3fc8a6a) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31x86/Kconfig: add PCI dependency for CONFIG_X86_INTEL_LPSSChew, Chiau Ee
This is to ensure the CONFIG_X86_INTEL_LPSS will be set when ACPI or PCI is enabled. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31x86/intel/lpss: Add pin control support to Intel low power subsystemMathias Nyman
x86 chips with LPSS (low power subsystem) such as Lynxpoint and Baytrail have SoC like peripheral support and controllable pins. At the moment, Baytrail needs the pinctrl-baytrail driver to let peripherals control their gpio resources, but more pincontrol functions such as pin muxing and grouping are possible to add later. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: http://lkml.kernel.org/r/1379080949-21734-1-git-send-email-mathias.nyman@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org> (cherry picked from commit 0f531431d3de88efb4234d6c0ce22089ec035a38) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31x86/byt: enable board file for PCI mode SPI and DMA enumerationChang, Rebecca Swee Fun
This commit enables the following: - setup clock tree for PCI mode SPI and DMA - register SPI slave Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
2013-12-31mmc: sdhci-pci: add another device idAdrian Hunter
Add another PCI device id for an eMMC host controller. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 30d025c0f7234409e8ee1bf22d1729055e640ec6) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-acpi: add support for eMMC hardware reset for HID 80860F14Adrian Hunter
Add support for eMMC hardware reset for HID 80860F14. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit b04fa064e72c301e075c2d52c146282f8f464083) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-pci: add support for eMMC hardware reset for BYT eMMC.Adrian Hunter
Add support for eMMC hardware reset for BYT eMMC. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit c9faff6cbb3d2b37b3aa356ce455848f91685b24) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-acpi: fix error return code in sdhci_acpi_add_own_cd()Wei Yongjun
Fix to return a negative error code in the gpio_to_irq() error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 5a0e8074660444010fee40eebcd57aaaf8d44662) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-pci: support runtime PM for BYT SD cardsAdrian Hunter
Add support for runtime PM for BYT SD cards. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 7396e318b497cd46eb156effa5278126582ddde7) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-acpi: support runtime PM for ACPI HID 80860F14 SD cardsAdrian Hunter
Enable runtime PM for ACPI HID 80860F14 SD cards, adding support for card detect GPIO. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit a61abe6eebfda1add8cb54e6e10384ea747d68a5) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-pci: add more device idsAdrian Hunter
Add three more PCI device ids. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 728ef3d1939e23e26067608d8d8da9571be14b1d) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-acpi: add more device idsAdrian Hunter
Add three more ACPI HIDs. Also, as some devices must be further distinguished by ACPI UID, slot information is now associated with HID and UID. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 07a588837be0a18075fedf71e6963b5109abec03) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-acpi: fix initial runtime pm statusAdrian Hunter
Initial runtime pm status is active. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 1d1ff45871984364056ebfc528ed31ff7f03f970) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: core: fix init controller performance regression, updated patchAdrian Hunter
Add MMC_CAP2_NO_PRESCAN_POWERUP to sdhci-pci.c also, use mmc_power_off() for MMC_CAP2_NO_PRESCAN_POWERUP. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> [cjb: previously applied v1 of this patch instead of v4] Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit a08b17be8b984a7c51cd5a480cd977363df353f9) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: core: fix performance regression initializing MMC host controllersAdrian Hunter
Commit fa5501890d8974301042e0202d342a6cbe8609f4 introduced a performance regression by adding mmc_power_up() to mmc_start_host(). mmc_power_up() is not necessary to host controller initialization, it is part of card initialization and is performed anyway asynchronously. This patch allows a driver to leave the power up in asynchronous code (as it was before). On my current target platform this reduces driver initialization from: [ 1.313220] initcall sdhci_acpi_driver_init+0x0/0x12 returned 0 after 102008 usecs to this: [ 1.217209] initcall sdhci_acpi_driver_init+0x0/0x12 returned 0 after 8331 usecs Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 0d3e3350d5871c53464be4c92d57198744247005) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci: Constify sdhci_ops structs where possibleLars-Peter Clausen
Basically all drivers can have sdhci_ops struct const, but almost none do. This patch constifies all sdhci_ops struct declarations where possible. The patch was auto-generated with the following coccinelle semantic patch: // <smpl> @r1@ identifier ops; identifier fld; @@ ops.fld = ...; @disable optional_qualifier@ identifier ops != r1.ops; @@ static +const struct sdhci_ops ops = { ... }; // </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit c915568d99f12898aea4e15845cf891a8b5cc575) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-pltfm: Constify the ops field of sdhci_pltfm_data structLars-Peter Clausen
All users of the sdhci_ops struct in the sdhci core already treat it as const. The sdhci-pltfm code itself never actually looks at the ops field of the sdhci_pltfm_data struct and merely passes it on to the sdhci core, so make we can make it const in the sdhci_pltfm_data struct as well. This allows us to declare sdhci_ops structs as const in drivers using the sdhci-pltfm helper code. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit ad1df8c25ecdf0bd2632c0825ecf8e8748c8154a) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci_pltfm: Constify sdhci_pltfm_dataLars-Peter Clausen
The sdhci_pltfm_data struct is never modified within the sdhci_pltfm module. So make the pdata parameter to sdhci_pltfm_init and sdhci_pltfm_register const. This allows drivers to declare their sdhci_pltfm_data struct as const. This patch also makes the sdhci_pltfm_data declarations const where possible. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 1db5eebf22f86a87c3fcbbb085a4abbcfd09ee7d) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-tegra: add basic support for Tegra114Rhyland Klein
The mmc controller on Tegra114 platforms is basically compatible with the settings used for Tegra30. However there is a difference where we don't need the extra ENABLE_SDHCI_SPEC_300 quirk as Tegra114 hardware advertises v3.0 support already. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 5ebf2552493228ec875ea45f6ba8a816cca3744a) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-tegra: cleanup ifdefsRhyland Klein
The structs wrapped with the SOC ifdefs are small enough where having them always there shouldn't be a big overhead. Removing the ifdefs also makes the code a little cleaner. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 76f3ae125f3ca777cc831d475d17184641d5bc46) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdio: bind acpi with sdio function deviceAaron Lu
ACPI spec 5 defined the _ADR encoding for sdio bus as: High word - slot number (0 based) Low word - function number This patch adds support for binding sdio function device with acpi node, and if successful, involve acpi into its power management. Signed-off-by: Aaron Lu <aaron.lu@intel.com> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit eed222aca8d077af3600b651176f6fd04d95cce1) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: support packed write command for eMMC4.5 devicesSeungwon Jeon
This patch supports packed write command of eMMC4.5 devices. Several writes can be grouped in packed command and all data of the individual commands can be sent in a single transfer on the bus. Large amounts of data in one transfer rather than several data of small size are effective for eMMC write internally. As a result, packed command help write throughput be improved. The following tables show the results of packed write. Type A: test none | packed iozone 25.8 | 31 tiotest 27.6 | 31.2 lmdd 31.2 | 35.4 Type B: test none | packed iozone 44.1 | 51.1 tiotest 47.9 | 52.5 lmdd 51.6 | 59.2 Type C: test none | packed iozone 19.5 | 32 tiotest 19.9 | 34.5 lmdd 22.8 | 40.7 Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Maya Erez <merez@codeaurora.org> Reviewed-by: Namjae Jeon <linkinjeon@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit ce39f9d17c14e56ea6772aa84393e6e0cc8499c4) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: add packed command feature of eMMC4.5Seungwon Jeon
This patch adds packed command feature of eMMC4.5. The maximum number for packing read (or write) is offered and exception event relevant to packed command which is used for error handling is enabled. If host wants to use this feature, MMC_CAP2_PACKED_CMD should be set. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Maya Erez <merez@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Reviewed-by: Namjae Jeon <linkinjeon@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit abd9ac144947d9a604beb763339e2f77ce8bec79) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: block: don't start new request when the card is removedSeungwon Jeon
It's not necessary to start a new request while error handling if the card was removed. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Konstantin Dorfman <kdorfman@codeaurora.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 7a81902fa52f2b6f5037e167f74ebb5a41cfc7d1) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci: rename platform_8bit_width to platform_bus_widthSascha Hauer
The 8bit in the function name is misleading. When set, it will be used to set the bus width, regardless of whether 8bit or another bus width is requested, so change the function name to platform_bus_width. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 7bc088d38f92f58df97e1cd9a8430331ee5491bb) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: bcm2835: set SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLKStephen Warren
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK does basically the same as implementing struct sdhci_ops .get_timeout_clock, so simply set that quirk and remove the custom code to simplify the driver. Reported-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 29866a98be716111016da69f2747e012843b61e4) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-pltfm: Add a common clk API implementation of get_timeout_clockLars-Peter Clausen
Quite a few drivers have a implementation of the get_timeout_clock callback which simply returns the result of clk_get_rate on the device's clock. This patch adds a common implementation of this to the sdhci-pltfm module and replaces all custom implementations with the common one. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Kevin Liu <kliu5@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit d005d94359a8df84ea6e5ac137393707f9e87e81) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-esdhc-imx: support 8bit modeSascha Hauer
The i.MX esdhc has a nonstandard bit layout for the SDHCI_HOST_CONTROL register. To support 8bit bus width on i.MX populate the platform_bus_width callback. This is tested on an i.MX25, but should according to the datasheets work on the other i.MX using this hardware aswell. The i.MX6, while having a SDHCI_SPEC_300 controller, still uses the same nonstandard register layout. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit af51079e68d4759e458b0592df5d1fab373c43ae) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdhci-esdhc-imx: remove D3CD check from SDHCI_HOST_CONTROL writeShawn Guo
SDHCI_CTRL_D3CD is not a standard SDHCI_HOST_CONTROL, so there is no need to check it in SDHCI_HOST_CONTROL write at all. Remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 6b40d18295a878c0e8ff02062cb9b8e9a6b156e4) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: add BCM2835 driverStephen Warren
Add a very simple driver for the BCM2835 SoC, which is used in the Raspberry Pi board. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 1a94715d4db7b71f825cd5585bc8d653eae1faf4) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: fix async request mechanism for sequential read scenariosKonstantin Dorfman
When current request is running on the bus and if next request fetched by mmcqd is NULL, mmc context (mmcqd thread) gets blocked until the current request completes. This means that if new request comes in while the mmcqd thread is blocked, this new request can not be prepared in parallel to current ongoing request. This may result in delaying the new request execution and increase it's latency. This change allows to wake up the MMC thread on new request arrival. Now once the MMC thread is woken up, a new request can be fetched and prepared in parallel to the current running request which means this new request can be started immediately after the current running request completes. With this change read throughput is improved by 16%. Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org> Reviewed-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 2220eedfd7aea69008173a224975e10284fbe854) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31mmc: sdio: Fix SDIO 3.0 UHS-I initialization sequenceSujit Reddy Thumma
According to UHS-I initialization sequence for SDIO 3.0 cards, the host must set bit[24] (S18R) of OCR register during OCR handshake to know whether the SDIO card is capable of doing 1.8V I/O. Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org> Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> Reviewed-by: Johan Rudholm <johan.rudholm@stericsson.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 41875e388401ad97c33252d5fa39d52e0b70ee9b) Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
2013-12-31platform: fall-back to driver name check if there is no id foundAndy Shevchenko
Some of the platform devices rely on the name of their driver to match with. In the current implementation, if platform id table is needed, they have to add the name to the platform id table which sounds alogical. The patch adjustes the logic of the id table matching to make sure we will fall-back to match by the driver name. This will make it similar to the DT or ACPI cases. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reported-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-12-31pinctrl: pinctrl-baytrail: enable PCI mode for Intel BayTrail GPIOChew, Kean Ho
To enable pinctrl driver to support PCI enumeration mode for Intel BayTrail GPIO. To modify pinctrl driver to be able to change GPIO mux control per user request rather than fixed by BIOS. Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com> Replace invalid function devm_ioremap_resource() used in byt_gpio_probe() with devm_request_and_ioremap(). Signed-off-by: Ong, Boon Leong <boon.leong.ong@intel.com>
2013-12-31pinctrl: pinctrl-byt-device: enable PCI enumeration mode for Intel BayTrailChew, Kean Ho
Enable pinctrl driver to support PCI mode for Intel BayTrail. Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
2013-12-31pinctrl: add Intel BayTrail GPIO/pinctrl supportMathias Nyman
Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins. Supports gpio interrupts and ACPI gpio events Pins may be muxed to alternate function instead of gpio by firmware. This driver does not touch the pin muxing and expect firmare to set pin muxing and pullup/down properties properly. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> (cherry picked from commit a5d811bbf1c6df86cfe23948059ea614554b9f19) Signed-off-by: Ong, Boon Leong <boon.leong.ong@intel.com>
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-19 02:15:19 +0000